Vadzim Dambrouski cbcdc5db51 [MSP430] Allow msp430_intrcc functions to not have interrupt attribute. ...

Summary:
Useful in case you want to have control over interrupt vector generation.
For example in Rust language we have an arrangement where all unhandled
ISR vectors gets mapped to a single default handler function. Which is
hard to implement when LLVM tries to generate vectors on its own.

Reviewers: asl, krisb

Subscribers: hiraditya, JDevlieghere, awygle, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67313

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372910 91177308-0d34-0410-b5e6-96231b3b80d8

2019-09-25 18:58:07 +00:00

..

AArch64

[AArch64][GlobalISel] Choose CCAssignFns per-argument for tail call lowering

2019-09-25 16:45:35 +00:00

AMDGPU

[AMDGPU] Improve fma.f64 test. NFC.

2019-09-25 18:50:34 +00:00

ARC

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

ARM

[BreakFalseDeps] ignore function with minsize attribute

2019-09-23 17:01:01 +00:00

AVR

[AVR] Fix tests after r363757

2019-07-04 06:12:47 +00:00

BPF

[BPF] Generate array dimension size properly for zero-size elements

2019-09-24 22:38:43 +00:00

Generic

Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""

2019-09-10 10:39:09 +00:00

Hexagon

[Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX

2019-09-23 14:33:27 +00:00

Inputs

[CodeGen] Add stack protector tests where the guard gets re-assigned

2019-07-17 20:46:16 +00:00

Lanai

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Mips

[MIPS GlobalISel] VarArg argument lowering, select G_VASTART and vacopy

2019-09-23 08:11:41 +00:00

MIR

Add a missing space in a MIR parser error message

2019-09-20 14:41:41 +00:00

MSP430

[MSP430] Allow msp430_intrcc functions to not have interrupt attribute.

2019-09-25 18:58:07 +00:00

NVPTX

[NVPTX] Fix PR41651

2019-07-30 19:52:01 +00:00

PowerPC

Extends the expansion of the LWZtoc pseduo op for AIX.

2019-09-24 18:04:51 +00:00

RISCV

[RISCV] Switch to the Machine Scheduler

2019-09-17 11:15:35 +00:00

SPARC

[test] Fix tests when run on windows after SVN r369426. NFC.

2019-08-20 20:58:02 +00:00

SystemZ

[SystemZ] Improve emitSelect()

2019-09-25 14:00:33 +00:00

Thumb

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Thumb2

[ARM] Ensure we do not attempt to create lsll #0

2019-09-25 10:16:48 +00:00

WebAssembly

[WebAssembly] vNxM.load_splat instructions

2019-09-23 20:42:12 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

[Windows] Replace TrapUnreachable with an int3 insertion pass

2019-09-09 23:04:25 +00:00

X86

[DAGCombiner] add one-use restriction to vector transform with cheap extract

2019-09-25 15:08:33 +00:00

XCore

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00