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InstPrinter
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Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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2013-05-23 17:10:37 +00:00 |
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MCTargetDesc
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R600: Use correct encoding for Vertex Fetch instructions on Cayman
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2013-06-14 22:12:30 +00:00 |
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TargetInfo
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R600: Remove unnecessary include
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2013-06-07 20:28:43 +00:00 |
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AMDGPU.h
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDGPU.td
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDGPUAsmPrinter.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDGPUAsmPrinter.h
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R600: Emit used GPRs count
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2013-04-17 15:17:25 +00:00 |
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AMDGPUCallingConv.td
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R600/SI: Add support for v4i32 and v4f32 kernel args
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2013-06-25 02:39:25 +00:00 |
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AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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R600: Fix calculation of stack offset in AMDGPUFrameLowering
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2013-06-07 20:52:05 +00:00 |
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AMDGPUFrameLowering.h
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R600: Support for indirect addressing v4
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2013-02-06 17:32:29 +00:00 |
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AMDGPUIndirectAddressing.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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AMDGPUInstrInfo.cpp
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
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AMDGPUInstrInfo.h
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
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AMDGPUInstrInfo.td
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Create an FPOW SDNode opcode def in the target independent .td file rather than in a specific backend.
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2013-05-22 06:36:09 +00:00 |
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AMDGPUInstructions.td
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R600/SI: Add support for global loads
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2013-06-03 17:39:43 +00:00 |
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AMDGPUIntrinsics.td
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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AMDGPUISelLowering.cpp
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R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
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2013-06-25 13:55:57 +00:00 |
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AMDGPUISelLowering.h
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R600/SI: Add support for work item and work group intrinsics
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2013-06-03 17:40:18 +00:00 |
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AMDGPUMachineFunction.cpp
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R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTE
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2013-04-26 18:32:24 +00:00 |
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AMDGPUMachineFunction.h
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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AMDGPUMCInstLower.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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AMDGPUMCInstLower.h
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R600: BB operand support for SI
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2012-12-17 15:14:54 +00:00 |
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AMDGPURegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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AMDGPURegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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AMDGPURegisterInfo.td
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Make SubRegIndex size mandatory, following r183020.
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2013-05-31 23:45:26 +00:00 |
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AMDGPUSubtarget.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDGPUSubtarget.h
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDGPUTargetMachine.cpp
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Move StructurizeCFG out of R600 to generic Transforms.
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2013-06-19 20:18:24 +00:00 |
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AMDGPUTargetMachine.h
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Remove dead prototype.
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2013-06-18 06:24:14 +00:00 |
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AMDILBase.td
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R600: Move Subtarget feature definitions into AMDGPU.td
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2013-06-07 20:28:49 +00:00 |
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AMDILCFGStructurizer.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDILInstrInfo.td
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDILIntrinsicInfo.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDILIntrinsicInfo.h
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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AMDILIntrinsics.td
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R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern
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2013-02-18 14:11:28 +00:00 |
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AMDILISelDAGToDAG.cpp
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
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AMDILISelLowering.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDILRegisterInfo.td
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CMakeLists.txt
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Move StructurizeCFG out of R600 to generic Transforms.
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2013-06-19 20:18:24 +00:00 |
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LLVMBuild.txt
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Makefile
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Processors.td
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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R600ControlFlowFinalizer.cpp
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R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman
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2013-06-14 22:12:24 +00:00 |
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R600Defines.h
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R600: Add ALUInst bit to tablegen definitions v2
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2013-06-28 15:46:53 +00:00 |
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R600EmitClauseMarkers.cpp
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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R600ExpandSpecialInstrs.cpp
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
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R600InstrFormats.td
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R600: Add ALUInst bit to tablegen definitions v2
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2013-06-28 15:46:53 +00:00 |
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R600InstrInfo.cpp
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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R600InstrInfo.h
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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R600Instructions.td
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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R600Intrinsics.td
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R600: Improve texture handling
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2013-05-17 16:50:20 +00:00 |
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R600ISelLowering.cpp
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
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R600ISelLowering.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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R600MachineFunctionInfo.cpp
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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R600MachineFunctionInfo.h
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Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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2013-05-23 17:10:37 +00:00 |
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R600MachineScheduler.cpp
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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R600MachineScheduler.h
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R600: Use a refined heuristic to choose when switching clause
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2013-06-07 23:30:34 +00:00 |
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R600OptimizeVectorRegisters.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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R600Packetizer.cpp
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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R600RegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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R600RegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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R600RegisterInfo.td
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R600: use capital letter for PV channel
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2013-06-03 15:44:35 +00:00 |
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R600Schedule.td
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R600: Fix typo in R600Schedule.td
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2013-06-25 02:39:20 +00:00 |
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R600TextureIntrinsicsReplacer.cpp
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Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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2013-05-23 17:10:37 +00:00 |
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SIAnnotateControlFlow.cpp
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R600: Remove unnecessary include
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2013-06-07 20:28:43 +00:00 |
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SIDefines.h
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R600/SI: Emit config values in register value pairs.
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2013-04-15 17:51:35 +00:00 |
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SIInsertWaits.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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SIInstrFormats.td
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R600/SI: Use the same names for VOP3 operands and encoding fields
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2013-05-20 15:02:08 +00:00 |
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SIInstrInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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SIInstrInfo.h
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R600/SI: adjust writemask to only the used components
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2013-04-10 08:39:08 +00:00 |
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SIInstrInfo.td
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Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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2013-06-19 21:36:55 +00:00 |
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SIInstructions.td
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R600: Add SI load support for v[24]i32 and store for v2i32
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2013-06-15 00:09:31 +00:00 |
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SIIntrinsics.td
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R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcode
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2013-05-06 23:02:19 +00:00 |
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SIISelLowering.cpp
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R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
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2013-06-25 13:55:57 +00:00 |
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SIISelLowering.h
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R600/SI: Report unaligned memory accesses as legal for > 32-bit types
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2013-06-25 02:39:35 +00:00 |
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SILowerControlFlow.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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SIMachineFunctionInfo.cpp
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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SIMachineFunctionInfo.h
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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SIRegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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SIRegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
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SIRegisterInfo.td
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R600/SI: dynamical figure out the reg class of MIMG
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2013-04-10 08:39:16 +00:00 |
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SISchedule.td
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