llvm/test/CodeGen/X86/pr14204.ll
Michael Liao 2a2263e744 Fix PR14204
- Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 17:57:12 +00:00

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358 B
LLVM

; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=core-avx2 | FileCheck %s
; FIXME: vpmovsxwd should be generated instead of vpmovzxwd followed by
; SLL/SRA.
define <8 x i32> @foo(<8 x i1> %bar) nounwind readnone {
entry:
%s = sext <8 x i1> %bar to <8 x i32>
ret <8 x i32> %s
; CHECK: foo
; CHECK: vpmovzxwd
; CHECK: vpslld
; CHECK: vpsrad
; CHECK: ret
}