llvm/test/CodeGen/MIR at ea59a2471779a76cb73cd4d83bec3a022ff91e21 - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2026-08-27 02:51:23 -04:00

Files

T

Matthias Braun 5927be1ab4 MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFC

This tracks whether MaxCallFrameSize is computed yet. Ideally we would
assert and fail when the value is queried before it is computed, however
this fails various targets that need to be fixed first.

Differential Revision: https://reviews.llvm.org/D32570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301851 91177308-0d34-0410-b5e6-96231b3b80d8

2017-05-01 22:32:25 +00:00

AArch64

MIR: parse & print the atomic parts of a MachineMemOperand.

2017-02-13 22:14:08 +00:00

AMDGPU

AMDGPU: Remove legacy bfe intrinsics

2017-04-03 18:08:08 +00:00

ARM

Move test to correct directory

2016-12-17 02:16:26 +00:00

Generic

MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFC

2017-05-01 22:32:25 +00:00

Hexagon

Move .mir tests to appropriate directories

2016-12-09 19:08:15 +00:00

Mips

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

NVPTX

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

PowerPC

MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.

2016-08-24 01:32:41 +00:00

X86

[MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input.

2017-03-19 13:23:20 +00:00

README

Add README describing the intention of test/CodeGen/MIR

2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.