Files
llvm/test/CodeGen
Florian Hahn eb48e7d58f [AArch64] Enable FeatureFuseAES on Cortex-A72.
This patch enables fusing dependent AESE/AESMC and AESD/AESIMC
instruction pairs on Cortex-A72, as recommended in the Software
Optimization Guide, section 4.10.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303073 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-15 15:15:22 +00:00
..
2017-05-15 13:14:04 +00:00