Michael Liao eedff3547d Fix PR15267 ...

- When extloading from a vector with non-byte-addressable element, e.g.
  <4 x i1>, the current logic breaks. Extend the current logic to
  fix the case where the element type is not byte-addressable by loading
  all bytes, bit-extracting/packing each element.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175642 91177308-0d34-0410-b5e6-96231b3b80d8

2013-02-20 18:04:21 +00:00

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AArch64

AArch64: remove ConstantIsland pass & put literals in separate section.

2013-02-15 09:33:43 +00:00

ARM

ARM NEON: Merge a f32 bitcast of a v2i32 extractelt

2013-02-19 15:27:05 +00:00

CPP

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Generic

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Hexagon

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

MBlaze

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Mips

Expand pseudos/macros:

2013-02-20 05:45:15 +00:00

MSP430

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NVPTX

[NVPTX] Disable vector registers

2013-02-12 14:18:49 +00:00

PowerPC

Fix bug 14779 for passing anonymous aggregates [patch by Kai Nacke].

2013-02-20 17:31:41 +00:00

R600

R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern

2013-02-18 14:11:28 +00:00

SI

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SPARC

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Thumb

Fix thumbv5e frame lowering assertion failure.

2013-02-20 12:21:33 +00:00

Thumb2

ARM: Allocation hints must make sure to be in the alloc order.

2013-02-19 18:55:36 +00:00

X86

Fix PR15267

2013-02-20 18:04:21 +00:00

XCore

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