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Lewis Revill
ef3be42de9
This allows arguments with the constraint A to be lowered to input nodes for RISC-V, which implies a memory address stored in a register. This patch adds the minimal amount of code required to get operands with the right constraints to compile. https://reviews.llvm.org/D54296 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369095 91177308-0d34-0410-b5e6-96231b3b80d8
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