Scott Michel f0569be4a9 - Remove Tilmann's custom truncate lowering: it completely hosed over ... DAGcombine's ability to find reasons to remove truncates when they were not needed. Consequently, the CellSPU backend would produce correct, but _really slow and horrible_, code. Replaced with instruction sequences that do the equivalent truncation in SPUInstrInfo.td. - Re-examine how unaligned loads and stores work. Generated unaligned load code has been tested on the CellSPU hardware; see the i32operations.c and i64operations.c in CodeGen/CellSPU/useful-harnesses. (While they may be toy test code, it does prove that some real world code does compile correctly.) - Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc fault because i64 ult is not yet implemented.) - Added i64 eq and neq for setcc and select/setcc; started new instruction information file for them in SPU64InstrInfo.td. Additional i64 operations should be added to this file and not to SPUInstrInfo.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61447 91177308-0d34-0410-b5e6-96231b3b80d8		2008-12-27 04:51:36 +00:00
..
Alpha	Correct some thinkos in the expansion of ADD/SUB	2008-11-12 08:23:26 +00:00
ARM	Clean up some ARM GV asm printing out; minor fixes to match what gcc does.	2008-12-06 02:00:55 +00:00
CBackend	Fix PR2907 by digging through constant expressions to find FP constants that	2008-10-22 04:53:16 +00:00
CellSPU	- Remove Tilmann's custom truncate lowering: it completely hosed over	2008-12-27 04:51:36 +00:00
CPP	Put CPPBackend tests into their own directory and run them only if they're	2008-07-10 22:35:32 +00:00
Generic	Revert the changes in this testcase until Anton can fix them.	2008-12-24 05:23:34 +00:00
IA64	sabre brings to my attention that the 'tr' suffix is also obsolete	2008-05-20 21:00:03 +00:00
Mips	Fix PR2667: add soft float support for sint_to_fp/uint_to_fp	2008-11-10 17:36:26 +00:00
PowerPC	Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this.	2008-12-19 20:58:01 +00:00
SPARC	Add testcase for 'r' inline asm operand	2008-10-10 20:28:59 +00:00
X86	add PR #	2008-12-25 05:40:38 +00:00
XCore	Add support for ISD::TRAP to the XCore backend	2008-12-03 10:59:16 +00:00