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llvm/test/MC/Disassembler
Javed Absar 5ad49e729c [AArch64] Update v8.5a MTE LDG/STG instructions
The latest MTE specification adds register Xt to the STG instruction family:
  STG [Xn, #offset] -> STG Xt, [Xn, #offset]
The tag written to memory is taken from Xt rather than Xn.
Also, the LDG instruction also was changed to read return address from Xt:
  LDG Xt, [Xn, #offset].
This patch includes those changes and tests.
Specification is at: https://developer.arm.com/docs/ddi0596/c
Differential Revision: https://reviews.llvm.org/D60188



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357583 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-03 14:12:13 +00:00
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