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https://github.com/RPCS3/rpcs3.git
synced 2026-10-11 22:49:55 +00:00
rsx: Fix flush predictor behavior when using surface cache targets for blit engine
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@@ -1829,6 +1829,7 @@ namespace rsx
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// Fake RTT cache hit
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dst_subres.surface = dst_surface;
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dst_subres.base_address = section_attr.address;
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dst_is_render_target = true;
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dest_texture = dst_surface->get_surface(rsx::surface_access::transfer_write);
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@@ -3798,16 +3799,17 @@ namespace rsx
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if (cached_dest)
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{
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result.real_dst_address = cached_dest->get_section_base();
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result.real_dst_size = cached_dest->get_section_size();
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result.dst_range = utils::address_range32::start_length(
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cached_dest->get_section_base(),
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cached_dest->get_section_size());
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}
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else
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{
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ensure(dst_is_render_target);
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dst_subres.surface->on_write_copy(rsx::get_shared_tag(), false, raster_type);
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result.real_dst_address = dst_base_address;
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result.real_dst_size = dst.pitch * dst_dimensions.height;
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// We use the full surface range here. Blit resources are always locked after writing regardless of WCB/WDB settings.
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result.dst_range = dst_subres.surface->get_memory_range();
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}
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return result;
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@@ -49,16 +49,10 @@ namespace rsx
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struct blit_op_result
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{
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bool succeeded = false;
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u32 real_dst_address = 0;
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u32 real_dst_size = 0;
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utils::address_range32 dst_range{};
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blit_op_result(bool success) : succeeded(success)
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{}
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inline address_range32 to_address_range() const
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{
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return address_range32::start_length(real_dst_address, real_dst_size);
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}
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};
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struct blit_target_properties
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@@ -945,9 +945,9 @@ namespace gl
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if (result.succeeded)
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{
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if (result.real_dst_size)
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if (result.dst_range.valid())
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{
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flush_if_cache_miss_likely(cmd, result.to_address_range());
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flush_if_cache_miss_likely(cmd, result.dst_range);
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}
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return true;
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@@ -1686,9 +1686,9 @@ namespace vk
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if (reply.succeeded)
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{
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if (reply.real_dst_size)
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if (reply.dst_range.valid())
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{
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flush_if_cache_miss_likely(cmd, reply.to_address_range());
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flush_if_cache_miss_likely(cmd, reply.dst_range);
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}
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return true;
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