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[InstCombine] allow (0 - x) & 1 --> x & 1 for vectors

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308098 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
2017-07-15 15:29:47 +00:00
parent 170e6bc8a4
commit e039298b16
2 changed files with 6 additions and 8 deletions
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11
lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
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@@ -1284,6 +1284,11 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
if (Value *V = SimplifyBSwap(I, Builder))
return replaceInstUsesWith(I, V);
// (0 - x) & 1 --> x & 1
Value *X;
if (match(Op1, m_One()) && match(Op0, m_Sub(m_Zero(), m_Value(X))))
return BinaryOperator::CreateAnd(X, Op1);
if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) {
const APInt &AndRHSMask = AndRHS->getValue();
@@ -1315,12 +1320,6 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
break;
}
case Instruction::Sub:
// -x & 1 -> x & 1
if (AndRHSMask.isOneValue() && match(Op0LHS, m_Zero()))
return BinaryOperator::CreateAnd(Op0RHS, AndRHS);
break;
case Instruction::Shl:
case Instruction::LShr:

3
test/Transforms/InstCombine/and2.ll
View File

@@ -98,8 +98,7 @@ define i64 @test9(i64 %x) {
; combine -x & 1 into x & 1
define <2 x i64> @test9vec(<2 x i64> %x) {
; CHECK-LABEL: @test9vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i64> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> [[SUB]], <i64 1, i64 1>
; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> %x, <i64 1, i64 1>
; CHECK-NEXT: ret <2 x i64> [[AND]]
;
%sub = sub nsw <2 x i64> <i64 0, i64 0>, %x