mirror of
https://github.com/RPCSX/xed.git
synced 2026-01-31 01:05:17 +01:00
94339eca9d
* decoder shows EIP if 67 used for rip rel in 64b mode.
looks nicer.
* encoder works with EIP (and emits 67) if used for encoding.
Change-Id: Ie3a63c7562c90ea8e48ac24e89d6ac5d8b20a1b8
466 lines
15 KiB
Plaintext
466 lines
15 KiB
Plaintext
#BEGIN_LEGAL
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#
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#Copyright (c) 2017 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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# Decoder ring
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# @ = null = invalid register
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# * = any valid register or value for this field
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# nothing = encode nothing in this case
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# error = cannot encode
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SEQUENCE MODRM_BIND
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SIB_REQUIRED_ENCODE_BIND()
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SIBSCALE_ENCODE_BIND()
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SIBINDEX_ENCODE_BIND()
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SIBBASE_ENCODE_BIND()
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MODRM_RM_ENCODE_BIND()
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MODRM_MOD_ENCODE_BIND()
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SEGMENT_DEFAULT_ENCODE_BIND()
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SEGMENT_ENCODE_BIND()
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SIB_NT_BIND() # FIXME 2007-06-30
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DISP_NT_BIND()
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SEQUENCE MODRM_EMIT
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#MODRM_NT_EMIT() # FIXME: 2007-06-30 the instruction will emit this as part of the INSTRUCTIONS NT
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SIB_NT_EMIT()
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DISP_NT_EMIT()
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SEGMENT_DEFAULT_ENCODE()::
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BASE0=rIPa() -> nothing # no segment for RIP/EIP
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BASE0=ArSP() -> default_ss # default to SS
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BASE0=ArBP() -> default_ss # default to SS
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BASE0=@ -> default_ds # default to DS -- baseless
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#
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BASE0=ArAX() -> default_ds # everything else defaults to DS
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BASE0=ArCX() -> default_ds
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BASE0=ArDX() -> default_ds
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BASE0=ArBX() -> default_ds
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BASE0=ArSI() -> default_ds
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BASE0=ArDI() -> default_ds
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BASE0=Ar8() -> default_ds
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BASE0=Ar9() -> default_ds
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BASE0=Ar10() -> default_ds
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BASE0=Ar11() -> default_ds
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BASE0=Ar12() -> default_ds
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BASE0=Ar13() -> default_ds
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BASE0=Ar14() -> default_ds
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BASE0=Ar15() -> default_ds
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SEGMENT_ENCODE()::
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default_ss SEG0=@ -> no_seg_prefix # was "nothing" 2007-0x08-0x14 # assume this is what the user wanted
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default_ss SEG0=XED_REG_CS -> cs_prefix
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default_ss SEG0=XED_REG_DS -> ds_prefix
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default_ss SEG0=XED_REG_SS -> no_seg_prefix # was "nothing" 2007-0x08-0x14 # matches default
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default_ss SEG0=XED_REG_ES -> es_prefix
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default_ss SEG0=XED_REG_FS -> fs_prefix
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default_ss SEG0=XED_REG_GS -> gs_prefix
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#
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default_ds SEG0=@ -> no_seg_prefix # was "nothing" 2007-0x08-0x14 # assume this is what the user wanted
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default_ds SEG0=XED_REG_CS -> cs_prefix
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default_ds SEG0=XED_REG_DS -> no_seg_prefix # was "nothing" 2007-0x08-0x14 # matches default
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default_ds SEG0=XED_REG_SS -> ss_prefix
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default_ds SEG0=XED_REG_ES -> es_prefix
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default_ds SEG0=XED_REG_FS -> fs_prefix
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default_ds SEG0=XED_REG_GS -> gs_prefix
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otherwise -> no_seg_prefix # was "nothing" 2007-0x08-0x14
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SIB_REQUIRED_ENCODE()::
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eamode32 INDEX=GPR32e() -> SIB=1
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eamode64 INDEX=GPR64e() -> SIB=1
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# base-less memop in 64b mode requires a SIB
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eamode64 BASE0=@ DISP_WIDTH=32 -> SIB=1
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eamode32 mode64 BASE0=@ DISP_WIDTH=32 -> SIB=1
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eamode32 mode16 -> nothing
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eamode32 mode32 -> nothing
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# Denote the need of a SIB byte if base is rSP or r12
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eanot16 BASE0=ArSP() -> SIB=1
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eanot16 BASE0=Ar12() -> SIB=1
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# When the displacement is omitted, we supply one for these r13 and rBP.
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#eanot16 BASE0=ArBP() DISP_WIDTH=0 -> SIB=1
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#eanot16 BASE0=Ar13() DISP_WIDTH=0 -> SIB=1
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otherwise -> nothing # FIXME: could set SIB=0
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SIBBASE_ENCODE()::
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SIB=0 -> nothing
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SIB=1 -> SIBBASE_ENCODE_SIB1()
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SIBBASE_ENCODE_SIB1()::
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BASE0=ArAX() -> SIBBASE=0 REXB=0
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BASE0=Ar8() -> SIBBASE=0 REXB=1
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BASE0=ArCX() -> SIBBASE=1 REXB=0
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BASE0=Ar9() -> SIBBASE=1 REXB=1
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BASE0=ArDX() -> SIBBASE=2 REXB=0
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BASE0=Ar10() -> SIBBASE=2 REXB=1
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BASE0=ArBX() -> SIBBASE=3 REXB=0
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BASE0=Ar11() -> SIBBASE=3 REXB=1
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BASE0=ArSP() -> SIBBASE=4 REXB=0
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BASE0=Ar12() -> SIBBASE=4 REXB=1
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# The mod values are really gotten by the MOD rule, only requiring one
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# addition.
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## BAD MODIFIES DISP! SIB=1 BASE0=@ DISP_WIDTH=8 -> SIBBASE=5 REXB=0 DISP_WIDTH=32 # MOD=0
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BASE0=@ -> DISP_WIDTH_32() SIBBASE=5 REXB=0 # MOD=0
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# The MOD rule handles the DISP arg modification for rBP and r13
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BASE0=ArBP() -> DISP_WIDTH_0_8_32() SIBBASE=5 REXB=0 # MOD=1 # ARG MODIFICATION LATER IN MOD RULE
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# SIB=1 BASE0=@ DISP_WIDTH=32 -> SIBBASE=5 REXB=0 # MOD=0 redundant with the above
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# The MOD rule handles the DISP arg modification for rBP and r13
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BASE0=Ar13() -> DISP_WIDTH_0_8_32() SIBBASE=5 REXB=1 # MOD=1 # ARG MODIFICATION LATER IN MOD RULE
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BASE0=ArSI() -> SIBBASE=6 REXB=0
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BASE0=Ar14() -> SIBBASE=6 REXB=1
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BASE0=ArDI() -> SIBBASE=7 REXB=0
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BASE0=Ar15() -> SIBBASE=7 REXB=1
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otherwise -> error # BASE0 was some other register
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SIBINDEX_ENCODE()::
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SIB=0 -> nothing
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SIB=1 -> SIBINDEX_ENCODE_SIB1()
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SIBINDEX_ENCODE_SIB1()::
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INDEX=ArAX() -> SIBINDEX=0 REXX=0
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INDEX=Ar8() -> SIBINDEX=0 REXX=1
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INDEX=ArCX() -> SIBINDEX=1 REXX=0
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INDEX=Ar9() -> SIBINDEX=1 REXX=1
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INDEX=ArDX() -> SIBINDEX=2 REXX=0
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INDEX=Ar10() -> SIBINDEX=2 REXX=1
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INDEX=ArBX() -> SIBINDEX=3 REXX=0
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INDEX=Ar11() -> SIBINDEX=3 REXX=1
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INDEX=@ -> SIBINDEX=4 REXX=0 # the "no index" option
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INDEX=Ar12() -> SIBINDEX=4 REXX=1
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INDEX=ArBP() -> SIBINDEX=5 REXX=0
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INDEX=Ar13() -> SIBINDEX=5 REXX=1
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INDEX=ArSI() -> SIBINDEX=6 REXX=0
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INDEX=Ar14() -> SIBINDEX=6 REXX=1
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INDEX=ArDI() -> SIBINDEX=7 REXX=0
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INDEX=Ar15() -> SIBINDEX=7 REXX=1
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otherwise -> error # INDEX was some other register
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SIBSCALE_ENCODE()::
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SIB=0 -> nothing
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SIB=1 SCALE=0 -> SIBSCALE=0 # this allows for default unset scales
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SIB=1 SCALE=1 -> SIBSCALE=0
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SIB=1 SCALE=2 -> SIBSCALE=1
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SIB=1 SCALE=4 -> SIBSCALE=2
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SIB=1 SCALE=8 -> SIBSCALE=3
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otherwise -> error # SCALE was some other value
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##############################################################################
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MODRM_MOD_ENCODE()::
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eamode16 DISP_WIDTH=0 -> MODRM_MOD_EA16_DISP0()
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eamode16 DISP_WIDTH=8 -> MODRM_MOD_EA16_DISP8()
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eamode16 DISP_WIDTH=16 -> MODRM_MOD_EA16_DISP16()
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eamode16 DISP_WIDTH=32 -> ERROR()
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eamode16 DISP_WIDTH=64 -> ERROR()
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eamode32 DISP_WIDTH=0 -> MODRM_MOD_EA32_DISP0()
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eamode32 DISP_WIDTH=8 -> MODRM_MOD_EA32_DISP8()
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eamode32 DISP_WIDTH=16 -> ERROR()
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eamode32 DISP_WIDTH=32 -> MODRM_MOD_EA32_DISP32()
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eamode32 DISP_WIDTH=64 -> ERROR()
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eamode64 DISP_WIDTH=0 -> MODRM_MOD_EA64_DISP0()
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eamode64 DISP_WIDTH=8 -> MODRM_MOD_EA64_DISP8()
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eamode64 DISP_WIDTH=16 -> ERROR()
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eamode64 DISP_WIDTH=32 -> MODRM_MOD_EA64_DISP32()
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eamode64 DISP_WIDTH=64 -> ERROR()
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##############################################################################
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#### EAMODE16
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##############################################################################
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MODRM_MOD_EA16_DISP0()::
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BASE0=XED_REG_BX INDEX=@ -> MOD=0
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BASE0=XED_REG_SI INDEX=@ -> MOD=0
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BASE0=XED_REG_DI INDEX=@ -> MOD=0
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BASE0=XED_REG_BP INDEX=@ -> MOD=1 DISP_WIDTH=8 DISP=0 # ARG MODIFICATION
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BASE0=XED_REG_BP INDEX=XED_REG_SI -> MOD=0
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BASE0=XED_REG_BP INDEX=XED_REG_DI -> MOD=0
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BASE0=XED_REG_BX INDEX=XED_REG_SI -> MOD=0
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BASE0=XED_REG_BX INDEX=XED_REG_DI -> MOD=0
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MODRM_MOD_EA16_DISP8()::
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BASE0=XED_REG_BX INDEX=@ -> MOD=1
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BASE0=XED_REG_SI INDEX=@ -> MOD=1
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BASE0=XED_REG_DI INDEX=@ -> MOD=1
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BASE0=XED_REG_BP INDEX=@ -> MOD=1
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BASE0=XED_REG_BP INDEX=XED_REG_SI -> MOD=1
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BASE0=XED_REG_BP INDEX=XED_REG_DI -> MOD=1
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BASE0=XED_REG_BX INDEX=XED_REG_SI -> MOD=1
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BASE0=XED_REG_BX INDEX=XED_REG_DI -> MOD=1
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MODRM_MOD_EA16_DISP16()::
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BASE0=@ INDEX=@ -> MOD=0
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BASE0=XED_REG_BX INDEX=@ -> MOD=2
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BASE0=XED_REG_SI INDEX=@ -> MOD=2
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BASE0=XED_REG_DI INDEX=@ -> MOD=2
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BASE0=XED_REG_BP INDEX=@ -> MOD=2
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BASE0=XED_REG_BP INDEX=XED_REG_SI -> MOD=2
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BASE0=XED_REG_BP INDEX=XED_REG_DI -> MOD=2
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BASE0=XED_REG_BX INDEX=XED_REG_SI -> MOD=2
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BASE0=XED_REG_BX INDEX=XED_REG_DI -> MOD=2
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##############################################################################
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#### EAMODE32
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##############################################################################
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MODRM_MOD_EA32_DISP0()::
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# Add a fake 1B displacement to rBP and r13 if they do not have one already.
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BASE0=XED_REG_EBP mode32 -> MOD=1 DISP_WIDTH=8 DISP=0 # ARG MODIFICATION
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BASE0=XED_REG_EBP mode64 -> MOD=1 DISP_WIDTH=8 DISP=0 # ARG MODIFICATION
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BASE0=XED_REG_R13D mode64 -> MOD=1 DISP_WIDTH=8 DISP=0 # ARG MODIFICATION
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# All these 32b and 64b base regs can handle no displacement
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BASE0=XED_REG_EAX mode32 -> MOD=0
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BASE0=XED_REG_EBX mode32 -> MOD=0
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BASE0=XED_REG_ECX mode32 -> MOD=0
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BASE0=XED_REG_EDX mode32 -> MOD=0
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BASE0=XED_REG_ESI mode32 -> MOD=0
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BASE0=XED_REG_EDI mode32 -> MOD=0
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BASE0=XED_REG_ESP mode32 -> MOD=0 # our choice to use MOD=0 (w/sib)
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BASE0=XED_REG_EAX mode64 -> MOD=0
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BASE0=XED_REG_EBX mode64 -> MOD=0
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BASE0=XED_REG_ECX mode64 -> MOD=0
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BASE0=XED_REG_EDX mode64 -> MOD=0
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BASE0=XED_REG_ESI mode64 -> MOD=0
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BASE0=XED_REG_EDI mode64 -> MOD=0
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BASE0=XED_REG_ESP mode64 -> MOD=0 # our choice to use MOD=0 (w/sib)
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BASE0=XED_REG_R8D mode64 -> MOD=0
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BASE0=XED_REG_R9D mode64 -> MOD=0
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BASE0=XED_REG_R10D mode64 -> MOD=0
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BASE0=XED_REG_R11D mode64 -> MOD=0
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BASE0=XED_REG_R12D mode64 -> MOD=0 # our choice to use MOD=0 (w/sib)
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BASE0=XED_REG_R14D mode64 -> MOD=0
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BASE0=XED_REG_R15D mode64 -> MOD=0
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MODRM_MOD_EA32_DISP8()::
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otherwise -> MOD=1 # might use SIB
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MODRM_MOD_EA32_DISP32()::
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BASE0=@ -> MOD=0 #no base (handles SIB=1 case)
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BASE0=GPR32e() -> MOD=2 #some base, not RIP, might use SIB
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BASE0=rIPa() mode64 -> MOD=0
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##############################################################################
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#### EAMODE64
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##############################################################################
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MODRM_MOD_EA64_DISP0()::
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BASE0=XED_REG_EIP -> MOD=0 DISP_WIDTH=32 DISP=0 # base eip
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BASE0=XED_REG_RIP -> MOD=0 DISP_WIDTH=32 DISP=0 # base rip
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BASE0=XED_REG_RBP -> MOD=1 DISP_WIDTH=8 DISP=0 # ARG MODIFICATION
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BASE0=XED_REG_R13 -> MOD=1 DISP_WIDTH=8 DISP=0 # ARG MODIFICATION
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BASE0=XED_REG_RAX -> MOD=0
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BASE0=XED_REG_RBX -> MOD=0
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BASE0=XED_REG_RCX -> MOD=0
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BASE0=XED_REG_RDX -> MOD=0
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BASE0=XED_REG_RSI -> MOD=0
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BASE0=XED_REG_RDI -> MOD=0
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BASE0=XED_REG_RSP -> MOD=0
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BASE0=XED_REG_R8 -> MOD=0
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BASE0=XED_REG_R9 -> MOD=0
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BASE0=XED_REG_R10 -> MOD=0
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BASE0=XED_REG_R11 -> MOD=0
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BASE0=XED_REG_R12 -> MOD=0
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BASE0=XED_REG_R14 -> MOD=0
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BASE0=XED_REG_R15 -> MOD=0
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MODRM_MOD_EA64_DISP8()::
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BASE0=GPR64e() -> MOD=1
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MODRM_MOD_EA64_DISP32()::
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BASE0=@ -> MOD=0 #no base, SIB=1 required (provided elsewhere)
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BASE0=XED_REG_EIP -> MOD=0 #base eip
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BASE0=XED_REG_RIP -> MOD=0 #base rip
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BASE0=XED_REG_RAX -> MOD=2
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BASE0=XED_REG_RBX -> MOD=2
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BASE0=XED_REG_RCX -> MOD=2
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BASE0=XED_REG_RDX -> MOD=2
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BASE0=XED_REG_RSI -> MOD=2
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BASE0=XED_REG_RDI -> MOD=2
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BASE0=XED_REG_RSP -> MOD=2 # SIB=1 required (and is provided elsewhere)
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BASE0=XED_REG_RBP -> MOD=2
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BASE0=XED_REG_R8 -> MOD=2
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BASE0=XED_REG_R9 -> MOD=2
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BASE0=XED_REG_R10 -> MOD=2
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BASE0=XED_REG_R11 -> MOD=2
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BASE0=XED_REG_R12 -> MOD=2 # SIB=1 required (and is provided elsewhere)
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BASE0=XED_REG_R13 -> MOD=2
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BASE0=XED_REG_R14 -> MOD=2
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BASE0=XED_REG_R15 -> MOD=2
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########################################################################################################
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#If we didn't already encode the base in the SIB!
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MODRM_RM_ENCODE()::
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eamode16 SIB=0 -> MODRM_RM_ENCODE_EA16_SIB0()
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eamode32 SIB=0 -> MODRM_RM_ENCODE_EA32_SIB0()
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eamode64 SIB=0 -> MODRM_RM_ENCODE_EA64_SIB0()
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eanot16 SIB=1 -> MODRM_RM_ENCODE_EANOT16_SIB1()
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#############################################
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MODRM_RM_ENCODE_EA16_SIB0()::
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BASE0=XED_REG_BX INDEX=XED_REG_SI -> RM=0
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BASE0=XED_REG_BX INDEX=XED_REG_DI -> RM=1
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BASE0=XED_REG_BP INDEX=XED_REG_SI -> RM=2
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BASE0=XED_REG_BP INDEX=XED_REG_DI -> RM=3
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BASE0=XED_REG_SI INDEX=@ -> RM=4
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BASE0=XED_REG_DI INDEX=@ -> RM=5
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BASE0=@ INDEX=@ -> DISP_WIDTH_16() RM=6
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# for BP without an index, we add an imm8=0 when encoding the MOD
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BASE0=XED_REG_BP INDEX=@ -> DISP_WIDTH_0_8_16() RM=6
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BASE0=XED_REG_BX INDEX=@ -> RM=7
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MODRM_RM_ENCODE_EA64_SIB0()::
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BASE0=XED_REG_RAX -> RM=0 REXB=0
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BASE0=XED_REG_R8 -> RM=0 REXB=1
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BASE0=XED_REG_RCX -> RM=1 REXB=0
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BASE0=XED_REG_R9 -> RM=1 REXB=1
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BASE0=XED_REG_RDX -> RM=2 REXB=0
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BASE0=XED_REG_R10 -> RM=2 REXB=1
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BASE0=XED_REG_RBX -> RM=3 REXB=0
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BASE0=XED_REG_R11 -> RM=3 REXB=1
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BASE0=XED_REG_RSI -> RM=6 REXB=0
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BASE0=XED_REG_R14 -> RM=6 REXB=1
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BASE0=XED_REG_RDI -> RM=7 REXB=0
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BASE0=XED_REG_R15 -> RM=7 REXB=1
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# case RM=5 is tricky. The mode,base and disp width play a role
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BASE0=@ -> DISP_WIDTH_32() RM=5 # not setting REXB FIXME?
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# for rBP without a disp, we add a 1B disp so MOD will be 1
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BASE0=XED_REG_RBP -> DISP_WIDTH_0_8_32() RM=5 REXB=0
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# When we do the MOD encoding, we fix the displacement at 4B.
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BASE0=XED_REG_RIP -> RM=5 # not setting REXB FIXME?
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BASE0=XED_REG_EIP -> RM=5 # not setting REXB FIXME?
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# for r13 without a disp, we add a 1B disp so MOD will be 1
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BASE0=XED_REG_R13 -> DISP_WIDTH_0_8_32() RM=5 REXB=1
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MODRM_RM_ENCODE_EA32_SIB0()::
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BASE0=XED_REG_EAX -> RM=0 REXB=0
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BASE0=XED_REG_R8D -> RM=0 REXB=1
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BASE0=XED_REG_ECX -> RM=1 REXB=0
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BASE0=XED_REG_R9D -> RM=1 REXB=1
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BASE0=XED_REG_EDX -> RM=2 REXB=0
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BASE0=XED_REG_R10D -> RM=2 REXB=1
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BASE0=XED_REG_EBX -> RM=3 REXB=0
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BASE0=XED_REG_R11D -> RM=3 REXB=1
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BASE0=XED_REG_ESI -> RM=6 REXB=0
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BASE0=XED_REG_R14D -> RM=6 REXB=1
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BASE0=XED_REG_EDI -> RM=7 REXB=0
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BASE0=XED_REG_R15D -> RM=7 REXB=1
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# case RM=5 is tricky. The mode,base and disp width play a role
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BASE0=@ -> DISP_WIDTH_32() RM=5 # not setting REXB FIXME?
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# for rBP without a disp, we add a 1B disp so MOD will be 1
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BASE0=XED_REG_EBP -> DISP_WIDTH_0_8_32() RM=5 REXB=0
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# for r13 without a disp, we add a 1B disp so MOD will be 1
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BASE0=XED_REG_R13D -> DISP_WIDTH_0_8_32() RM=5 REXB=1
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BASE0=XED_REG_RIP mode64 -> RM=5
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BASE0=XED_REG_EIP mode64 -> RM=5
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MODRM_RM_ENCODE_EANOT16_SIB1()::
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otherwise -> RM=4 # SIB will specify the REXB etc.
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#############################################
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# These are good, seemingly:
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# FIXME: these are semi-redundant with field bindings that I need for decode.
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# I was thinking about using something like:
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# MODRM[mm,rrr,nnn] & SIB[ss,iii,bbb]
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# coupled with:
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# MODRM = (MOD,2), (REG,3), (RM,3)
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# SIB = (SIBSCALE,2), (SIBINDEX,3), (SIBBASE,3)
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#FIXME: don't require =*???
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#FIXME: handle "nothing" option
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## SIB_EMIT()::
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## SIB=1 SIBBASE[bbb]=* SIBSCALE[ss]=* SIBINDEX[iii]=* -> ss_iii_bbb
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## SIB=0 -> nothing
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##
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## MODRM_EMIT()::
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## MODRM=1 MOD[xx]=* REG[rrr]=* RM[mmm]=* -> xx_rrr_mmm
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## MODRM=0 -> nothing
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# ... OR ...
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SIB_NT()::
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SIB=1 SIBBASE[bbb] SIBSCALE[ss] SIBINDEX[iii] -> ss_iii_bbb
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SIB=0 -> nothing
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# 2 bytes storage
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DISP_NT()::
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|
#DISP_WIDTH=0 -> nothing
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DISP_WIDTH=8 DISP[d/8] -> d/8
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DISP_WIDTH=16 DISP[d/16] -> d/16
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DISP_WIDTH=32 DISP[d/32] -> d/32
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DISP_WIDTH=64 DISP[d/64] -> d/64
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otherwise -> nothing
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ERROR()::
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otherwise -> ERROR=XED_ERROR_GENERAL_ERROR
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DISP_WIDTH_0()::
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DISP_WIDTH=0 -> nothing
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DISP_WIDTH_8()::
|
|
DISP_WIDTH=8 -> nothing
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DISP_WIDTH_16()::
|
|
DISP_WIDTH=16 -> nothing
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DISP_WIDTH_32()::
|
|
DISP_WIDTH=32 -> nothing
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DISP_WIDTH_0_8_16()::
|
|
DISP_WIDTH=0 -> nothing
|
|
DISP_WIDTH=8 -> nothing
|
|
DISP_WIDTH=16 -> nothing
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DISP_WIDTH_0_8_32()::
|
|
DISP_WIDTH=0 -> nothing
|
|
DISP_WIDTH=8 -> nothing
|
|
DISP_WIDTH=32 -> nothing
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