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llvm/test/CodeGen/ARM/sat-arith.ll

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Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s -check-prefix=ARM -check-prefix=CHECK
; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s -check-prefix=THUMB -check-prefix=CHECK
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
; CHECK-LABEL: qadd
define i32 @qadd() nounwind {
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
%tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
ret i32 %tmp
}
; CHECK-LABEL: qsub
define i32 @qsub() nounwind {
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
; CHECK-ARM: qsub [[R0]], [[R1]], [[R0]]
; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
%tmp = call i32 @llvm.arm.qsub(i32 128, i32 8)
ret i32 %tmp
}
; upper-bound of the immediate argument
; CHECK-LABEL: ssat1
define i32 @ssat1() nounwind {
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; CHECK: mov{{s?}} [[R0:.*]], #128
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
; CHECK: ssat [[R1:.*]], #32, [[R0]]
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 32)
ret i32 %tmp
}
; lower-bound of the immediate argument
; CHECK-LABEL: ssat2
define i32 @ssat2() nounwind {
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; CHECK: mov{{s?}} [[R0:.*]], #128
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
; CHECK: ssat [[R1:.*]], #1, [[R0]]
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
ret i32 %tmp
}
; upper-bound of the immediate argument
; CHECK-LABEL: usat1
define i32 @usat1() nounwind {
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; CHECK: mov{{s?}} [[R0:.*]], #128
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
; CHECK: usat [[R1:.*]], #31, [[R0]]
%tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
ret i32 %tmp
}
; lower-bound of the immediate argument
; CHECK-LABEL: usat2
define i32 @usat2() nounwind {
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2 Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-20 06:41:44 +00:00
; CHECK: mov{{s?}} [[R0:.*]], #128
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250697 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-19 11:44:24 +00:00
; CHECK: usat [[R1:.*]], #0, [[R0]]
%tmp = call i32 @llvm.arm.usat(i32 128, i32 0)
ret i32 %tmp
}
declare i32 @llvm.arm.qadd(i32, i32) nounwind
declare i32 @llvm.arm.qsub(i32, i32) nounwind
declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
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