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wire up 64-bit MCCodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95438 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -50,7 +50,8 @@ FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
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JITCodeEmitter &JCE);
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MCCodeEmitter *createHeinousX86MCCodeEmitter(const Target &, TargetMachine &TM);
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MCCodeEmitter *createX86MCCodeEmitter(const Target &, TargetMachine &TM);
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MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM);
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MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM);
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/// createX86EmitCodeToMemory - Returns a pass that converts a register
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/// allocated function into raw machine code in a dynamically
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@ -1117,8 +1117,11 @@ MCCodeEmitter *llvm::createHeinousX86MCCodeEmitter(const Target &T,
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TargetMachine &TM) {
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// FIXME: Remove the heinous one when the new one works.
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if (EnableNewEncoder)
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return createX86MCCodeEmitter(T, TM);
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if (EnableNewEncoder) {
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if (TM.getTargetData()->getPointerSize() == 4)
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return createX86_32MCCodeEmitter(T, TM);
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return createX86_64MCCodeEmitter(T, TM);
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}
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return new X86MCCodeEmitter(static_cast<X86TargetMachine&>(TM));
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}
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@ -27,10 +27,9 @@ class X86MCCodeEmitter : public MCCodeEmitter {
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const TargetInstrInfo &TII;
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bool Is64BitMode;
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public:
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X86MCCodeEmitter(TargetMachine &tm)
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X86MCCodeEmitter(TargetMachine &tm, bool is64Bit)
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: TM(tm), TII(*TM.getInstrInfo()) {
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// FIXME: Get this from the right place.
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Is64BitMode = false;
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Is64BitMode = is64Bit;
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}
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~X86MCCodeEmitter() {}
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@ -83,9 +82,14 @@ public:
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} // end anonymous namespace
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MCCodeEmitter *llvm::createX86MCCodeEmitter(const Target &,
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TargetMachine &TM) {
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return new X86MCCodeEmitter(TM);
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MCCodeEmitter *llvm::createX86_32MCCodeEmitter(const Target &,
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TargetMachine &TM) {
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return new X86MCCodeEmitter(TM, false);
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}
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MCCodeEmitter *llvm::createX86_64MCCodeEmitter(const Target &,
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TargetMachine &TM) {
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return new X86MCCodeEmitter(TM, true);
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}
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