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* Removed extraneous #includes

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* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3278 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-08-09 20:08:06 +00:00
parent 179cdfb5c8
commit 035dfbe7f2
12 changed files with 65 additions and 161 deletions
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30
include/llvm/Target/TargetFrameInfo.h
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@ -1,14 +1,8 @@
// $Id$ -*-c++-*- //===-- llvm/CodeGen/MachineFrameInfo.h -------------------------*- C++ -*-===//
//*************************************************************************** //
// File: // Interface to layout of stack frame on target machine.
// MachineFrameInfo.h //
// //===----------------------------------------------------------------------===//
// Purpose:
// Interface to layout of stack frame on target machine.
//
// History:
// 11/6/01 - Vikram Adve - Created
//**************************************************************************/
#ifndef LLVM_CODEGEN_FRAMEINFO_H #ifndef LLVM_CODEGEN_FRAMEINFO_H
#define LLVM_CODEGEN_FRAMEINFO_H #define LLVM_CODEGEN_FRAMEINFO_H
@ -16,22 +10,14 @@
#include "Support/NonCopyable.h" #include "Support/NonCopyable.h"
#include <vector> #include <vector>
//************************* Forward Declarations **************************/
class MachineCodeForMethod; class MachineCodeForMethod;
class TargetMachine; class TargetMachine;
struct MachineFrameInfo : public NonCopyableV {
//*************************** External Classes ****************************/ const TargetMachine &target;
class MachineFrameInfo : public NonCopyableV {
public:
const TargetMachine& target;
public: public:
/*ctor*/ MachineFrameInfo(const TargetMachine& tgt) : target(tgt) {} MachineFrameInfo(const TargetMachine& tgt) : target(tgt) {}
// //
// These methods provide constant parameters of the frame layout. // These methods provide constant parameters of the frame layout.

19
lib/CodeGen/InstrSelection/InstrForest.cpp
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@ -1,12 +1,5 @@
// $Id$ //===-- InstrForest.cpp - Build instruction forest for inst selection -----===//
//--------------------------------------------------------------------------- //
// File:
// InstrForest.cpp
//
// Purpose:
// Convert SSA graph to instruction trees for instruction selection.
//
// Strategy:
// The key goal is to group instructions into a single // The key goal is to group instructions into a single
// tree if one or more of them might be potentially combined into a single // tree if one or more of them might be potentially combined into a single
// complex instruction in the target machine. // complex instruction in the target machine.
@ -17,7 +10,7 @@
// and (2) O and I are part of the same basic block, // and (2) O and I are part of the same basic block,
// and (3) O has only a single use, viz., I. // and (3) O has only a single use, viz., I.
// //
//--------------------------------------------------------------------------- //===----------------------------------------------------------------------===//
#include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/InstrForest.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineCodeForInstruction.h"
@ -28,8 +21,6 @@
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "Support/STLExtras.h" #include "Support/STLExtras.h"
#include <alloca.h>
#include <iostream>
using std::cerr; using std::cerr;
using std::vector; using std::vector;
@ -127,10 +118,10 @@ InstructionNode::dumpNode(int indent) const
const MachineCodeForInstruction &mvec = const MachineCodeForInstruction &mvec =
MachineCodeForInstruction::get(getInstruction()); MachineCodeForInstruction::get(getInstruction());
if (mvec.size() > 0) if (!mvec.empty())
cerr << "\tMachine Instructions: "; cerr << "\tMachine Instructions: ";
for (unsigned int i=0; i < mvec.size(); ++i) { for (unsigned i = 0; i < mvec.size(); ++i) {
mvec[i]->dump(); mvec[i]->dump();
if (i < mvec.size() - 1) if (i < mvec.size() - 1)
cerr << "; "; cerr << "; ";

16
lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
View File

@ -1,14 +1,9 @@
//*************************************************************************** //===-- InstrSelectionSupport.cpp -----------------------------------------===//
// File: //
// InstrSelectionSupport.h // Target-independent instruction selection code. See SparcInstrSelection.cpp
// for usage.
// //
// Purpose: //===----------------------------------------------------------------------===//
// Target-independent instruction selection code.
// See SparcInstrSelection.cpp for usage.
//
// History:
// 10/10/01 - Vikram Adve - Created
//**************************************************************************/
#include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrSelectionSupport.h"
#include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/InstrSelection.h"
@ -21,7 +16,6 @@
#include "llvm/Target/MachineRegInfo.h" #include "llvm/Target/MachineRegInfo.h"
#include "llvm/Constants.h" #include "llvm/Constants.h"
#include "llvm/Function.h" #include "llvm/Function.h"
#include "llvm/BasicBlock.h"
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/iMemory.h" #include "llvm/iMemory.h"
using std::vector; using std::vector;

17
lib/CodeGen/MachineInstr.cpp
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@ -1,25 +1,12 @@
// $Id$ //===-- MachineInstr.cpp --------------------------------------------------===//
//***************************************************************************
// File:
// MachineInstr.cpp
// //
// Purpose: //===----------------------------------------------------------------------===//
//
//
// Strategy:
//
// History:
// 7/2/01 - Vikram Adve - Created
//**************************************************************************/
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Value.h" #include "llvm/Value.h"
#include <iostream>
using std::cerr; using std::cerr;
//************************ Class Implementations **************************/
// Constructor for instructions with fixed #operands (nearly all) // Constructor for instructions with fixed #operands (nearly all)
MachineInstr::MachineInstr(MachineOpCode _opCode, MachineInstr::MachineInstr(MachineOpCode _opCode,
OpCodeMask _opCodeMask) OpCodeMask _opCodeMask)

15
lib/CodeGen/MachineInstrAnnot.cpp
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@ -1,20 +1,13 @@
// $Id$ -*-c++-*- //===-- MachineInstrAnnot.cpp ---------------------------------------------===//
//***************************************************************************
// File:
// MachineInstrAnnot.cpp
// //
// Purpose: // This file defines Annotations used to pass information between code
// Annotations used to pass information between code generation phases. // generation phases.
// //
// History: //===----------------------------------------------------------------------===//
// 5/10/02 - Vikram Adve - Created
//**************************************************************************/
#include "llvm/CodeGen/MachineInstrAnnot.h" #include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/Annotation.h" #include "llvm/Annotation.h"
#include "llvm/iOther.h" #include "llvm/iOther.h"
#include <vector>
AnnotationID CallArgsDescriptor::AID(AnnotationManager:: AnnotationID CallArgsDescriptor::AID(AnnotationManager::
getID("CodeGen::CallArgsDescriptor")); getID("CodeGen::CallArgsDescriptor"));

19
lib/Target/SparcV9/InstrSelection/InstrForest.cpp
View File

@ -1,12 +1,5 @@
// $Id$ //===-- InstrForest.cpp - Build instruction forest for inst selection -----===//
//--------------------------------------------------------------------------- //
// File:
// InstrForest.cpp
//
// Purpose:
// Convert SSA graph to instruction trees for instruction selection.
//
// Strategy:
// The key goal is to group instructions into a single // The key goal is to group instructions into a single
// tree if one or more of them might be potentially combined into a single // tree if one or more of them might be potentially combined into a single
// complex instruction in the target machine. // complex instruction in the target machine.
@ -17,7 +10,7 @@
// and (2) O and I are part of the same basic block, // and (2) O and I are part of the same basic block,
// and (3) O has only a single use, viz., I. // and (3) O has only a single use, viz., I.
// //
//--------------------------------------------------------------------------- //===----------------------------------------------------------------------===//
#include "llvm/CodeGen/InstrForest.h" #include "llvm/CodeGen/InstrForest.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineCodeForInstruction.h"
@ -28,8 +21,6 @@
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "Support/STLExtras.h" #include "Support/STLExtras.h"
#include <alloca.h>
#include <iostream>
using std::cerr; using std::cerr;
using std::vector; using std::vector;
@ -127,10 +118,10 @@ InstructionNode::dumpNode(int indent) const
const MachineCodeForInstruction &mvec = const MachineCodeForInstruction &mvec =
MachineCodeForInstruction::get(getInstruction()); MachineCodeForInstruction::get(getInstruction());
if (mvec.size() > 0) if (!mvec.empty())
cerr << "\tMachine Instructions: "; cerr << "\tMachine Instructions: ";
for (unsigned int i=0; i < mvec.size(); ++i) { for (unsigned i = 0; i < mvec.size(); ++i) {
mvec[i]->dump(); mvec[i]->dump();
if (i < mvec.size() - 1) if (i < mvec.size() - 1)
cerr << "; "; cerr << "; ";

16
lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
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@ -1,14 +1,9 @@
//*************************************************************************** //===-- InstrSelectionSupport.cpp -----------------------------------------===//
// File: //
// InstrSelectionSupport.h // Target-independent instruction selection code. See SparcInstrSelection.cpp
// for usage.
// //
// Purpose: //===----------------------------------------------------------------------===//
// Target-independent instruction selection code.
// See SparcInstrSelection.cpp for usage.
//
// History:
// 10/10/01 - Vikram Adve - Created
//**************************************************************************/
#include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrSelectionSupport.h"
#include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/InstrSelection.h"
@ -21,7 +16,6 @@
#include "llvm/Target/MachineRegInfo.h" #include "llvm/Target/MachineRegInfo.h"
#include "llvm/Constants.h" #include "llvm/Constants.h"
#include "llvm/Function.h" #include "llvm/Function.h"
#include "llvm/BasicBlock.h"
#include "llvm/Type.h" #include "llvm/Type.h"
#include "llvm/iMemory.h" #include "llvm/iMemory.h"
using std::vector; using std::vector;

40
lib/Target/SparcV9/SparcV9InstrInfo.cpp
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@ -1,30 +1,18 @@
//*************************************************************************** //===-- SparcInstrInfo.cpp ------------------------------------------------===//
// File: //
// SparcInstrInfo.cpp //===----------------------------------------------------------------------===//
//
// Purpose:
//
// History:
// 10/15/01 - Vikram Adve - Created
//**************************************************************************/
#include "SparcInternals.h" #include "SparcInternals.h"
#include "SparcInstrSelectionSupport.h" #include "SparcInstrSelectionSupport.h"
#include "llvm/Target/Sparc.h"
#include "llvm/CodeGen/InstrSelection.h" #include "llvm/CodeGen/InstrSelection.h"
#include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrSelectionSupport.h"
#include "llvm/CodeGen/MachineCodeForMethod.h" #include "llvm/CodeGen/MachineCodeForMethod.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/Function.h" #include "llvm/Function.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h"
#include "llvm/Constants.h" #include "llvm/Constants.h"
#include "llvm/DerivedTypes.h" #include "llvm/DerivedTypes.h"
using std::vector; using std::vector;
//************************ Internal Functions ******************************/
static const uint32_t MAXLO = (1 << 10) - 1; // set bits set by %lo(*) static const uint32_t MAXLO = (1 << 10) - 1; // set bits set by %lo(*)
static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
@ -33,7 +21,7 @@ static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
// //
static inline void static inline void
CreateSETUWConst(const TargetMachine& target, uint32_t C, CreateSETUWConst(const TargetMachine& target, uint32_t C,
Instruction* dest, std::vector<MachineInstr*>& mvec) Instruction* dest, vector<MachineInstr*>& mvec)
{ {
MachineInstr *miSETHI = NULL, *miOR = NULL; MachineInstr *miSETHI = NULL, *miOR = NULL;
@ -81,7 +69,7 @@ CreateSETUWConst(const TargetMachine& target, uint32_t C,
// Not needed for SPARC v9 but useful to make the two SETX functions similar // Not needed for SPARC v9 but useful to make the two SETX functions similar
static inline void static inline void
CreateSETUWLabel(const TargetMachine& target, Value* val, CreateSETUWLabel(const TargetMachine& target, Value* val,
Instruction* dest, std::vector<MachineInstr*>& mvec) Instruction* dest, vector<MachineInstr*>& mvec)
{ {
MachineInstr* MI; MachineInstr* MI;
@ -101,7 +89,7 @@ CreateSETUWLabel(const TargetMachine& target, Value* val,
// with sign-extension to 64 bits. // with sign-extension to 64 bits.
static inline void static inline void
CreateSETSWConst(const TargetMachine& target, int32_t C, CreateSETSWConst(const TargetMachine& target, int32_t C,
Instruction* dest, std::vector<MachineInstr*>& mvec) Instruction* dest, vector<MachineInstr*>& mvec)
{ {
MachineInstr* MI; MachineInstr* MI;
@ -121,7 +109,7 @@ CreateSETSWConst(const TargetMachine& target, int32_t C,
static inline void static inline void
CreateSETXConst(const TargetMachine& target, uint64_t C, CreateSETXConst(const TargetMachine& target, uint64_t C,
Instruction* tmpReg, Instruction* dest, Instruction* tmpReg, Instruction* dest,
std::vector<MachineInstr*>& mvec) vector<MachineInstr*>& mvec)
{ {
assert(C > (unsigned int) ~0 && "Use SETUW/SETSW for 32-bit values!"); assert(C > (unsigned int) ~0 && "Use SETUW/SETSW for 32-bit values!");
@ -147,7 +135,7 @@ CreateSETXConst(const TargetMachine& target, uint64_t C,
static inline void static inline void
CreateSETXLabel(const TargetMachine& target, CreateSETXLabel(const TargetMachine& target,
Value* val, Instruction* tmpReg, Instruction* dest, Value* val, Instruction* tmpReg, Instruction* dest,
std::vector<MachineInstr*>& mvec) vector<MachineInstr*>& mvec)
{ {
assert(isa<Constant>(val) || isa<GlobalValue>(val) && assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
"I only know about constant values and global addresses"); "I only know about constant values and global addresses");
@ -181,7 +169,7 @@ CreateSETXLabel(const TargetMachine& target,
static inline void static inline void
CreateIntSetInstruction(const TargetMachine& target, CreateIntSetInstruction(const TargetMachine& target,
int64_t C, Instruction* dest, int64_t C, Instruction* dest,
std::vector<MachineInstr*>& mvec, vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) MachineCodeForInstruction& mcfi)
{ {
assert(dest->getType()->isSigned() && "Use CreateUIntSetInstruction()"); assert(dest->getType()->isSigned() && "Use CreateUIntSetInstruction()");
@ -201,7 +189,7 @@ CreateIntSetInstruction(const TargetMachine& target,
static inline void static inline void
CreateUIntSetInstruction(const TargetMachine& target, CreateUIntSetInstruction(const TargetMachine& target,
uint64_t C, Instruction* dest, uint64_t C, Instruction* dest,
std::vector<MachineInstr*>& mvec, vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) MachineCodeForInstruction& mcfi)
{ {
assert(! dest->getType()->isSigned() && "Use CreateIntSetInstruction()"); assert(! dest->getType()->isSigned() && "Use CreateIntSetInstruction()");
@ -219,7 +207,7 @@ CreateUIntSetInstruction(const TargetMachine& target,
} }
//************************* External Classes *******************************/
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
// class UltraSparcInstrInfo // class UltraSparcInstrInfo
@ -252,7 +240,7 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
Function* F, Function* F,
Value* val, Value* val,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& mvec, vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) const MachineCodeForInstruction& mcfi) const
{ {
assert(isa<Constant>(val) || isa<GlobalValue>(val) && assert(isa<Constant>(val) || isa<GlobalValue>(val) &&
@ -333,7 +321,7 @@ UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
Function* F, Function* F,
Value* val, Value* val,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& mvec, vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) const MachineCodeForInstruction& mcfi) const
{ {
assert((val->getType()->isIntegral() || isa<PointerType>(val->getType())) assert((val->getType()->isIntegral() || isa<PointerType>(val->getType()))
@ -378,7 +366,7 @@ UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
Function* F, Function* F,
Value* val, Value* val,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& mvec, vector<MachineInstr*>& mvec,
MachineCodeForInstruction& mcfi) const MachineCodeForInstruction& mcfi) const
{ {
const Type* opTy = val->getType(); const Type* opTy = val->getType();

17
lib/Target/SparcV9/SparcV9InstrSelection.cpp
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@ -1,14 +1,8 @@
// $Id$ //===-- SparcInstrSelection.cpp -------------------------------------------===//
//*************************************************************************** //
// File: // BURS instruction selection for SPARC V9 architecture.
// SparcInstrSelection.cpp //
// //===----------------------------------------------------------------------===//
// Purpose:
// BURS instruction selection for SPARC V9 architecture.
//
// History:
// 7/02/01 - Vikram Adve - Created
//**************************************************************************/
#include "SparcInternals.h" #include "SparcInternals.h"
#include "SparcInstrSelectionSupport.h" #include "SparcInstrSelectionSupport.h"
@ -24,7 +18,6 @@
#include "llvm/iTerminators.h" #include "llvm/iTerminators.h"
#include "llvm/iMemory.h" #include "llvm/iMemory.h"
#include "llvm/iOther.h" #include "llvm/iOther.h"
#include "llvm/BasicBlock.h"
#include "llvm/Function.h" #include "llvm/Function.h"
#include "llvm/Constants.h" #include "llvm/Constants.h"
#include "Support/MathExtras.h" #include "Support/MathExtras.h"

17
lib/Target/SparcV9/SparcV9InstrSelectionSupport.h
View File

@ -1,19 +1,13 @@
// $Id$ -*-c++-*- //===-- llvm/CodeGen/SparcInstrSelectionSupport.h ---------------*- C++ -*-===//
//*************************************************************************** //
// File: //
// SparcInstrSelectionSupport.h //
// //===----------------------------------------------------------------------===//
// Purpose:
//
// History:
// 10/17/01 - Vikram Adve - Created
//**************************************************************************/
#ifndef SPARC_INSTR_SELECTION_SUPPORT_h #ifndef SPARC_INSTR_SELECTION_SUPPORT_h
#define SPARC_INSTR_SELECTION_SUPPORT_h #define SPARC_INSTR_SELECTION_SUPPORT_h
#include "llvm/DerivedTypes.h" #include "llvm/DerivedTypes.h"
#include "llvm/Value.h"
inline MachineOpCode inline MachineOpCode
ChooseLoadInstruction(const Type *DestTy) ChooseLoadInstruction(const Type *DestTy)
@ -37,7 +31,6 @@ ChooseLoadInstruction(const Type *DestTy)
return 0; return 0;
} }
inline MachineOpCode inline MachineOpCode
ChooseStoreInstruction(const Type *DestTy) ChooseStoreInstruction(const Type *DestTy)
{ {

18
lib/Target/SparcV9/SparcV9Internals.h
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@ -1,12 +1,9 @@
//*************************************************************************** //===-- SparcInternals.h ----------------------------------------*- C++ -*-===//
// File:
// SparcInternals.h
// //
// Purpose: // This file defines stuff that is to be private to the Sparc backend, but is
// This file defines stuff that is to be private to the Sparc // shared among different portions of the backend.
// backend, but is shared among different portions of the backend. //
//**************************************************************************/ //===----------------------------------------------------------------------===//
#ifndef SPARC_INTERNALS_H #ifndef SPARC_INTERNALS_H
#define SPARC_INTERNALS_H #define SPARC_INTERNALS_H
@ -86,9 +83,8 @@ extern const MachineInstrDescriptor SparcMachineInstrDesc[];
// default to member functions in base class MachineInstrInfo. // default to member functions in base class MachineInstrInfo.
//--------------------------------------------------------------------------- //---------------------------------------------------------------------------
class UltraSparcInstrInfo : public MachineInstrInfo { struct UltraSparcInstrInfo : public MachineInstrInfo {
public: UltraSparcInstrInfo(const TargetMachine& tgt);
/*ctor*/ UltraSparcInstrInfo(const TargetMachine& tgt);
// //
// All immediate constants are in position 1 except the // All immediate constants are in position 1 except the

2
lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
View File

@ -18,8 +18,6 @@
#include "llvm/CodeGen/InstrSelectionSupport.h" #include "llvm/CodeGen/InstrSelectionSupport.h"
#include "llvm/Pass.h" #include "llvm/Pass.h"
#include "llvm/Function.h" #include "llvm/Function.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h"
namespace { namespace {
class InsertPrologEpilogCode : public FunctionPass { class InsertPrologEpilogCode : public FunctionPass {