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AMDGPU: Formatting fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295783 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1533,11 +1533,12 @@ static bool setM0ToIndexFromSGPR(const SIInstrInfo *TII,
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}
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}
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if (Offset == 0) {
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if (Offset == 0) {
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BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0).add(*Idx);
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BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)
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.add(*Idx);
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} else {
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} else {
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BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)
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BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)
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.add(*Idx)
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.add(*Idx)
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.addImm(Offset);
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.addImm(Offset);
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}
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}
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return true;
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return true;
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@ -2872,7 +2873,7 @@ SDValue SITargetLowering::LowerINTRINSIC_VOID(SDValue Op,
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unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
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unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
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switch (IntrinsicID) {
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switch (IntrinsicID) {
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case Intrinsic::amdgcn_exp: {
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case Intrinsic::amdgcn_exp: {
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const ConstantSDNode *Tgt = cast<ConstantSDNode>(Op.getOperand(2));
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const ConstantSDNode *Tgt = cast<ConstantSDNode>(Op.getOperand(2));
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const ConstantSDNode *En = cast<ConstantSDNode>(Op.getOperand(3));
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const ConstantSDNode *En = cast<ConstantSDNode>(Op.getOperand(3));
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const ConstantSDNode *Done = cast<ConstantSDNode>(Op.getOperand(8));
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const ConstantSDNode *Done = cast<ConstantSDNode>(Op.getOperand(8));
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