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Make F31 and D15 non-reserved registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139420 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-09-09 22:11:26 +00:00
parent c3ab388ba9
commit 5881586745
2 changed files with 1 additions and 5 deletions
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2
lib/Target/Mips/MipsRegisterInfo.cpp
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@ -129,8 +129,6 @@ getReservedRegs(const MachineFunction &MF) const {
Reserved.set(Mips::SP);
Reserved.set(Mips::FP);
Reserved.set(Mips::RA);
Reserved.set(Mips::F31);
Reserved.set(Mips::D15);
return Reserved;
}

4
lib/Target/Mips/MipsRegisterInfo.td
View File

@ -182,9 +182,7 @@ def AFGR64 : RegisterClass<"Mips", [f64], 64, (add
// Not preserved across procedure calls
D2, D3, D4, D5, D8, D9,
// Callee save
D10, D11, D12, D13, D14,
// Reserved
D15)> {
D10, D11, D12, D13, D14, D15)> {
let SubRegClasses = [(FGR32 sub_fpeven, sub_fpodd)];
}