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AMDGPU/SI: Do not generate s_waitcnt after ds_permute/ds_bpermute
Symmary: ds_permute/ds_bpermute do not read memory so s_waitcnt is not needed. Reviewers arsenm, tstellarAMD Subscribers llvm-commits, arsenm Differential Revision: http://reviews.llvm.org/D18197 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263720 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2519,7 +2519,7 @@ multiclass DS_1A1D_PERMUTE <bits<8> op, string opName, RegisterClass rc,
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dag ins = (ins VGPR_32:$addr, rc:$data0),
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string asm = opName#" $vdst, $addr, $data0"> {
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let mayLoad = 0, mayStore = 0, isConvergent = 1 in {
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let LGKM_CNT = 0, mayLoad = 0, mayStore = 0, isConvergent = 1 in {
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def "" : DS_Pseudo <opName, outs, ins,
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[(set (i32 rc:$vdst),
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(node (i32 VGPR_32:$addr), (i32 rc:$data0)))]>;
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@ -10,4 +10,28 @@ define void @ds_bpermute(i32 addrspace(1)* %out, i32 %index, i32 %src) nounwind
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ret void
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}
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; FUNC-LABEL: {{^}}bpermute_no_waitcnt_test:
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; CHECK: s_cbranch_scc1
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; CHECK: ds_bpermute_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; CHECK-NOT: s_waitcnt
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define void @bpermute_no_waitcnt_test(i32 addrspace(1)* %out, i32 %cond) {
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entry:
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%tmp = icmp eq i32 %cond, 0
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br i1 %tmp, label %if, label %else
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if: ; preds = %entry
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%bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 0, i32 0) #0
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br label %endif
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else: ; preds = %entry
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br label %endif
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endif:
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%val = phi i32 [ %bpermute, %if ], [0, %else] ; preds = %else, %if
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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attributes #0 = { nounwind readnone convergent }
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@ -5,9 +5,33 @@ declare i32 @llvm.amdgcn.ds.permute(i32, i32) #0
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; FUNC-LABEL: {{^}}ds_permute:
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; CHECK: ds_permute_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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define void @ds_permute(i32 addrspace(1)* %out, i32 %index, i32 %src) nounwind {
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%bpermute = call i32 @llvm.amdgcn.ds.permute(i32 %index, i32 %src) #0
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store i32 %bpermute, i32 addrspace(1)* %out, align 4
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%permute = call i32 @llvm.amdgcn.ds.permute(i32 %index, i32 %src) #0
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store i32 %permute, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}permute_no_waitcnt_test:
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; CHECK: s_cbranch_scc1
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; CHECK: ds_permute_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; CHECK-NOT: s_waitcnt
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define void @permute_no_waitcnt_test(i32 addrspace(1)* %out, i32 %cond) {
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entry:
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%tmp = icmp eq i32 %cond, 0
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br i1 %tmp, label %if, label %else
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if: ; preds = %entry
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%permute = call i32 @llvm.amdgcn.ds.permute(i32 0, i32 0) #0
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br label %endif
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else: ; preds = %entry
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br label %endif
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endif:
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%val = phi i32 [ %permute, %if ], [0, %else] ; preds = %else, %if
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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attributes #0 = { nounwind readnone convergent }
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