Commit Graph

128852 Commits

Author SHA1 Message Date
Reid Kleckner
07a4ec0dd5 llvm-config: fix --libs on Linux
Summary:
llvm-config --libs does not produce correct output since commit r260263
(llvm-config: Add preliminary Windows support) changed naming format of
the libraries. This patch updates llvm-config to recognize new naming
format and output correct linker flags.

Ref: https://llvm.org/bugs/show_bug.cgi?id=26581

Patch by Vedran Miletić

Reviewers: ehsan, rnk, pxli168

Subscribers: pxli168

Differential Revision: http://reviews.llvm.org/D17300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263497 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 21:39:58 +00:00
Amaury Sechet
ce1afcccd0 Factor out MachineBlockPlacement::fillWorkLists. NFC
Summary: There are places in MachineBlockPlacement where a worklist is filled in pretty much identical way. The code is duplicated. This refactor it so that the same code is used in both scenarii.

Reviewers: chandlerc, majnemer, rafael, MatzeB, escha, silvas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18077

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263495 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 21:24:11 +00:00
Teresa Johnson
c37b05528e Revert "[ThinLTO] Renaming of function index to module summary index (NFC)"
This reverts commit r263490. Missed a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263493 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 21:18:10 +00:00
Teresa Johnson
256128f217 [ThinLTO] Renaming of function index to module summary index (NFC)
With the changes in r263275, there are now more than just functions in
the summary. Completed the renaming of data structures (started in
r263275) to reflect the wider scope. In particular, changed the
FunctionIndex* data structures to ModuleIndex*, and renamed related
variables and comments. Also renamed the files to reflect the changes.

A companion clang patch will immediately succeed this patch to reflect
this renaming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263490 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 21:05:56 +00:00
Keno Fischer
b74d11b749 [JITEventListener] Fix some -Wundef warnings
Summary:
This check was added in rL152620, and has started causing downstream warnings in Julia:
```
In file included from /home/tkelman/Julia/julia-0.5/src/codegen.cpp:22:0:
/home/tkelman/Julia/julia-0.5/usr/include/llvm/ExecutionEngine/JITEventListener.h:84:5: warning: "LLVM_USE_INTEL_JITEVENTS" is not defined [-Wundef]
 #if LLVM_USE_INTEL_JITEVENTS
     ^
/home/tkelman/Julia/julia-0.5/usr/include/llvm/ExecutionEngine/JITEventListener.h💯5: warning: "LLVM_USE_OPROFILE" is not defined [-Wundef]
 #if LLVM_USE_OPROFILE
     ^
```

Patch by Tony Kelman.
Reviewers: loladiro
Differential Revision: http://reviews.llvm.org/D17254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263487 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:49:06 +00:00
Adam Nemet
bb458432a8 Revert "Turn LoopLoadElimination on again"
This reverts commit r263472.

There is an LNT failure on clang-ppc64be-linux-lnt.  Turn this off,
while I am investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263485 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:38:55 +00:00
Sanjay Patel
01403f9711 allow branch weight metadata on select instructions (PR26636)
As noted in:
https://llvm.org/bugs/show_bug.cgi?id=26636

This doesn't accomplish anything on its own. It's the first step towards preserving 
and using branch weights with selects.

The next step would be to make sure we're propagating the info in all of the other
places where we create selects (SimplifyCFG, InstCombine, etc). I don't think there's
an easy fix to make this happen; we have to look at each transform individually to 
determine how to correctly propagate the weights.

Along with that step, we need to then use the weights when making subsequent transform
decisions such as discussed in http://reviews.llvm.org/D16836.

The inliner test is independent but closely related. It verifies that metadata is
preserved when both branches and selects are cloned.

Differential Revision: http://reviews.llvm.org/D18133



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263482 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:18:59 +00:00
Justin Lebar
dd68c9c6c5 [attrs] Handle convergent CallSites.
Summary:
Previously we had a notion of convergent functions but not of convergent
calls.  This is insufficient to correctly analyze calls where the target
is unknown, e.g. indirect calls.

Now a call is convergent if it targets a known-convergent function, or
if it's explicitly marked as convergent.  As usual, we can remove
convergent where we can prove that no convergent operations are
performed in the call.

Originally landed as r261544, then reverted in r261544 for (incidental)
build breakage.  Re-landed here with no changes.

Reviewers: chandlerc, jingyue

Subscribers: llvm-commits, tra, jhen, hfinkel

Differential Revision: http://reviews.llvm.org/D17739

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263481 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:18:54 +00:00
Justin Lebar
0e344de12e [docs] "Straightforward" is one word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263480 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:18:51 +00:00
Justin Lebar
d63dbd5680 [docs] Fix typo in docs/CodeGenerator.rst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263479 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:17:08 +00:00
Ulrich Weigand
9d381801dd [SystemZ] Add missing isBranch flags to certain instruction
Some instructions were missing isBranch, isCall, or isTerminator
flags.  This didn't really affect code generation since most of
the affected patterns were used only for the AsmParser and/or
disassembler.

However, it could affect tools using the MC layer to disassemble
and parse binary code (e.g. via MCInstrDesc::mayAffectControlFlow).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263478 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:16:30 +00:00
Keno Fischer
6c66993049 [SLPVectorizer] Fix dependency list
Summary:
DemandedBits was added to the requirements of SLPVectorizer in rL261212
(and various earlier version of it), but the appropriate initialization
statement was accidentally forgotten.

Ref [[ https://github.com/JuliaLang/julia/issues/14998 | JuliaLang/julia#14998 ]].

Patch by Yichao Yu.
Reviewers: mssimpso
Differential Revision: http://reviews.llvm.org/D18152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263476 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:04:24 +00:00
Aaron Ballman
0150ff76aa Reverting r263474; it turns out there are uses of the public interface, but MSVC wasn't caring about them.
http://lab.llvm.org:8080/green//job/clang-stage1-cmake-RA-incremental_build/21475/consoleFull#-45876453249ba4694-19c4-4d7e-bec5-911270d8a58c
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/8879

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263475 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 20:03:15 +00:00
Aaron Ballman
765ea87744 The file header of TrailingObjects.h suggests that TrailingObjects be inherited privately because the public APIs it exposes are not meant as part of the interface. There's no functional change because nothing currently relied on these being inherited publicly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263474 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 19:57:48 +00:00
Adam Nemet
753ff056a7 Turn LoopLoadElimination on again
The two issues that were discovered got fixed (r263058, r263173).

The pass can be disabled with -mllvm -enable-loop-load-elim=0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263472 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 19:40:25 +00:00
Michael Kuperstein
0fb6693862 [AliasSetTracker] Do not strip pointer casts when processing MemSetInst
This fixes PR26843.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263462 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:34:29 +00:00
Chad Rosier
c96c022c3e [AArch64] Refactor AArch64FrameLowering::emitPrologue. NFC.
http://reviews.llvm.org/D18125
Patch by Aditya Kumar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263461 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:24:34 +00:00
Quentin Colombet
058d8f885a [SpillPlacement] Fix a quadratic behavior in spill placement.
The bad behavior happens when we have a function with a long linear chain of
basic blocks, and have a live range spanning most of this chain, but with very
few uses.
Let say we have only 2 uses.
The Hopfield network is only seeded with two active blocks where the uses are,
and each iteration of the outer loop in `RAGreedy::growRegion()` only adds two
new nodes to the network due to the completely linear shape of the CFG.
Meanwhile, `SpillPlacer->iterate()` visits the whole set of discovered nodes,
which adds up to a quadratic algorithm.

This is an historical accident effect from r129188.

When the Hopfield network is expanding, most of the action is happening on the
frontier where new nodes are being added. The internal nodes in the network are
not likely to be flip-flopping much, or they will at least settle down very
quickly. This means that while `SpillPlacer->iterate()` is recomputing all the
nodes in the network, it is probably only the two frontier nodes that are
changing their output.

Instead of recomputing the whole network on each iteration, we can maintain a
SparseSet of nodes that need to be updated:

- `SpillPlacement::activate()` adds the node to the todo list.
- When a node changes value (i.e., `update()` returns true), its neighbors are
  added to the todo list.
- `SpillPlacement::iterate()` only updates the nodes in the list.

The result of Hopfield iterations is not necessarily exact. It should converge
to a local minimum, but there is no guarantee that it will find a global
minimum. It is possible that updating nodes in a different order will cause us
to switch to a different local minimum. In other words, this is not NFC, but
although I saw a few runtime improvements and regressions when I benchmarked
this change, those were side effects and actually the performance change is in
the noise as expected.

Huge thanks to Jakob Stoklund Olesen <stoklund@2pi.dk> for his feedbacks,
guidance and time for the review.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263460 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:21:25 +00:00
Chad Rosier
4005bceb12 [AArch64] Break the dependency between FP and SP when possible.
When the SP in not changed because of realignment/VLAs etc., we restore the SP
by using the previous value of SP and not the FP. Breaking the dependency will
help in cases when the epilog of a callee is close to the epilog of the caller;
for then "sub sp, fp, #" depends on the load restoring the FP in the epilog of
the callee.

http://reviews.llvm.org/D18060
Patch by Aditya Kumar and Evandro Menezes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263458 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:17:41 +00:00
Quentin Colombet
b7448a08dd [ADT] Add a pop_back_val method to the SparseSet container.
The next commit will use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263455 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:10:41 +00:00
Chad Rosier
649672485c [Mips] Fix -Wunused-private-field warning after r263444.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263454 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:10:20 +00:00
Sanjay Patel
9d31cd8fef [DAG] use !isUndef() ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263453 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 18:09:43 +00:00
Sanjay Patel
3e87fcf215 [DAG] use isUndef() ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263448 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 17:28:46 +00:00
Tom Stellard
f53246799f AMDGPU/SI: Handle wait states required for DPP instructions
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263447 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 17:05:56 +00:00
Sanjay Patel
d26914da05 [x86, AVX] replace masked load with full vector load when possible
Converting masked vector loads to regular vector loads for x86 AVX should always be a win.
I raised the legality issue of reading the extra memory bytes on llvm-dev. I did not see any
objections.

1. x86 already does this kind of optimization for multiple scalar loads -> vector load.
2. If other targets have the same flexibility, we could move this transform up to CGP or DAGCombiner.

Differential Revision: http://reviews.llvm.org/D18094



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263446 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 16:54:43 +00:00
Daniel Sanders
eacb2ec057 [mips] MIPS32R6 compact branch support
Summary:
MIPSR6 introduces a class of branches called compact branches. Unlike the
traditional MIPS branches which have a delay slot, compact branches do not
have a delay slot. The instruction following the compact branch is only
executed if the branch is not taken and must not be a branch.

It works by generating compact branches for MIPS32R6 when the delay slot
filler cannot fill a delay slot. Then, inspecting the generated code for
forbidden slot hazards (a compact branch with an adjacent branch or other
CTI) and inserting nops to clear this hazard.

Patch by Simon Dardis.

Reviewers: vkalintiris, dsanders

Subscribers: MatzeB, dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D16353


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263444 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 16:24:05 +00:00
Marek Olsak
01d3696081 AMDGPU/SI: Incomplete shader binaries need to finish execution at the end
Reviewers: tstellarAMD, arsenm

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D18058

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263441 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 15:57:14 +00:00
Nicolai Haehnle
555e806a6f AMDGPU: mark llvm.amdgcn.image.atomic.* as a source of divergence
Summary:
When multiple threads perform an atomic op with the same arguments, they
will usually see different return values.

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18101

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263440 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 15:37:18 +00:00
Vasileios Kalintiris
5fd81f79b8 [mips] Use range-based for loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263438 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 15:05:30 +00:00
Benjamin Kramer
d51b36e14b Revert "Recommitted r261633 "Supporting all entities declared in lexical scope in LLVM debug info." After fixing PR26715 at r263379."
This reverts commit r263424. Breaks self-host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263437 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 14:58:36 +00:00
Ulrich Weigand
55474c1f67 [SystemZ] Avoid LER on z13 due to partial register dependencies
On the z13, it turns out to be more efficient to access a full
floating-point register than just the upper half (as done e.g.
by the LE and LER instructions).

Current code already takes this into account when loading from
memory by using the LDE instruction in place of LE.  However,
we still generate LER, which shows the same performance issues
as LE in certain circumstances.

This patch changes the back-end to emit LDR instead of LER to
implement FP32 register-to-register copies on z13.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263431 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 13:50:03 +00:00
Chad Rosier
534f178d74 [CVP] Replace nonnegative with positive, per Philip's request. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263430 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 13:48:00 +00:00
Zlatko Buljan
a4bfc57321 [mips] Fix an issue with long double when function roundl is defined
Differential Revision: http://reviews.llvm.org/D17760


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263428 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 12:50:23 +00:00
Daniel Sanders
9efb4751c1 [mips] Range check uimm16_64
Summary:

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D17725


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263427 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 12:44:44 +00:00
Amjad Aboud
13126c3caf Recommitted r261633 "Supporting all entities declared in lexical scope in LLVM debug info."
After fixing PR26715 at r263379.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263424 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 12:03:20 +00:00
Daniel Sanders
44895fdbcf [mips] Simplify ordering of range checked immediate classes.
Summary:
With the addition of checks to ensure that operands have a strict ordering
it has become tricky to manage the order in the way I originally intended.

This patch linearizes the ordering which simplifies the implementation but
requires an order that is arbitrary in places. Here are some examples:
* uimm4 < uimm5 < uimm6
* simm4 < uimm4 < simm5 < uimm5
* uimm5 < uimm5_plus1 (1..32) < uimm5_plus32 (32..63) < uimm6
  The term 'superset' starts to break down here since the *_plus* classes
  are not true supersets of uimm5 (but they are still subsets of uimm6).
* uimm5 < uimm5_64, and uimm5 < vsplat_uimm5
  This is entirely arbitrary. We need an ordering and what we pick is
  unimportant since only one is possible for a given mnemonic.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D17723


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263423 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 11:46:30 +00:00
Nikolay Haustov
29ba74a396 [AMDGPU] Assembler: SOP* instruction fixes
s_bitset0_b64, s_bitset1_b64 has 32-bit src0, not 64-bit.
s_rfe_b64 has just one destination operand and no source.
Uncomment S_BITCMP* and S_SETVSKIP, adjust SOPC_* classes for that.
Add s_memrealtime test and change comments in smem.s to follow common style.
Change test for s_memtime to use non-zero register to make it really test encoding.
Add tests for s_buffer_load*.
Add tests for SOPC instructions (same for SI and VI)

Differential Revision: http://reviews.llvm.org/D18040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263420 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 11:17:19 +00:00
Daniel Sanders
e0dc26dddd [mips] Range check uimm6_lsl2.
Summary:

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D17291


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 11:16:56 +00:00
Hans Wennborg
5015b2074c Try to fix build of WebAssemblyRegStackify.cpp on Windows
It's failing to build on VS2015 with:

C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify.cpp(520):
error C2668: 'llvm::make_reverse_iterator': ambiguous call to overloaded function
C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\include\llvm/ADT/STLExtras.h(217):
note: could be 'std::reverse_iterator<llvm::MachineBasicBlock::iterator>
llvm::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(IteratorTy)'
        with
        [
            IteratorTy=llvm::MachineInstrBundleIterator<llvm::MachineInstr>
        ]
C:\b\depot_tools\win_toolchain\vs_files\391bbf1220d3edcd3cc3fccdb56224181e3b13a7\win_sdk\bin\..\..\VC\include\xutility(1217):
note: or 'std::reverse_iterator<llvm::MachineBasicBlock::iterator>
std::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(_RanIt)' [found using argument-dependent lookup]
        with
        [
            _RanIt=llvm::MachineInstrBundleIterator<llvm::MachineInstr>
        ]

I don't have VS2015 locally at the moment, but hopefully this will help.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263418 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 11:04:15 +00:00
Igor Breger
aecc6a2077 AVX512: icmp operation should be always lowered to CMPM (AVX-512) instruction on SKX.
implemented by delena

Differential Revision: http://reviews.llvm.org/D18054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 10:26:39 +00:00
Valery Pykhtin
97a43f6929 [AMDGPU] AsmParser: Factor out parseRegister. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263411 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 07:43:42 +00:00
Valery Pykhtin
a3a17e4d45 [AMDGPU] AsmParser: refactor post push_back vector access. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263409 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 05:25:44 +00:00
David Majnemer
699e699baa [CodeView] Consistently handle overly large symbol names
Overly large symbol names weren't correctly handled for leaf function
records.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263408 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 05:15:09 +00:00
Valery Pykhtin
9a6b5b7d84 [AMDGPU] AsmParser: remove redundant isReg checks. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263407 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 05:01:45 +00:00
Haicheng Wu
cf71fe4229 [CVP] Convert an SDiv to a UDiv if both operands are known to be nonnegative
The motivating example is this

for (j = n; j > 1; j = i) {
   i = j / 2;
}

The signed division is safely to be changed to an unsigned division (j is known
to be larger than 1 from the loop guard) and later turned into a single shift
without considering the sign bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263406 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 03:24:28 +00:00
Amaury Sechet
41d70ebe79 Add facility to add/remove/check attribute on function and arguments.
Summary: This comes from work to make attribute manipulable via the C API.

Reviewers: gottesmm, hfinkel, baldrick, echristo, tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263404 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 01:37:29 +00:00
Junmo Park
001e189f49 [MCSchedule] Remove comments about MinLatency. NFC
Summary:
There is no definition about MinLatency any more.

Reviewers: mcrosier, spatel, hfinkel

Differential Revision: http://reviews.llvm.org/D18079


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263403 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 00:36:19 +00:00
Simon Pilgrim
38258959b8 [X86][XOP] Added target shuffle combine tests for XOP's VPPERM 2-op shuffle
Actual combing support will be added in a future patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263402 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 00:18:26 +00:00
David Blaikie
e7546cafab Remove some unused variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263396 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-13 22:00:18 +00:00
Mehdi Amini
f1f0a1f064 Remove PreserveNames template parameter from IRBuilder
This reapplies r263258, which was reverted in r263321 because
of issues on Clang side.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263393 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-13 21:05:13 +00:00