150488 Commits

Author SHA1 Message Date
Kostya Serebryany
be95f5eddf [sanitizer-coverage] one more flavor of coverage: -fsanitize-coverage=inline-8bit-counters. Experimental so far, not documenting yet. Reapplying revisions 304630, 304631, 304632, 304673, see PR33308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 22:58:19 +00:00
Peter Collingbourne
7136633db1 Object: Move datalayout check into irsymtab::build. NFCI.
This check is a requirement of the irsymtab builder, not of any
particular caller.

Differential Revision: https://reviews.llvm.org/D33970

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 22:04:24 +00:00
Peter Collingbourne
b9fc96d9dd Bitcode: Introduce a BitcodeFileContents data type. NFCI.
This data type includes the contents of a bitcode file.
Right now a bitcode file can only contain modules, but
a later change will add a symbol table.

Differential Revision: https://reviews.llvm.org/D33969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 22:00:24 +00:00
Tom Stellard
e99f33afd9 test-release.sh: Remove workaround for test-suite build
Summary: We aren't actually building the test suite, so this isn't needed.

Reviewers: rengolin, hansw

Reviewed By: rengolin

Subscribers: rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D29840

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 21:31:59 +00:00
Matthias Braun
9b4cf76a1e RegAllocPBQP: Do not assign reserved physical register
(0) RegAllocPBQP: Since getRawAllocationOrder() may return a collection that includes reserved physical registers, iterate to find an un-reserved physical register.

(1) VirtRegMap: Enforce the invariant: "no reserved physical registers" in assignVirt2Phys(). Previously, this was checked only after the fact in VirtRegRewriter::rewrite.

(2) MachineVerifier: updated the test per MatzeB's review.

(3) +testcase

Patch by Nick Johnson<Nicholas.Paul.Johnson@deshawresearch.com>!

Differential Revision: https://reviews.llvm.org/D33947

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305016 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 21:30:54 +00:00
Krzysztof Parzyszek
fe0f895a8f [Hexagon] Re-enable machine verifier after codegen passes
Remove "false" from the arguments to "addPass" in Hexagon's target pass
config.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305015 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 21:25:36 +00:00
Krzysztof Parzyszek
4a3c57b63a [Hexagon] Skip mux generation when predicate register is undefined
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 20:56:36 +00:00
Evgeniy Stepanov
8efab37a20 [MachO] Fix codegen of alias of alias.
Fixes PR33316.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305012 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 20:49:03 +00:00
Sanjay Patel
5c9336eb2b [CGP, x86] add tests for potential memcmp expansion; NFC
No IR tests were added with rL304313 ( https://reviews.llvm.org/D28637 ),
so I want these for extra coverage if we enable memcmp expansion for x86.
As shown, nothing is expanded for x86 in CGP yet.

Also fundamentally, we're doing an IR transform, so we should have IR tests 
for just that part. If something goes wrong, we need to know if the bug is
in CGP or later lowering.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305011 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 20:40:39 +00:00
Dehao Chen
1d3e685c4b Do not early-inline recursive calls in sample profile loader.
Summary: Early-inlining of recursive call makes the code size bloat exponentially. We should not disable it.

Reviewers: davidxl, dnovillo, iteratee

Reviewed By: iteratee

Subscribers: iteratee, llvm-commits, sanjoy

Differential Revision: https://reviews.llvm.org/D34017

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 20:11:57 +00:00
Sanjay Patel
464c05b269 fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305008 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 20:00:09 +00:00
Sanjay Patel
4c04c2d072 [CGP] don't expand a memcmp with nobuiltin attribute
This matches the behavior used in the SDAG when expanding memcmp.

For reference, we're intentionally treating the earlier fortified call transforms differently after:
https://bugs.llvm.org/show_bug.cgi?id=23093
https://reviews.llvm.org/rL233776

One motivation for not transforming nobuiltin calls is that it can interfere with sanitizers:
https://reviews.llvm.org/D19781
https://reviews.llvm.org/D19801

Differential Revision: https://reviews.llvm.org/D34043


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 19:47:25 +00:00
Matt Arsenault
b45962cb21 AMDGPU: Work around build special casing .inc files
It complains because it assumes these were autogenerated files
in the source directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 19:25:21 +00:00
Matt Arsenault
271bf6ebf9 AMDGPU: Use correct register names in inline assembly
Fixes using physical registers in inline asm from clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 19:03:20 +00:00
Nirav Dave
85e879897a [Hexagon] Speedup NumNodesBlocking calculation. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305003 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 18:49:25 +00:00
Guozhi Wei
f222586866 [PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
In PPCBoolRetToInt bool value is changed to i32 type. On ppc64 it may introduce an extra zero extension for the return value. This patch changes the integer type to i64 to avoid the zero extension on ppc64.

This patch fixed PR32442.

Differential Revision: https://reviews.llvm.org/D31407



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305001 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 18:27:24 +00:00
Mark Searles
c5293f3fa4 [AMDGPU] Force qsads instrs to use different dest register than source registers
The V_MQSAD_PK_U16_U8, V_QSAD_PK_U16_U8, and V_MQSAD_U32_U8 take more than 1 pass in hardware. For these three instructions, the destination registers must be different than all sources, so that the first pass does not overwrite sources for the following passes.

Differential Revision: https://reviews.llvm.org/D33783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304998 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 18:21:19 +00:00
Zachary Turner
629f4edc0e Update release notes for BinaryFormat library.
Differential Revision: https://reviews.llvm.org/D34001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304995 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 17:47:22 +00:00
Galina Kistanova
6a9071188b Changed a comparison operator for std::stable_sort to implement strict weak ordering.
This is a temporarily fix which needs additional work, as it triggers a test3 failure.
test3 is commented out till then.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 17:27:40 +00:00
Zaara Syeda
32a3852f3c [Power9] Exploit vector integer extend instructions
This patch adds build vector patterns to exploit the vector integer
extend instructions:
vextsb2w - Vector Extend Sign Byte To Word
vextsb2d - Vector Extend Sign Byte To Doubleword
vextsh2w - Vector Extend Sign Halfword To Word
vextsh2d - Vector Extend Sign Halfword To Doubleword
vextsw2d - Vector Extend Sign Word To Doubleword

Differential Revision: https://reviews.llvm.org/D33510

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 17:14:36 +00:00
Sanjay Patel
06abfee96e [PowerPC] add memcmp test with nobuiltin attr; NFC
In SDAG, we don't expand libcalls with a nobuiltin attribute.
It's not clear if that's correct from the existing code comment:
"Don't do the check if marked as nobuiltin for some reason."

...adding a test here either way to show that there is currently
a different behavior implemented in the CGP-based expansion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304991 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 17:09:18 +00:00
Craig Topper
fe94f41764 [LazyValueInfo] Make LVILatticeVal intersect method take arguments by reference so we don't copy ConstantRanges unless we need to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304990 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 17:08:58 +00:00
Sanjay Patel
5016ba16cf [x86] remove unused param from tests; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304989 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 17:02:39 +00:00
Sanjay Patel
94a001edde [CGP / PowerPC] avoid multi-block overhead for simple memcmp expansion
The test diff for PowerPC shows we can better optimize if this case is one block.

For x86, there's would be a substantial difference if CGP expansion was enabled because branches are assumed 
cheap and SDAG can't optimize across blocks. 

Instead of this:

_cmp_eq8:
  movq  (%rdi), %rax
  cmpq  (%rsi), %rax
  je  LBB23_1
## BB#2:                                ## %res_block
  movl  $1, %ecx
  jmp LBB23_3
LBB23_1:
  xorl  %ecx, %ecx
LBB23_3:                                ## %endblock
  xorl  %eax, %eax
  testl %ecx, %ecx
  sete  %al
  retq

We get this:

cmp_eq8:   
  movq  (%rdi), %rcx
  xorl  %eax, %eax
  cmpq  (%rsi), %rcx
  sete  %al
  retq

And that matches the optimal codegen that we get from the current expansion in SelectionDAGBuilder::visitMemCmpCall(). 
If this looks right, then I just need to confirm that vector-sized expansion will work from here, and we can enable 
CGP memcmp() expansion for x86. Ie, we'll bypass the power-of-2 special cases currently optimized in SDAG because we 
can lower the IR produced here optimally.

Differential Revision: https://reviews.llvm.org/D34005


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304987 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 16:53:18 +00:00
Andrew V. Tischenko
9a5b056374 Add scheduler classes to integer/float horizontal operations.
This patch will close PR32801.
Differential Revision: https://reviews.llvm.org/D33203


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304986 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 16:44:13 +00:00
Alexey Bataev
ad529c0e6a [SLP] More comments fix, NFC.
Fixed spelling errors on function description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304985 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 16:41:35 +00:00
Zachary Turner
a0418c7843 [PDB] Don't crash on /debug:fastlink PDBs.
Apparently support for /debug:fastlink PDBs isn't part of the
DIA SDK (!), and it was causing llvm-pdbdump to crash because
we weren't checking for a null pointer return value.  This
manifests when calling findChildren on the IDiaSymbol, and
it returns E_NOTIMPL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304982 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 16:00:40 +00:00
Sanjay Patel
9e4f084c57 [x86] add tests for memcmp expansion; NFC
We already had a test to demonstrate PR33325:
https://bugs.llvm.org/show_bug.cgi?id=33325

I'm adding tests for general memcmp expansion (see D34005 / D33963) and:
https://bugs.llvm.org/show_bug.cgi?id=33329

...plus non-power-of-2 sizes, so we can see what that looks like currently or if expanded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304979 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 15:01:29 +00:00
Nirav Dave
d2492e7267 InferAddressSpaces: Avoid assertion failure with replacing identical
cloned constexpr

Have cloneConstantExprWithNewAddressSpaces return nullptr when
returning initial ConstantExpr.

Reviewers: arsenm

Subscribers: jholewinski, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D33995

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304975 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 13:20:55 +00:00
Simon Pilgrim
4bdace3fe0 Regenerate test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304973 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 10:24:49 +00:00
Andrew V. Tischenko
ef44484225 This patch closes PR28513: an optimization of multiplication by different constants.
The initial patch was rejected: I fixed the issue and re-apply it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304972 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 10:20:13 +00:00
Diana Picus
07d368ef58 [ARM] GlobalISel: Add more tests. NFC
Add a couple of tests to increase coverage for the TableGen'erated code,
in particular for rules where 2 generic instructions may be combined
into a single machine instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304971 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 09:47:30 +00:00
John Brawn
436ad280cc [BPI] Don't assume that strcmp returning >0 is more likely than <0
The zero heuristic assumes that integers are more likely positive than negative,
but this also has the effect of assuming that strcmp return values are more
likely positive than negative. Given that for nonzero strcmp return values it's
the ordering of arguments that determines the sign of the result there's no
reason to assume that's true.

Fix this by inspecting the LHS of the compare and using TargetLibraryInfo to
decide if it's strcmp-like, and if so only assume that nonzero is more likely
than zero i.e. strings are more often different than the same. This causes a
slight code generation change in the spec2006 benchmark 403.gcc, but with no
noticeable performance impact. The intent of this patch is to allow better
optimisation of dhrystone on Cortex-M cpus, but currently it won't as there are
also some changes that need to be made to if-conversion.

Differential Revision: https://reviews.llvm.org/D33934


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304970 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 09:44:40 +00:00
Andrew Wilkins
6a72c57525 [Go] Subtypes function
This patch adds LLVMGetSubtypes to Go API (as Type.Subtypes), tests included.

Patch by Ekaterina Vaartis!

Differential Revision: https://reviews.llvm.org/D33901



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304968 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 07:32:29 +00:00
Tony Tye
5db707b0ff Correct AMDGPU Hawaii and Kabini target names
The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate.

Differential Revision: https://reviews.llvm.org/D34016


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304959 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 01:47:25 +00:00
Peter Collingbourne
f040d163f5 Object: Factor out the code for creating the irsymtab for an arbitrary bitcode file.
This code now lives in lib/Object. The idea is that it can now be reused by
IRObjectFile among other things.

Differential Revision: https://reviews.llvm.org/D31921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304958 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 01:26:14 +00:00
Eugene Zelenko
643c0a4367 [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304954 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 23:53:32 +00:00
David Blaikie
96e2a9955b GlobalsModRef: Ensure optnone+readonly/readnone attributes are respected
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304945 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 21:37:39 +00:00
Alexey Bataev
6ed2765ff1 [SLP] Comment fix, NFC.
Fixed comment in function description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304940 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 20:37:24 +00:00
Sanjay Patel
7656bbbba0 [InstCombine] fold lshr (sext X), C1 --> zext (lshr X, C2)
This was discussed in D33338. We have larger pattern-matching ending in a truncate that 
we can reduce or remove by handling these smaller patterns first. Further motivation is 
that narrower shift ops are easier for value tracking and zext is better than sext.

http://rise4fun.com/Alive/rhh

Name: boolshift
%sext = sext i1 %x to i8
%r = lshr i8 %sext, 7

=>

%r = zext i1 %x to i8

Name: noboolshift
%sext = sext i3 %x to i8
%r = lshr i8 %sext, 7

=>

%sh = lshr i3 %x, 2
%r = zext i3 %sh to i8

Differential Revision: https://reviews.llvm.org/D33879



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304939 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 20:32:08 +00:00
Alexey Bataev
931a427122 [SLP] Comment fix, NFC.
Added a description of getReductionCost() function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304938 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 20:27:41 +00:00
Krzysztof Parzyszek
e38350cec4 [Hexagon] Generate 'inbounds' GEPs in HexagonCommonGEP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304937 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 20:04:33 +00:00
Nirav Dave
1a53953efe [DAG] Improve Store Merge candidate pruning. NFC.
When considering merging stores values are the results of loads only
consider stores whose values come from loads from the same base.

This fixes much of the longer compile times in PR33330.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304934 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 18:51:56 +00:00
Xinliang David Li
7ce64309f9 Fix builin_expect lowering bug
PR33346

Skip cases when expected value is not constant int.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304933 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 18:32:24 +00:00
Eric Fiselier
41609fea49 Add BinaryFormat module definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304928 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 17:16:25 +00:00
Alina Sbirlea
e156d99231 [mssa] Fix case when there is no definition in a block prior to an inserted use.
Summary:
Check that the first access before one being tested is valid.
Before this patch, if there was no definition prior to the Use being tested,
the first time Iter was deferenced, it hit the sentinel.

Reviewers: dberlin, gbiv

Subscribers: sanjoy, Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D33950

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304926 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 16:46:53 +00:00
Sanjay Patel
57caaecac3 [CGP] avoid zext/trunc of a memcmp expansion compare
This could be viewed as another shortcoming of the DAGCombiner:
when both operands of a compare are zexted from the same source
type, we should be able to compare the original types.

The effect on PowerPC perf is likely unnoticeable, but there's a
visible regression for x86 if we feed the suboptimal IR for memcmp
expansion to the DAG:

_cmp_eq4_zexted_to_i64:
  movl  (%rdi), %ecx
  movl  (%rsi), %edx
  xorl  %eax, %eax
  cmpq  %rdx, %rcx
  sete  %al

_cmp_eq4_better:
  movl  (%rdi), %ecx
  xorl  %eax, %eax
  cmpl  (%rsi), %ecx
  sete  %al



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304923 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 16:16:45 +00:00
Dmitry Preobrazhensky
8848866f05 [AMDGPU][MC] Corrected error message for s_waitcnt helpers
See Bug 32711: https://bugs.llvm.org//show_bug.cgi?id=32711

Reviewers: artem.tamazov

Differential Revision: https://reviews.llvm.org/D33781

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304922 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 16:08:02 +00:00
Peter Collingbourne
619317ee76 LowerTypeTests: Generate simpler IR for br(llvm.type.test, then, else).
This makes it so that the code quality for CFI checks when compiling
with -O2 and linking with --lto-O0 is similar to that of the rest of
the code.

Reduces the size of a chrome binary built with -O2/--lto-O0 by
about 750KB.

Differential Revision: https://reviews.llvm.org/D33925

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304921 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 15:49:14 +00:00
Sanjay Patel
f16db3ca21 [CGP] pass size as param in MemCmpExpansion; NFCI
Avoid extracting the constant int twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304920 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 15:05:13 +00:00