145563 Commits

Author SHA1 Message Date
Diana Picus
11601c0bd3 [ARM] GlobalISel: Add reg bank mappings for stores
Same as the ones for loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296115 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 13:07:25 +00:00
Simon Dardis
3583102e6c [mips][mc] Fix a crash when disassembling odd sized sections
Attempt to fix failing test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296112 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 12:47:41 +00:00
Diana Picus
558eff4677 Fixup r296105 - only run tests on Mips
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296111 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 12:47:11 +00:00
Simon Pilgrim
07bcf756ae Fix signed/unsigned comparison warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296109 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 11:31:00 +00:00
Diana Picus
29289da775 [ARM] GlobalISel: Legalize stores
Allow the same types that we allow for loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296108 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 11:28:24 +00:00
Simon Dardis
dbda2aa80b [mips][mc] Fix a crash when disassembling odd sized sections
Corresponding test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296106 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 10:51:27 +00:00
Simon Dardis
20c78ede7e [mips][mc] Fix a crash when disassembling odd sized sections
Make the MIPS disassembler consistent with the other targets in returning
a Size of zero when the input buffer cannot contain an instruction due
to it's size. Previously it reported the minimum instruction size when
it failed due to the buffer not being big enough for an instruction
causing llvm-objdump to crash when disassembling all sections.

Reviewers: slthakur

Differential Revision: https://reviews.llvm.org/D29984



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296105 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 10:50:27 +00:00
Diana Picus
269c5fd3e9 Revert "[ARM] GlobalISel: Legalize stores"
This reverts commit r296103 because the test broke on one of the bots. Sorry!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296104 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 10:35:39 +00:00
Diana Picus
03012a011d [ARM] GlobalISel: Legalize stores
Allow the same types that we allow for loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296103 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 10:19:23 +00:00
Simon Pilgrim
02e6cb0f2d [APInt] Add APInt::setBits() method to set all bits in range
The current pattern for setting bits in range is typically:

Mask |= APInt::getBitsSet(MaskSizeInBits, LoPos, HiPos);

Which can be particularly slow for large APInts (MaskSizeInBits > 64) as they require the allocation memory for the temporary variable.

This is one of the key compile time issues identified in PR32037.

This patch adds the APInt::setBits() helper method which avoids the temporary memory allocation completely, this first implementation uses setBit() internally instead but already significantly reduces the regression in PR32037 (~10% drop). Additional optimization may be possible.

I investigated whether there is need for APInt::clearBits() and APInt::flipBits() equivalents but haven't seen these patterns to be particularly common, but reusing the code would be trivial.

Differential Revision: https://reviews.llvm.org/D30265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296102 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 10:15:29 +00:00
Justin Bogner
dde79d7c7b Add missing initialization for MachineOptimizationRemarkEmitter
This was missed in r293110.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296096 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 07:42:35 +00:00
Dan Gohman
b1d145173f [WebAssembly] Add a README.txt entry for mergeable sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296095 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 07:33:55 +00:00
Craig Topper
26bc091674 [AVX-512] Separate the fadd/fsub/fmul/fdiv/fmax/fmin with rounding mode ISD opcodes into separate packed and scalar opcodes. This is more consistent with the rest of the ISD opcodes. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296094 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 07:21:10 +00:00
Craig Topper
732985157f [ExecutionDepsFix] Use range-based for loop. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296093 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 06:38:24 +00:00
Craig Topper
c908a7f8b4 [IR][X86] Fix llvm version number in comments in AutoUpgrade. Forgot the next release is 5.0 not 4.1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296092 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 05:35:07 +00:00
Craig Topper
474a418aa7 [AVX-512] Remove lzcnt intrinsics and autoupgrade them to generic ctlz intrinsics with select.
Clang has been emitting cltz intrinsics for a while now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296091 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 05:35:04 +00:00
Craig Topper
cc2f430f22 [AVX-512] Move lzcnt and conflict intrinsic tests to avx512cd intrinsic test file since that's their feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296090 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 05:34:59 +00:00
Craig Topper
e35238cd60 [AVX-512] Use update_llc_test_checks.py to generate a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296089 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 05:34:57 +00:00
Petr Hosek
193856a80c [Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack
The Fuchsia ABI defines slots from the thread pointer where the
stack-guard value for stack-protector, and the unsafe stack pointer
for safe-stack, are stored. This parallels the Android ABI support.

Patch by Roland McGrath

Differential Revision: https://reviews.llvm.org/D30237

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296081 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 03:10:10 +00:00
Eli Friedman
f884f5ab95 Add some testcases for bitfields with illegal widths.
clang will generate IR like this for input using packed bitfields;
very simple semantically, but it's a bit tricky to actually
generate good code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296080 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 03:04:11 +00:00
Eli Friedman
c39d5e685a Fix old testcase for dead store to match the original intent.
The x86 backend has a special case for load+xor+store, which isn't really
what this is trying to test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296077 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 02:58:49 +00:00
Xin Tong
30d4f6571e Fix an iterator invalidation bug when simplifying LIC user.
LoopUnswitch/simplify-with-nonvalness.ll is the test case for this.
The LIC has 2 users and deleting the 1st user when it can be simplified
invalidated the iterator for the 2nd user.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296069 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 01:43:36 +00:00
Adam Nemet
c1a4dd37ad [LazyMachineBFI] Add testcase
This is based on Justin's testcase and checking whether BFI is not populated
in case hotness is off.

This is a patch meant on top of Justin's patch to enable Machine opt-remarks
in the
AsmPrinter (http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20170130/426595.html)

Differential Revision: https://reviews.llvm.org/D29837

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296065 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 01:22:55 +00:00
Michael Kuperstein
969577f54d Revert r269060 to pacify bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296064 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 01:22:19 +00:00
Justin Bogner
3c86e87de3 OptDiag: Add test for r296053
Forgot to commit this with the change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296061 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 01:13:09 +00:00
Michael Kuperstein
8981fc9888 [CGP] Split some critical edges coming out of indirect branches
Splitting critical edges when one of the source edges is an indirectbr
is hard in general (because it requires changing the memory the indirectbr
reads). But if a block only has a single indirectbr predecessor (which is
the common case), we can simulate splitting that edge by splitting
the destination block, and retargeting the *direct* branches.

This is motivated by the use of computed gotos in python 2.7: PyEval_EvalFrame()
ends up using an indirect branch with ~100 successors, and passing a constant to
each of those. Since MachineSink can't break indirect critical edges on demand
(and doing this in MIR doesn't look feasible), this causes us to emit about ~100
defs of registers containing constants, which we in the predecessor block, where
only one of those constants is used in each successor. So, at each computed goto,
we needlessly spill about a 100 constants to stack. The end result is that a
clang-compiled python interpreter can be about ~2.5x slower on a simple python
reduction loop than a gcc-compiled interpreter.

Differential Revision: https://reviews.llvm.org/D29916


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296060 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:56:21 +00:00
Ahmed Bougacha
8959f2e32f [GlobalISel] Use the same name for all remarks.
While there, switch to the explicit ctor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:34:47 +00:00
Ahmed Bougacha
abdb8cba99 [GlobalISel] Use the DISubprogram for translation failure remarks.
Justin added support for DISubprogram locs in r295531 and r296052.
Use that instead of no-loc for constants and arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296058 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:34:44 +00:00
Ahmed Bougacha
0108464498 [GlobalISel] Remove now-unnecessary variable. NFC.
Since r296047, we're able to return early on failures.
Don't track whether we succeeded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296057 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:34:41 +00:00
Adrian McCarthy
0ca20ba516 Fix unit tests after r296049.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:25:17 +00:00
Justin Bogner
52ab9f0e65 OptDiag: Summarize the instruction count in asm-printer
Add an optimization remark to asm-printer that summarizes the number
of instructions emitted per function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296053 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:19:22 +00:00
Justin Bogner
04ea7c64e2 OptDiag: Use DiagnosticLocation in MachineOptimizationRemarks
DiagnosticInfo switched from DebugLoc to DiagnosticLocation in
r295519, update these subclasses to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296052 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:19:18 +00:00
Evgeniy Stepanov
734e4c3bd4 [msan] Fix instrumentation of array allocas.
Before this, MSan poisoned exactly one element of any array alloca,
even if the number of elements was zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296050 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:13:17 +00:00
Adrian McCarthy
93e76ec3ca Implement some methods for NativeRawSymbol
This allows the ability to call IPDBSession::getGlobalScope with a NativeSession and
to then query it for some basic fields from the PDB's InfoStream.
Note that the symbols now have non-const references back to the Session so that
NativeRawSymbol can access the PDBFile through the Session.

Differential Revision: https://reviews.llvm.org/D30314

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:10:47 +00:00
Ahmed Bougacha
d6d9a85ff1 [GlobalISel] Don't translate other blocks when one failed.
We were stopping the translation of the parent block when the
translation of an instruction failed, but we were still trying to
translate the other blocks of the parent function.

Don't do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296047 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:57:36 +00:00
Ahmed Bougacha
141a873c65 [GlobalISel] Finalize translated function on scope exit. NFC.
This is the compromise between having a per-function IRTranslator
and manually managing the per-function state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296046 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:57:28 +00:00
Adrian Prantl
d58d81ffa6 fix 80-column violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296045 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:54:29 +00:00
Xin Tong
37db8a701d Delete outdated comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296043 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:47:10 +00:00
Xin Tong
3addda9e5e LoopUnswitch - Simplify based on known not to a be constant.
Summary: In case we do not know what the condition is in an unswitched loop, but we know its definitely NOT a known constant. We can perform simplifcations based on this information.

Reviewers: sanjoy, hfinkel, chenli, efriedma

Reviewed By: efriedma

Subscribers: david2050, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D28968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296041 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:42:19 +00:00
Adam Nemet
b7b23a945d [OptDiag] Comment about the legacy status of emitOptimizationRemark*
functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296039 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:11:23 +00:00
Adam Nemet
16755aa7ba [OptDiag] Remove hotness parameter from legacy remark ctors
Anything using hotness should be using ORE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296038 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:11:21 +00:00
Adam Nemet
0f085888b6 [OptDiag] Hide legacy remark ctors
These are only used when emitting remarks without ORE directly using the free
functions emitOptimizationRemark*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296037 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:11:11 +00:00
Bryant Wong
f035535cd9 [ADT] Fix zip iterator interface.
This commit provides `zip_{first,shortest}` with the standard member types and
methods expected of iterators (e.g., `difference_type`), in order for zip to be
used with other adaptors, such as `make_filter_range`.

Support for reverse iteration has also been added.

Differential Revision: https://reviews.llvm.org/D30246

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:00:46 +00:00
Sanjoy Das
9e36975287 [IR] Add a Instruction::dropPoisonGeneratingFlags helper
Summary:
The helper will be used in a later change.  This change itself is NFC
since the only user of this new function is its unit test.

Reviewers: majnemer, efriedma

Reviewed By: efriedma

Subscribers: efriedma, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D30184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:50:52 +00:00
Artem Belevich
6bc216ccf6 [NVPTX] Added support for .f16x2 instructions.
This patch enables support for .f16x2 operations.

Added new register type Float16x2.
Added support for .f16x2 instructions.
Added handling of vectorized loads/stores of v2f16 values.

Differential Revision: https://reviews.llvm.org/D30057
Differential Revision: https://reviews.llvm.org/D30310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:38:24 +00:00
Tim Northover
a328146a75 ARM: make sure FastISel bails on f64 operations for Cortex-M4.
FastISel wasn't checking the isFPOnlySP subtarget feature before emitting
double-precision operations, so it got completely invalid CodeGen for doubles
on Cortex-M4F.

The normal ISel testing wasn't spectacular either so I added a second RUN line
to improve that while I was in the area.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:35:00 +00:00
Hans Wennborg
b20570e647 Revert r282872 "CVP. Turn marking adds as no wrap on by default"
While not CVP's fault, this caused miscompiles (PR31181). Reverting
until those are resolved.

(This also reverts the follow-ups r288154 and r288161 which removed the
flag.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:29:00 +00:00
Vedant Kumar
10ad4e00d9 [llvm-cov] Strip redundant path components from filenames (fix PR31982)
Instead of stripping the longest common prefix off of the filenames in a
report, strip out the longest chain of redundant path components. This
fixes the case in PR31982, where there are two files with the same
prefix, and stripping out the LCP makes things less intelligible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:20:32 +00:00
Dehao Chen
8580d5005b Add call branch annotation for ICP promoted direct call in SamplePGO mode.
Summary: SamplePGO uses branch_weight annotation to represent callsite hotness. When ICP promotes an indirect call to direct call, we need to make sure the direct call is annotated with branch_weight in SamplePGO mode, so that downstream function inliner can use hot callsite heuristic.

Reviewers: davidxl, eraman, xur

Reviewed By: davidxl, xur

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D30282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:15:18 +00:00
Krzysztof Parzyszek
9bb4f10172 [Hexagon] Handle saturations in Hexagon bit tracker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:11:52 +00:00