Commit Graph

36234 Commits

Author SHA1 Message Date
Simon Pilgrim
179257b158 [CostModel][X86] Added costmodel tests for vector ctpop/ctlz/cttz/bitreverse/bswap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268738 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 14:38:14 +00:00
Daniel Sanders
98bdc0b79f [mips] Fix inconsistent .cprestore behaviour between direct object emission and assembling.
Summary:
Direct object emission has an initialization order problem where an
InitMCObjectFile is called after MipsTargetELFStreamer determines whether
PIC is enabled by default or not. There doesn't seem to be point that
initializes all cases so split the responsibility between
MipsTargetELFStreamer and MipsAsmPrinter.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268737 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 14:37:24 +00:00
Chad Rosier
cd0223f1eb [SimplifyCFG] Prefer a simplification based on a dominating condition.
Rather than merge two branches with a common destination.
Differential Revision: http://reviews.llvm.org/D19743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268735 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 14:25:14 +00:00
Daniel Sanders
134705a273 [mips] Correct the ordering of HI/LO pairs in the relocation table.
Summary:
There seems to have been a misunderstanding as to the meaning of 'offset' in
the rules laid down by our ABI. The previous code believed that 'offset' meant
the offset within the section that the relocation is applied to. However, it
should have meant the offset from the symbol used in the relocation expression.

This patch adds two fields to ELFRelocationEntry and uses them to correct the
order of relocations for MIPS. These fields contain:
* The original symbol before shouldRelocateWithSymbol() is considered. This
  ensures that R_MIPS_GOT16 is able to correctly distinguish between local and
  external symbols, allowing us to tell whether %got() requires a matching
  %lo() or not (local symbols require one, external symbols don't). It also
  prevents confusing cases where the fuzzy matching rules cause things like
  %hi(foo)/%lo(foo+3) and %hi(bar)/%lo(bar+1) to swap their %lo()'s.
* The original offset before shouldRelocateWithSymbol() is considered. The
  existing Addend field is always zero when the object uses in place addends
  (because it's already moved it to the encoding) but MIPS needs to use the
  original offset to ensure that the linker correctly calculates the carry-in
  bit for %hi() and %got().

IAS ensures that unmatchable %hi()/%got() relocations are placed at the end of
the table to ensure that the linker rejects the table (we're unable to report
such errors directly). The alternatives to this risk accidental matching
against inappropriate relocations which may silently compute incorrect values
due to an incorrect carry bit between the %lo() and %hi()/%got().

Reviewers: sdardis

Subscribers: dsanders, sdardis, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D19718


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268733 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 13:49:25 +00:00
Daniel Sanders
70942f0271 [mips][mips16] Use isUnconditionalBranch() in AnalyzeBranch() and constant island pass.
Summary:
This stops it misidentifying unconditional branches as conditional branches
which fixes a -verify-machineinstrs error about exiting a function via fall through.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268731 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 13:23:51 +00:00
Daniel Sanders
062dfa5b22 [mips][fastisel] Conditional moves do not have implicit operands.
Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19862

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268730 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 12:57:26 +00:00
Ryan Govostes
7cf5d6815b [asan] add option to set shadow mapping offset
Allowing overriding the default ASAN shadow mapping offset with the
-asan-shadow-offset option, and allow zero to be specified for both offset and
scale.

Patch by Aaron Carroll <aaronc@apple.com>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268724 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 10:25:22 +00:00
Nikolay Haustov
943961584a AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
Summary:
    Check calling convention in AMDGPUMachineFunction::isKernel

    This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

    Also, in the future unused non-kernels may be optimized.

    Reviewers: tstellarAMD, arsenm

    Subscribers: arsenm, joker.eph, llvm-commits

    Differential Revision: http://reviews.llvm.org/D19917

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268719 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 09:23:13 +00:00
Nikolay Haustov
ac1dd296bc AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1.
Summary:
This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

Also, in the future unused non-kernels may be optimized.

For now, also accept SPIR_KERNEL for HCC frontend.

Also, add bitcode compatibility tests for missing calling conventions
except AVR_BUILTIN which doesn't have parse code.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, joker.eph, llvm-commits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268717 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 09:07:29 +00:00
Mehdi Amini
d4ecd0d79c ThinLTO: fix assertion and refactor check for hidden use from inline ASM in a helper function
This test was crashing, and currently it breaks bootstrapping clang with debuginfo

Differential Revision: http://reviews.llvm.org/D20008

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268715 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 08:25:33 +00:00
Zlatko Buljan
76237bdeea [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions
Differential Revision: http://reviews.llvm.org/D15744


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268714 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 08:24:14 +00:00
Xinliang David Li
ea2fb7d1dd [PM] port IR based PGO prof-gen pass to new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268710 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 05:49:19 +00:00
Xinliang David Li
ccd9cbbd34 [profile] Remove another unneeded field in raw profile reader
DataValueSize is now removed. The change is consolidated
with previous raw version bump.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268703 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 02:13:00 +00:00
Ahmed Bougacha
00ac1d03f5 [CodeGen] Round [SU]INT_TO_FP result when promoting from f16.
If we don't, values that aren't precisely representable in f16 could
be used as-is in a promoted f32 operation, which would produce
incorrect results.

AArch64 had the correct behavior; add a focused test.

Fixes http://llvm.org/PR26871

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268700 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 00:58:00 +00:00
Xinliang David Li
da713ca23f [PM] port Branch Frequency Analaysis pass to new PM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268687 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 21:13:27 +00:00
Davide Italiano
2d1483c124 [PM] Port Interprocedural SCCP to the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268684 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 21:05:36 +00:00
Dehao Chen
d025c697a5 Revert http://reviews.llvm.org/D19926 as it breaks tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268681 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:47:53 +00:00
Dan Gohman
9281534899 [WebAssembly] Don't emit epilogue code in the middle of stackified code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268679 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:41:15 +00:00
Dehao Chen
8200288f55 Simplify CFG before assigning discriminator.
Summary: We need to clean up CFG before assigning discriminator to minimize the impact of optimization on debug info.

Reviewers: davidxl, dblaikie, dnovillo

Subscribers: dnovillo, danielcdh, llvm-commits

Differential Revision: http://reviews.llvm.org/D19926

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268675 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:18:49 +00:00
Marcin Koscielnicki
c16ab2d841 [MSan] [MIPS64] Fix vararg helper for >1 fixed argument.
This fixes http://llvm.org/PR27646 on Mips64.

Differential Revision: http://reviews.llvm.org/D19989

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268673 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:13:17 +00:00
Matt Arsenault
d707747418 AMDGPU: Run r600 tests last
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268672 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:07:37 +00:00
Tim Northover
7c4f7f326e ARM: don't attempt to merge litpools referencing different PC-anchors.
Given something like:

    ldr r0, .LCPI0_0 (== pc-rel var)
    add r0, pc

    ldr r1, .LCPI0_1 (== pc-rel var)
    add r1, pc

we cannot combine the 2 ldr instructions and litpools because they get added to
a different pc to form the correct address. I think the original logic came
from a time when we fused the LDRpci/PICADD instructions into one
pseudo-instruction so the PC was always immediately at-hand. That's no longer
the case.

Should fix general-dynamic TLS access on Linux, and quite possibly other -fPIC
code that relies on litpools (e.g. v6m and -Oz compilations) though trivial
tweaks of the .ll test didn't provoke anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268662 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 18:38:53 +00:00
Krzysztof Parzyszek
8cb434aecf [Hexagon] Add aliases for vector loads/stores with no explicit offset
The mem(r0) instructions are treated as mem(r0+#0).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268661 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 18:38:35 +00:00
Vitaly Buka
eb80fa1253 Revert "[ThinLTO] Emit individual index files for distributed backends"
MemorySanitizer: use-of-uninitialized-value in lib/Bitcode/Writer/BitcodeWriter.cpp:364:70
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12544/steps/check-llvm%20msan/logs/stdio

This reverts commit 0c4a898ea5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268660 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 18:31:00 +00:00
Kevin Enderby
00e8fc511c Clean up the specific error message for a malformed Mach-O files with bad segment
load commands.

The existing test case in test/Object/macho-invalid.test for
macho-invalid-too-small-segment-load-command has a cmdsize of 55, while
being too small also it is not a multiple of 4.  So when that check is added
this test case will produce a different error. So I constructed a new test case
that will trigger the intended error.

I also changed the error message to be consistent with the other malformed Mach-O
file error messages which prints the load command index.  I also removed both
object_error::macho_load_segment_too_small and
object_error::macho_load_segment_too_many_sections from Object/Error.h
as they are not needed and can just use object_error::parse_failed and let the
error message string distinguish the specific error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268652 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 17:43:35 +00:00
Nicolai Haehnle
fcd3365643 AMDGPU: Uniform branch conditions can originate with intrinsics
Summary:
Discovered by Dave Airlie, fixes an assertion in Khronos OpenGL CTS
GL43-CTS.shader_storage_buffer_object.advanced-matrix.

In this particular case, the buffer load intrinsic fed into a uniform
conditional branch, and led the brcond lowering down the wrong path.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268650 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 17:36:36 +00:00
Tom Stellard
66eb4d17bb AMDGPU/SI: Add support for AMD code object version 2.
Summary:
Version 2 is now the default.  If you want to emit version 1, use
the amdgcn--amdhsa-amdcov1 triple.

Reviewers: arsenm, kzhuravl

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268647 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 17:03:33 +00:00
Chad Rosier
a2d385e71e [ValueTracking] Improve isImpliedCondition for matching LHS and Imm RHSs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268636 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 15:39:18 +00:00
Silviu Baranga
debb790c77 [LV] Identify more induction PHIs by coercing expressions to AddRecExprs
Summary:
Some PHIs can have expressions that are not AddRecExprs due to the presence
of sext/zext instructions. In order to prevent the Loop Vectorizer from
bailing out when encountering these PHIs, we now coerce the SCEV
expressions to AddRecExprs using SCEV predicates (when possible).

We only do this when the alternative would be to not vectorize.

Reviewers: mzolotukhin, anemet

Subscribers: mssimpso, sanjoy, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17153

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268633 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 15:20:39 +00:00
James Y Knight
257fabb186 Remove bit-rotten CppBackend.
This backend was supposed to generate C++ code which will re-construct
the LLVM IR passed as input. This seems to me to have very marginal
usefulness in the first place.

However, the code has never been updated to use IRBuilder, which makes
its current value negative -- people who look at the output may be
steered to use the *wrong* C++ APIs to construct IR.

Furthermore, it's generated code that doesn't compile since at least
2013.

Differential Revision: http://reviews.llvm.org/D19942

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268631 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 14:35:40 +00:00
Nirav Dave
2887538121 Fix Mips Parser error reporting
[mips] On error, ParseDirective should always return false to signify that the
directive was understood.

Reviewers: dsanders, vkalintiris, sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19929

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268630 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 14:15:46 +00:00
Teresa Johnson
15869cb65b Fix Windows bot failures from r268627
Remove "/" path separator from expected pattern which should fix a
couple of Windows bots that have failed:

http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/4816
http://bb.pgr.jp/builders/ninja-clang-i686-msc19-R/builds/2610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268629 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 14:10:57 +00:00
Teresa Johnson
0c4a898ea5 [ThinLTO] Emit individual index files for distributed backends
Summary:
When launching ThinLTO backends in a distributed build (currently
supported in gold via the thinlto-index-only plugin option), emit
an individual index file for each backend process as described here:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098272.html

The individual index file encodes the summary and module information
required for implementing the importing/exporting decisions made
for a given module in the thin link step.
This is in place of the current mechanism that uses the combined index
to make importing decisions in each back end independently. It is an
enabler for doing global summary based optimizations in the thin link
step (which will be recorded in the individual index files), and reduces
the size of the index that must be sent to each backend process, and
the amount of work to scan it in the backends.

Rather than create entirely new ModuleSummaryIndex structures (and all
the included unique_ptrs) for each backend index file, a map is created
to record all of the GUID and summary pointers needed for a particular
index file. The IndexBitcodeWriter walks this map instead of the full
index (hiding the details of managing the appropriate summary iteration
in a new iterator subclass). This is more efficient than walking the
entire combined index and filtering out just the needed summaries during
each backend bitcode index write.

Depends on D19481.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D19556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268627 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 13:44:56 +00:00
Marcin Koscielnicki
d11ea2f4ad [X86] Extend some Linux special cases to cover kFreeBSD.
Both Linux and kFreeBSD use glibc, so follow similiar code paths.
Add isTargetGlibc to check for this, and use it instead of isTargetLinux
in a few places.

Fixes PR22248 for kFreeBSD.

Differential Revision: http://reviews.llvm.org/D19104

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268624 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 11:35:51 +00:00
Igor Kudrin
68065ba043 [Coverage] Combine counts of expansion regions if there are no code regions for the same area.
Differential Revision: http://reviews.llvm.org/D18831


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268620 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 09:39:45 +00:00
David Majnemer
5e74c97ad7 [X86] Use the right type when folding xor (truncate (shift)) -> setcc
The result type of setcc is dependent on whether or not AVX512 is
present.
We had an X86-specific DAG-combine which assumed that the result type
should be i8 when it could be i1.
This meant that we would generate illegal setccs which LowerSETCC did
not like.

Instead, use an appropriate type and zero extend to i8.

Also, there were some scenarios where the fold should have fired but
didn't because we were overly cautious about the types.  This meant that
we generated:

        shrl    $31, %edi
        andl    $1, %edi
        kmovw   %edi, %k0
        kxnorw  %k0, %k0, %k1
        kshiftrw        $15, %k1, %k1
        kxorw   %k1, %k0, %k0
        kmovw   %k0, %eax

instead of:

        testl   %edi, %edi
        setns   %al

This fixes PR27638.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268609 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 06:00:56 +00:00
Mehdi Amini
bbe4ac4478 LTOCodeGenerator: add linkonce(_odr) to "llvm.compiler.used" when present in "MustPreserve" set
If the linker requested to preserve a linkonce function, we should
honor this even if we drop all uses.
We explicitely avoid turning them into weak_odr (unlike the first
version of this patch in r267644), because the codegen can be
different on Darwin: because of `llvm::canBeOmittedFromSymbolTable()`
we may emit the symbol as weak_def_can_be_hidden instead of
weak_definition.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268607 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 05:14:24 +00:00
Mehdi Amini
3556cc73fe Revert "LTOCodeGenerator: turns linkonce(_odr) into weak_(odr) when present "MustPreserve" set"
This reverts commit r267644. Turning linkonce_odr into weak_odr is
a sementic change on Darwin: because of
`llvm::canBeOmittedFromSymbolTable()` we may emit the symbol as
weak_def_can_be_hidden instead of weak_definition.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268606 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 05:14:20 +00:00
Xinliang David Li
007644ba3f [Profile] Raw profile header clean up
Remove dead ValueDataBegin field in raw header.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268602 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 04:07:30 +00:00
Xinliang David Li
454f7fa94d [PM] Port Branch Probability Analysis pass to the new pass manager.
Differential Revision: http://reviews.llvm.org/D19839


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268601 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 02:59:57 +00:00
Davide Italiano
e44aed739e [PM] Port EliminateAvailableExternally pass to the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268599 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 02:37:32 +00:00
Ryan Govostes
8c98d34395 Revert "[asan] add option to set shadow mapping offset"
This reverts commit ba89768f97.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268588 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 01:27:04 +00:00
Ryan Govostes
ba89768f97 [asan] add option to set shadow mapping offset
Allowing overriding the default ASAN shadow mapping offset with the
-asan-shadow-offset option, and allow zero to be specified for both offset and
scale.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268586 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 01:14:39 +00:00
Davide Italiano
0a517713cd [PM] Port ConstantMerge to the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268582 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 00:51:09 +00:00
Marcin Koscielnicki
4a5d819678 [SystemZ] Implement backchain attribute (recommit with fix).
This introduces a SystemZ-specific "backchain" attribute on function, which
enables writing the frame backchain link as specified by the ABI.  This will
be used to implement -mbackchain option in clang.

Differential Revision: http://reviews.llvm.org/D19889

Fixed in this version: added RegState::Define and RegState::Kill on R1D
in prologue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268581 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 00:37:30 +00:00
Adam Nemet
2b2a8f145d [LoopDataPrefetch] Add optimization remark
With -Rpass=loop-data-prefetch, show the memory access that got
prefetched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268578 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 00:08:15 +00:00
Vitaly Buka
6e64fd8d92 Revert "[SimplifyCFG] propagate branch metadata when creating select"
MemorySanitizer: use-of-uninitialized-value
0x4910e47 in count /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/Support/MathExtras.h:159:12
0x4910e47 in countLeadingZeros<unsigned long> /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/include/llvm/Support/MathExtras.h:183
0x4910e47 in FitWeights /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:855
0x4910e47 in SimplifyCondBranchToCondBranch /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Transforms/Utils/SimplifyCFG.cpp:2895

This reverts commit 609f4dd4bf.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268577 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-04 23:59:33 +00:00
Marcin Koscielnicki
a8d416d07d Revert "[SystemZ] Implement backchain attribute."
This reverts commit rL268571.

It caused failures in register scavenger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268576 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-04 23:54:53 +00:00
Marcin Koscielnicki
c4002d716b [SystemZ] Implement llvm.get.dynamic.area.offset
To be used for AddressSanitizer.

Differential Revision: http://reviews.llvm.org/D19817

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268572 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-04 23:31:26 +00:00
Marcin Koscielnicki
b4420ea315 [SystemZ] Implement backchain attribute.
This introduces a SystemZ-specific "backchain" attribute on function, which
enables writing the frame backchain link as specified by the ABI.  This will
be used to implement -mbackchain option in clang.

Differential Revision: http://reviews.llvm.org/D19889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268571 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-04 23:31:20 +00:00