This patch doesn't create thunk for branch operation when following conditions are met:
- Architecture is AArch64
- Relocation target is in the same object file
- Relocation target is close enough to be encoded in immediate offset
In such case we branch directly to the target instead of branching to thunk
Differential revision: https://reviews.llvm.org/D28108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291431 91177308-0d34-0410-b5e6-96231b3b80d8
Canonicalize all CMake booleans to 0/1 before passing them to lit, to
ensure that the Python side handles all of them consistently
and correctly. 0/1 is a safe choice of values that trigger the same
boolean interpretation in CMake, Python and C++.
Furthermore, using them without quotes improves the chance Python will
explicitly fail when an incorrect value (such as ON/OFF, TRUE/FALSE,
YES/NO) is accidentally passed, rather than silently misinterpreting
the value.
This replaces a lot of different logics spread around lit site files,
attempting to partially reproduce the boolean logic used in CMake
and usually silently failing when an uncommon value was used instead.
In fact, some of them were never working correctly since different
values were assigned in CMake and checked in Python.
The alternative solution could be to create a common parser for CMake
booleans in lit and use it consistently throughout the site files.
However, it does not seem like the best idea to create redundant
implementation of the same logic and have to follow upstream if it ever
is extended to handle more values.
Differential Revision: https://reviews.llvm.org/D28294
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291284 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: The relocation is missing mask so an address that has non-zero bits in 47:43 may overwrite the register number. (Frequently shows up as target register changed to `xzr`....)
Reviewers: t.p.northover, lhames
Subscribers: davide, aemerson, rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D27609
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289880 91177308-0d34-0410-b5e6-96231b3b80d8
The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and
similar.
Patch by: Daniel Sanders
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284724 91177308-0d34-0410-b5e6-96231b3b80d8
These tests rely on two sections being allocated with a limited displacement
from one to the other to work. We've never guaranteed this, and consequently
these tests usually fail. That led to them being XFAILed, but now they XPASS
whenever the sections do happen to be allocated nearby in memory. So I'm
removing these for now to get rid of the noise. We can re-instate them if/when
we take the time to implement a displacement-respecting allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284654 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This adds the necessary logic to support relocations to thumb functions in the COFF dynamic linker.
The jumps to function addresses are mostly blx, which requires the ISA selection bit when jumping to a thumb function.
Note: I'm determining if the relocation requires the ISA bit when creating the relocation entries and not when resolving the relocation. I have to do that because I need the ObjectFile and the actual Symbol, which are available only when creating the entries. It would require a gross refactor if I do it otherwise, but I'm okay with doing it if you think it's better.
Reviewers: peter.smith, compnerd
Subscribers: rengolin, sas
Differential Revision: https://reviews.llvm.org/D25151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284410 91177308-0d34-0410-b5e6-96231b3b80d8
According to the arm arm specifications, 4 bytes are needed for a shift instead
of 8, this was causing the movt instruction to write to a different register
sometimes.
Patch by Walter Erquinigo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280005 91177308-0d34-0410-b5e6-96231b3b80d8
This patch causes RuntimeDyld to check for existing definitions when it
encounters weak symbols. If a definition already exists then the new weak
definition is discarded. All symbol lookups within a "logical dylib" should now
agree on the address of any given weak symbol. This allows the JIT to better
match the behavior of the static linker for C++ code.
This support is only partial, as it does not allow strong definitions that
occur after the first weak definition (in JIT symbol lookup order) to override
the previous weak definitions. Support for this will be added in a future
patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278065 91177308-0d34-0410-b5e6-96231b3b80d8
It breaks ExecutionEngine/OrcLazy/weak-function.ll on most bots.
Script:
--
...
--
Exit Code: 1
Command Output (stderr):
--
Could not find main function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277907 91177308-0d34-0410-b5e6-96231b3b80d8
This adds partial support for weak functions to the CompileOnDemandLayer by
modifying the addLogicalModule method to check for existing stub definitions
before building a new stub for a weak function. This scheme is sufficient to
support ODR definitions, but fails for general weak definitions if strong
definition is encountered after the first weak definition. (A more extensive
refactor will be required to fully support weak symbols).
This patch does *not* add weak symbol support to RuntimeDyld: I hope to add
that in the near future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277896 91177308-0d34-0410-b5e6-96231b3b80d8
Common symbol support in ORC was broken in r270716 when the symbol resolution
rules in RuntimeDyld were changed. With the switch to lazily materialized
symbols in r277386, common symbols can be supported by having
RuntimeDyld::emitCommonSymbols search for (but not materialize!) definitions
elsewhere in the logical dylib.
This patch adds the 'Common' flag to JITSymbolFlags, and the necessary check
to RuntimeDyld::emitCommonSymbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277397 91177308-0d34-0410-b5e6-96231b3b80d8
If there was a tail call, we would incorrectly handle the relocation. It would
end up indexing into the array with an incorrect section id. The symbol was
external to the module, so the Section ID was UNDEFINED (-1). We would then
index the SmallVector with this ID, triggering an assertion. Use the Value
rather than the section load address in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275442 91177308-0d34-0410-b5e6-96231b3b80d8
This adds rudimentary support for COFF ARM to the dynamic loader for the
exeuction engine. This can be used by lldb to JIT code into a COFF ARM
environment. This lays the foundation for the loader, though a few of the
relocation types are yet unhandled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273682 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-mc is a developer tool, as such it make sense for it to use new
features by default.
This doesn't change the user facing clang, which still defaults to non
relaxable relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273014 91177308-0d34-0410-b5e6-96231b3b80d8
This fixes IMAGE_REL_I386_DIR32, IMAGE_REL_I386_DIR32NB,
IMAGE_REL_I386_SECREL, and IMAGE_REL_I386_REL32 relocations.
Based on patch by Jon Turney <jon.turney@dronecode.org.uk>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272911 91177308-0d34-0410-b5e6-96231b3b80d8
Patch by Nitesh Jain.
Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.
Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270542 91177308-0d34-0410-b5e6-96231b3b80d8
Very few things in MC itself use the option. Most of the code that that
uses it could be move to CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269871 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing bots failure. test/ExecutionEngine/RuntimeDyld/SystemZ/cfi-relo-pc64.s
requires SystemZ backend. Mark the test as unsupported if the backend is not
available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269470 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure.
Reviewers: uweigand
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20033
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269436 91177308-0d34-0410-b5e6-96231b3b80d8
Some of the JIT tests began failing with "[llvm] r266663 - [Orc] Re-commit
r266581 with fixes for MSVC, and format cleanups." on powerpc64 big endian.
To get the buildbots running I am marking these as UNSUPPORTED for now.
If this is fixed remove the UNSUPPORTED flag "powerpc64-unknown-linux-gnu".
In r267516 I marked these as XFAIL but they succeed on some of the bots
on stage1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267518 91177308-0d34-0410-b5e6-96231b3b80d8
Some of the JIT tests began failing with "[llvm] r266663 - [Orc] Re-commit
r266581 with fixes for MSVC, and format cleanups." on powerpc64 big endian.
To get the buildbots running I am marking these as XFAIL for now.
If this is fixed remove the XFAIL flag "powerpc64-unknown-linux-gnu".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267516 91177308-0d34-0410-b5e6-96231b3b80d8
This patch adds a new class, OrcI386, which contains the hooks needed to
support lazy-JITing on i386 (currently only for Pentium 2 or above, as the JIT
re-entry code uses the FXSAVE/FXRSTOR instructions).
Support for i386 is enabled in the LLI lazy JIT and the Orc C API, and
regression and unit tests are enabled for this architecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260338 91177308-0d34-0410-b5e6-96231b3b80d8
This patch switches from an unguarded to a guarded loop for eh-frame record
fixups. In the unguarded version we would always make at least one call to
processFDE, which would then crash trying to fix up a frame that didn't exist.
Fixes <rdar://problem/24301582>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259103 91177308-0d34-0410-b5e6-96231b3b80d8
classes.
OrcRemoteTargetClient::RCMemoryManager will now register EH frames with the
server automatically. This allows remote-execution of code that uses exceptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257816 91177308-0d34-0410-b5e6-96231b3b80d8
intermittent XPASSes on some builders.
These can be reinstated when we have proper support for small-code model in
the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257359 91177308-0d34-0410-b5e6-96231b3b80d8
The new ORC remote-JITing support provides a superset of the old code's
functionality, so we can replace the old stuff. As a bonus, a couple of
previously XFAILed tests have started passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257343 91177308-0d34-0410-b5e6-96231b3b80d8
