Commit Graph

110911 Commits

Author SHA1 Message Date
Rafael Espindola
b2a5bf25f9 Return ErrorOr<std::unique_ptr<Archive>> form getAsArchive.
This is the same return type of Archive::create.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 21:05:36 +00:00
Hans Wennborg
86704cc355 Try fixing MSVC build after r223802
LLVM_EXPLICIT is only supported by recent version of MSVC, and it seems
the not-so-recent versions get confused about the operator bool() when
tryint to resolve operator== calls.

This removed the operator bool()'s since they don't seem to be used
anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223824 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:39:15 +00:00
Colin LeMahieu
11fa90091b [Hexagon] Fixing broken tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:53 +00:00
Rafael Espindola
075a8cee5d Rename createIRObjectFile to just create.
It is a static method of IRObjectFile, so having to use
IRObjectFile::createIRObjectFile was redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223822 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:36:13 +00:00
Colin LeMahieu
20856353b8 [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:23:30 +00:00
Duncan P. N. Exon Smith
b8755d9ddd Fix an MSVC failure from r223802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223820 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 20:01:40 +00:00
Juergen Ributzka
772744826c [FastISel][AArch64] Fix a missing nullptr check in 'computeAddress'.
The load/store value type is currently not available when lowering the memcpy
intrinsic. Add the missing nullptr check to support this in 'computeAddress'.

Fixes rdar://problem/19178947.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223818 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 19:44:38 +00:00
Colin LeMahieu
260731d108 [Hexagon] Adding word combine dot-new form and replacing old combine opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223815 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 19:23:45 +00:00
Chandler Carruth
3508e27903 Revert r223764 which taught instcombine about integer-based elment extraction
patterns.

This is causing Clang to miscompile itself for 32-bit x86 somehow, and likely
also on ARM and PPC. I really don't know how, but reverting now that I've
confirmed this is actually the culprit. I have a reproduction as well and so
should be able to restore this shortly.

This reverts commit r223764.

Original commit log follows:
Teach instcombine to canonicalize "element extraction" from a load of an
integer and "element insertion" into a store of an integer into actual
element extraction, element insertion, and vector loads and stores.

Previously various parts of LLVM (including instcombine itself) would
introduce integer loads and stores into the code as a way of opaquely
loading and storing "bits". In some cases (such as a memcpy of
std::complex<float> object) we will eventually end up using those bits
in non-integer types. In order for SROA to effectively promote the
allocas involved, it splits these "store a bag of bits" integer loads
and stores up into the constituent parts. However, for non-alloca loads
and tsores which remain, it uses integer math to recombine the values
into a large integer to load or store.

All of this would be "fine", except that it forces LLVM to go through
integer math to combine and split up values. While this makes perfect
sense for integers (and in fact is critical for bitfields to end up
lowering efficiently) it is *terrible* for non-integer types, especially
floating point types. We have a much more canonical way of representing
the act of concatenating the bits of two SSA values in LLVM: a vector
and insertelement. This patch teaching InstCombine to use this
representation.

With this patch applied, LLVM will no longer introduce integer math into
the critical path of every loop over std::complex<float> operations such
as those that make up the hot path of ... oh, most HPC code, Eigen, and
any other heavy linear algebra library.

For the record, I looked *extensively* at fixing this in other parts of
the compiler, but it just doesn't work:
- We really do want to canonicalize memcpy and other bit-motion to
  integer loads and stores. SSA values are tremendously more powerful
  than "copy" intrinsics. Not doing this regresses massive amounts of
  LLVM's scalar optimizer.
- We really do need to split up integer loads and stores of this form in
  SROA or every memcpy of a trivially copyable struct will prevent SSA
  formation of the members of that struct. It essentially turns off
  SROA.
- The closest alternative is to actually split the loads and stores when
  partitioning with SROA, but this has all of the downsides historically
  discussed of splitting up loads and stores -- the wide-store
  information is fundamentally lost. We would also see performance
  regressions for bitfield-heavy code and other places where the
  integers aren't really intended to be split without seemingly
  arbitrary logic to treat integers totally differently.
- We *can* effectively fix this in instcombine, so it isn't that hard of
  a choice to make IMO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223813 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 19:21:16 +00:00
David Majnemer
0247b81ef6 AsmParser: Don't crash on short hex constants for fp128 types
If we see 0xL01, treat it like 0xL00000000000000000000000000000001
instead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 19:10:03 +00:00
Duncan P. N. Exon Smith
f700a24774 Fix another GCC build failure from r223802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223810 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:59:09 +00:00
Frederic Riss
63e42c2782 Remove unneeded curly braces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223809 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:57:39 +00:00
Frederic Riss
53c4c062c1 Reorder the code to avoid inserting at the beginning of a vector.
As per dblaikie suggestion, thanks\!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223808 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:57:34 +00:00
Juergen Ributzka
9512d7f684 Cleanup PatternMatch. NFC.
Tidy up the code a little by using 'auto' when the type is obvious, doxify the
comments, and clang-format the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223807 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:56:35 +00:00
Duncan P. N. Exon Smith
973ce33e23 Fix a GCC build failure from r223802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:52:38 +00:00
Chris Bieneman
eaf5997921 Adding a new option to CMake to disable C++ atexit on llvm-shlib.
Summary:
This is desirable for WebKit and other clients of the llvm-shlib because C++ exit time destructors have a tendency to crash when invoked from multi-threaded applications.

Ideally this option will be temporary, because the ideal fix is to just not have exit time destructors.

Reviewers: chapuni, ributzka

Reviewed By: ributzka

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223805 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:49:55 +00:00
Robert Khasanov
648f7c7eb1 [AVX512] Added lowering for VBROADCASTSS/SD instructions.
Lowering patterns were written through avx512_broadcast_pat multiclass as pattern generates VBROADCAST and COPY_TO_REGCLASS nodes.
Added lowering tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223804 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:45:30 +00:00
Duncan P. N. Exon Smith
dad20b2ae2 IR: Split Metadata from Value
Split `Metadata` away from the `Value` class hierarchy, as part of
PR21532.  Assembly and bitcode changes are in the wings, but this is the
bulk of the change for the IR C++ API.

I have a follow-up patch prepared for `clang`.  If this breaks other
sub-projects, I apologize in advance :(.  Help me compile it on Darwin
I'll try to fix it.  FWIW, the errors should be easy to fix, so it may
be simpler to just fix it yourself.

This breaks the build for all metadata-related code that's out-of-tree.
Rest assured the transition is mechanical and the compiler should catch
almost all of the problems.

Here's a quick guide for updating your code:

  - `Metadata` is the root of a class hierarchy with three main classes:
    `MDNode`, `MDString`, and `ValueAsMetadata`.  It is distinct from
    the `Value` class hierarchy.  It is typeless -- i.e., instances do
    *not* have a `Type`.

  - `MDNode`'s operands are all `Metadata *` (instead of `Value *`).

  - `TrackingVH<MDNode>` and `WeakVH` referring to metadata can be
    replaced with `TrackingMDNodeRef` and `TrackingMDRef`, respectively.

    If you're referring solely to resolved `MDNode`s -- post graph
    construction -- just use `MDNode*`.

  - `MDNode` (and the rest of `Metadata`) have only limited support for
    `replaceAllUsesWith()`.

    As long as an `MDNode` is pointing at a forward declaration -- the
    result of `MDNode::getTemporary()` -- it maintains a side map of its
    uses and can RAUW itself.  Once the forward declarations are fully
    resolved RAUW support is dropped on the ground.  This means that
    uniquing collisions on changing operands cause nodes to become
    "distinct".  (This already happened fairly commonly, whenever an
    operand went to null.)

    If you're constructing complex (non self-reference) `MDNode` cycles,
    you need to call `MDNode::resolveCycles()` on each node (or on a
    top-level node that somehow references all of the nodes).  Also,
    don't do that.  Metadata cycles (and the RAUW machinery needed to
    construct them) are expensive.

  - An `MDNode` can only refer to a `Constant` through a bridge called
    `ConstantAsMetadata` (one of the subclasses of `ValueAsMetadata`).

    As a side effect, accessing an operand of an `MDNode` that is known
    to be, e.g., `ConstantInt`, takes three steps: first, cast from
    `Metadata` to `ConstantAsMetadata`; second, extract the `Constant`;
    third, cast down to `ConstantInt`.

    The eventual goal is to introduce `MDInt`/`MDFloat`/etc. and have
    metadata schema owners transition away from using `Constant`s when
    the type isn't important (and they don't care about referring to
    `GlobalValue`s).

    In the meantime, I've added transitional API to the `mdconst`
    namespace that matches semantics with the old code, in order to
    avoid adding the error-prone three-step equivalent to every call
    site.  If your old code was:

        MDNode *N = foo();
        bar(isa             <ConstantInt>(N->getOperand(0)));
        baz(cast            <ConstantInt>(N->getOperand(1)));
        bak(cast_or_null    <ConstantInt>(N->getOperand(2)));
        bat(dyn_cast        <ConstantInt>(N->getOperand(3)));
        bay(dyn_cast_or_null<ConstantInt>(N->getOperand(4)));

    you can trivially match its semantics with:

        MDNode *N = foo();
        bar(mdconst::hasa               <ConstantInt>(N->getOperand(0)));
        baz(mdconst::extract            <ConstantInt>(N->getOperand(1)));
        bak(mdconst::extract_or_null    <ConstantInt>(N->getOperand(2)));
        bat(mdconst::dyn_extract        <ConstantInt>(N->getOperand(3)));
        bay(mdconst::dyn_extract_or_null<ConstantInt>(N->getOperand(4)));

    and when you transition your metadata schema to `MDInt`:

        MDNode *N = foo();
        bar(isa             <MDInt>(N->getOperand(0)));
        baz(cast            <MDInt>(N->getOperand(1)));
        bak(cast_or_null    <MDInt>(N->getOperand(2)));
        bat(dyn_cast        <MDInt>(N->getOperand(3)));
        bay(dyn_cast_or_null<MDInt>(N->getOperand(4)));

  - A `CallInst` -- specifically, intrinsic instructions -- can refer to
    metadata through a bridge called `MetadataAsValue`.  This is a
    subclass of `Value` where `getType()->isMetadataTy()`.

    `MetadataAsValue` is the *only* class that can legally refer to a
    `LocalAsMetadata`, which is a bridged form of non-`Constant` values
    like `Argument` and `Instruction`.  It can also refer to any other
    `Metadata` subclass.

(I'll break all your testcases in a follow-up commit, when I propagate
this change to assembly.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223802 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:38:53 +00:00
David Majnemer
db7b69e3a6 AsmParser: Don't crash on malformed attribute groups
This fixes PR21785.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:33:57 +00:00
Colin LeMahieu
60d733acc5 [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223800 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 18:16:49 +00:00
Frederic Riss
fa3c6dea6a Correctly handle complex locations expressions in replaceDbgDeclareForAlloca()
replaceDbgDeclareForAlloca() replaces an alloca by a value storing the
address of what was the alloca. If there is a dbg.declare corresponding
to that alloca, we need to lower it to a dbg.value describing the additional
dereference operation to be performed to get to the underlying variable.
 This is done by adding a DW_OP_deref to the complex location part of the
location description. This deref was added to the end of the operation list,
which is wrong. The expression applies to what is described by the
dbg.{declare,value}, and as we are changing this, we need to apply the
DW_OP_deref as the first operation in the list.

Part of the fix for rdar://19162268.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 17:55:48 +00:00
Frederic Riss
1be6bc79f6 Deleting empty directories left over from r223794.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223798 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 17:50:27 +00:00
Juergen Ributzka
0ff2059da6 [CGP] Rewrite pattern match for splitBranchCondition to work with Values instead.
Rewrite the pattern match code to work also with Values instead with
Instructions only. Also remove the no longer need matcher (m_Instruction).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223797 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 17:50:10 +00:00
Juergen Ributzka
f3ac16dcb4 Revert "Move function to obtain branch weights into the BranchInst class. NFC."
This reverts commit r223784 and copies the 'ExtractBranchMetadata' to CodeGenPrepare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223795 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 17:32:12 +00:00
Frederic Riss
574ca2ad28 Revert "Initial dsymutil tool commit."
This reverts commit r223793. The review thread wasn't concluded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223794 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 17:21:50 +00:00
Frederic Riss
08550bc751 Initial dsymutil tool commit.
The goal of this tool is to replicate Darwin's dsymutil functionality
based on LLVM. dsymutil is a DWARF linker. Darwin's linker (ld64) does
not link the debug information, it leaves it in the object files in
relocatable form, but embbeds a `debug map` into the executable that
describes where to find the debug information and how to relocate it.
When releasing/archiving a binary, dsymutil is called to link all the DWARF
information into a `dsym bundle` that can distributed/stored along with
the binary.

With this commit, the LLVM based dsymutil is just able to parse the STABS
debug maps embedded by ld64 in linked binaries (and not all of them, for
example archives aren't supported yet).

Note that the tool directory is called dsymutil, but the executable is
currently called llvm-dsymutil. This discrepancy will disappear once the
tool will be feature complete. At this point the executable will be renamed
to dsymutil, but until then you do not want it to override the system one.

    Differential Revision: http://reviews.llvm.org/D6242

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223793 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 17:03:30 +00:00
Bill Schmidt
44603b67b1 [PowerPC 4/4] Enable little-endian support for VSX.
With the foregoing three patches, VSX instructions can be used for
little endian.  This patch removes the restriction that prevented
this, and re-enables the test cases from the first three patches.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223792 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:59:57 +00:00
Bill Schmidt
9a2a305ed4 [PowerPC 3/4] Little-endian adjustments for VSX vector shuffle
When performing instruction selection for ISD::VECTOR_SHUFFLE, there
is special code for handling v2f64 and v2i64 using VSX instructions.
This code must be adjusted for little-endian.  Because the two inputs
are treated as a double-wide register, we must swap their order for
little endian.  To get the appropriate mask elements to use with the
big-endian biased XXPERMDI instruction, we must reverse their order
and invert the bits.

A new test is added to test the 16 possible values of the shuffle
mask.  It is initially disabled for reasons specified in the test.  It
is re-enabled by patch 4/4.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223791 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:52:29 +00:00
Rafael Espindola
f214fe8b32 Remember the unmangled name in the plugin.
This allows it to work with non trivial manglings like the one in COFF.

Amusingly, this can be tested with gold, as emit-llvm causes the plugin to
exit before any COFF is generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223790 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:50:57 +00:00
Bill Schmidt
8eabcf7ce7 Add test cases that were inadvertently omitted from r223783 and r223788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:44:58 +00:00
Bill Schmidt
03b9f9f2b6 [PowerPC 2/4] Little-endian adjustments for VSX insert/extract operations
For little endian, we need to make some straightforward adjustments in
the code expansions for scalar_to_vector and vector_extract of v2f64.
First, scalar_to_vector must place the scalar into vector element
zero.  However, our implementation of SUBREG_TO_REG will place it into
big-element vector element zero (high-order bits), and for little
endian we need it in the low-order bits.  The LE implementation splats
the high-order doubleword into the low-order doubleword.

Second, the meaning of (vector_extract x, 0) and (vector_extract x, 1)
must be reversed for similar reasons.

A new test is added that tests code generation for insertelement and
extractelement for both element 0 and element 1.  It is disabled in
this patch but enabled in patch 4/4, for reasons stated in the test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223788 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:43:32 +00:00
Robert Khasanov
c50f9f15f5 [AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from General Purpose Register) encodings for AVX512-BW/VL subsets
Added encoding tests.
        


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:38:41 +00:00
Juergen Ributzka
b49ee78320 [CodeGenPrepare] Split branch conditions into multiple conditional branches.
This optimization transforms code like:
bb1:
  %0 = icmp ne i32 %a, 0
  %1 = icmp ne i32 %b, 0
  %or.cond = or i1 %0, %1
  br i1 %or.cond, label %TrueBB, label %FalseBB

into a multiple branch instructions like:

bb1:
  %0 = icmp ne i32 %a, 0
  br i1 %0, label %TrueBB, label %bb2
bb2:
  %1 = icmp ne i32 %b, 0
  br i1 %1, label %TrueBB, label %FalseBB

This optimization is already performed by SelectionDAG, but not by FastISel.
FastISel cannot perform this optimization, because it cannot generate new
MachineBasicBlocks.

Performing this optimization at CodeGenPrepare time makes it available to both -
SelectionDAG and FastISel - and the implementation in SelectiuonDAG could be
removed. There are currenty a few differences in codegen for X86 and PPC, so
this commmit only enables it for FastISel.

Reviewed by Jim Grosbach

This fixes rdar://problem/19034919.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223786 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:36:13 +00:00
Juergen Ributzka
c4dedab6a6 Add more pattern matchers for compares, instructions, and BinaryOperators. NFC.
Add a few more matchers to make the code in the next commit more compact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223785 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:36:10 +00:00
Juergen Ributzka
50f10eb432 Move function to obtain branch weights into the BranchInst class. NFC.
Make this function available to other parts of LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223784 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:36:06 +00:00
Bill Schmidt
b900895384 [PowerPC 1/4] Little-endian adjustments for VSX loads/stores
This patch addresses the inherent big-endian bias in the lxvd2x,
lxvw4x, stxvd2x, and stxvw4x instructions.  These instructions load
vector elements into registers left-to-right (with the first element
loaded into the high-order bits of the register), regardless of the
endian setting of the processor.  However, these are the only
vector memory instructions that permit unaligned storage accesses, so
we want to use them for little-endian.

To make this work, a lxvd2x or lxvw4x is replaced with an lxvd2x
followed by an xxswapd, which swaps the doublewords.  This works for
lxvw4x as well as lxvd2x, because for lxvw4x on an LE system the
vector elements are in LE order (right-to-left) within each
doubleword.  (Thus after lxvw2x of a <4 x float> the elements will
appear as 1, 0, 3, 2.  Following the swap, they will appear as 3, 2,
0, 1, as desired.)   For stores, an stxvd2x or stxvw4x is replaced
with an stxvd2x preceded by an xxswapd.

Introduction of extra swap instructions provides correctness, but
obviously is not ideal from a performance perspective.  Future patches
will address this with optimizations to remove most of the introduced
swaps, which have proven effective in other implementations.

The introduction of the swaps is performed during lowering of LOAD,
STORE, INTRINSIC_W_CHAIN, and INTRINSIC_VOID operations.  The latter
are used to translate intrinsics that specify the VSX loads and stores
directly into equivalent sequences for little endian.  Thus code that
uses vec_vsx_ld and vec_vsx_st does not have to be modified to be
ported from BE to LE.

We introduce new PPCISD opcodes for LXVD2X, STXVD2X, and XXSWAPD for
use during this lowering step.  In PPCInstrVSX.td, we add new SDType
and SDNode definitions for these (PPClxvd2x, PPCstxvd2x, PPCxxswapd).
These are recognized during instruction selection and mapped to the
correct instructions.

Several tests that were written to use -mcpu=pwr7 or pwr8 are modified
to disable VSX on LE variants because code generation changes with
this and subsequent patches in this set.  I chose to include all of
these in the first patch than try to rigorously sort out which tests
were broken by one or another of the patches.  Sorry about that.

The new test vsx-ldst-builtin-le.ll, and the changes to vsx-ldst.ll,
are disabled until LE support is enabled because of breakages that
occur as noted in those tests.  They are re-enabled in patch 4/4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223783 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:35:51 +00:00
Rafael Espindola
8a48c86a5f Move method out of line to make buildbot happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223781 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:18:11 +00:00
Rafael Espindola
4f20ed1c36 Don't lookup an object symbol name in the module.
Instead, walk the obj symbol list in parallel to find the GV. This shouldn't
change anything on ELF where global symbols are not mangled, but it is a step
toward supporting other object formats.

Gold itself is ELF only, but bfd ld supports COFF and the logic in the gold
plugin could be reused on lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223780 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 16:13:59 +00:00
Chandler Carruth
de0cdb0890 [x86] Fix the test to actually test things for the CPU names, add the
missing barcelona CPU which that test uncovered, and remove the 32-bit
x86 CPUs which I really wasn't prepared to audit and test thoroughly.

If anyone wants to clean up the 32-bit only x86 CPUs, go for it.

Also, if anyone else wants to try to de-duplicate the AMD CPUs, that'd
be cool, but from the looks of it wouldn't save as much as it did for
the Intel CPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 14:25:55 +00:00
Aaron Ballman
93fac96d4b Removing an unused variable to silence a -Wunused-but-set-variable warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223773 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 13:20:11 +00:00
Asiri Rathnayake
838ec33e0c Fix modified immediate bug reported by MC Hammer.
Instructions of the form [ADD Rd, pc, #imm] are manually aliased
in processInstruction() to use ADR. To accomodate this, mod_imm handling
had to be tweaked a bit. Turns out it was the manual aliasing that must
be tweaked to accommodate mod_imms instead. More information about the
parsed instruction is available at the point where processInstruction()
is invoked, which makes it easier to detect a mod_imm at that point rather
than trying to detect a potential alias when a mod_imm is being prepped.
Added a test case and fixed some white spaces as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223772 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 13:14:58 +00:00
Chandler Carruth
85bb610daf [x86] Add a test for the CPU names that should have been in r223769.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223770 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 11:19:57 +00:00
Chandler Carruth
8729843d31 [x86] Bring some sanity to the x86 CPU processor definitions.
Notably, this adds simple micro-architecture names for the Intel CPU
variants, and defines the old 'core'-based names as aliases. GCC has
started to simplify their documented interface to use these names as
well, so it seems like we can start to converge on a consistent pattern.

I'd appreciate Intel double checking the entries that aren't yet
documented widely, especially Atom (Bonnell and Silvermont), Knights
Landing, and Skylake. But this change shouldn't break any existing
users.

Also, ran clang-format to re-format this code and it actually worked
(modulo a tiny bug) so hopefully we can start to stop thinking about
formatting this stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223769 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 10:58:36 +00:00
Sonam Kumari
05a824843d Removal Of Duplicate Test Cases and Addition Of Missing Check Statements
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 10:46:38 +00:00
Ankur Garg
df35082f20 [test/Transforms/InstCombine/shift.ll] Removed duplicate test cases. NFC.
Removed some duplicate test cases from the file /test/Transforms/InstCombine/shift.ll.

test54 and test57 were duplicates of each other.
test55 and test58 were duplicates of each other.

(Removed test57 and test58)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223767 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 10:35:19 +00:00
Will Newton
f1f6524e05 Improve emacs coding style
Remove setting of default style, this way is not recommended and
means that all the settings have to be duplicated to demonstrate the
c-add-style method which is a much better way of doing it.

Remove the modified date as it is better stored in SVN.

Tweak a few style parameters to make them conform to the actual LLVM
style.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223765 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 08:58:31 +00:00
Chandler Carruth
e78a87b633 Teach instcombine to canonicalize "element extraction" from a load of an
integer and "element insertion" into a store of an integer into actual
element extraction, element insertion, and vector loads and stores.

Previously various parts of LLVM (including instcombine itself) would
introduce integer loads and stores into the code as a way of opaquely
loading and storing "bits". In some cases (such as a memcpy of
std::complex<float> object) we will eventually end up using those bits
in non-integer types. In order for SROA to effectively promote the
allocas involved, it splits these "store a bag of bits" integer loads
and stores up into the constituent parts. However, for non-alloca loads
and tsores which remain, it uses integer math to recombine the values
into a large integer to load or store.

All of this would be "fine", except that it forces LLVM to go through
integer math to combine and split up values. While this makes perfect
sense for integers (and in fact is critical for bitfields to end up
lowering efficiently) it is *terrible* for non-integer types, especially
floating point types. We have a much more canonical way of representing
the act of concatenating the bits of two SSA values in LLVM: a vector
and insertelement. This patch teaching InstCombine to use this
representation.

With this patch applied, LLVM will no longer introduce integer math into
the critical path of every loop over std::complex<float> operations such
as those that make up the hot path of ... oh, most HPC code, Eigen, and
any other heavy linear algebra library.

For the record, I looked *extensively* at fixing this in other parts of
the compiler, but it just doesn't work:
- We really do want to canonicalize memcpy and other bit-motion to
  integer loads and stores. SSA values are tremendously more powerful
  than "copy" intrinsics. Not doing this regresses massive amounts of
  LLVM's scalar optimizer.
- We really do need to split up integer loads and stores of this form in
  SROA or every memcpy of a trivially copyable struct will prevent SSA
  formation of the members of that struct. It essentially turns off
  SROA.
- The closest alternative is to actually split the loads and stores when
  partitioning with SROA, but this has all of the downsides historically
  discussed of splitting up loads and stores -- the wide-store
  information is fundamentally lost. We would also see performance
  regressions for bitfield-heavy code and other places where the
  integers aren't really intended to be split without seemingly
  arbitrary logic to treat integers totally differently.
- We *can* effectively fix this in instcombine, so it isn't that hard of
  a choice to make IMO.

Differential Revision: http://reviews.llvm.org/D6548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223764 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 08:55:32 +00:00
Michael Ilseman
ebaf61e498 Skip declarations in the case of functions.
This is a revert of r223521 in spirit, if not in content. I am not
sure why declarations ended up in LazilyLinkGlobalValues in the first
place; that will take some more investigation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223763 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 08:20:06 +00:00
Craig Topper
d5578c8ba3 Use range-based for loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 08:05:51 +00:00
Elena Demikhovsky
ff3745b4ff AVX-512: Added some comments to ERI scalar intrinsics.
No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-09 07:06:32 +00:00