Summary:
The accumulator-based (HI/LO) multiplies and divides from earlier ISA's have
been removed and replaced with GPR-based equivalents. For example:
div $1, $2
mflo $3
is now:
div $3, $1, $2
This patch disables the accumulator-based multiplies and divides for
MIPS32r6/MIPS64r6 and uses the GPR-based equivalents instead.
Renamed expandPseudoDiv to insertDivByZeroTrap to better describe the
behaviour of the function.
MipsDelaySlotFiller now invalidates the liveness information when moving
instructions to the delay slot. Without this, divrem.ll will abort since
%GP ends up used before it is defined.
Reviewers: vmedic, zoran.jovanovic, jkolek
Reviewed By: jkolek
Differential Revision: http://reviews.llvm.org/D3896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210760 91177308-0d34-0410-b5e6-96231b3b80d8
There is not such thing as a 0-data ds instruction, and the data
operand needs to be a vgpr set to something meaningful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210756 91177308-0d34-0410-b5e6-96231b3b80d8
The verifier follows GlobalAlias operands so that it can detect cycles of
alias definitions. It was doing this in a way that caused it to also recurse
through initializers for the GlobalValue aliasees, and it would fail when
an initializer refers to a global that is a declaration and not a definition.
This patch causes it to stop recursing when it hits a global definition.
<rdar://problem/17277451>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210734 91177308-0d34-0410-b5e6-96231b3b80d8
construction and destruction.
PassRegistrationListener is intended for use as a generic listener.
In some cases, PassRegistrationListener-derived classes were being
created, and automatically registered and de-registered in static
constructors and destructors. Since ManagedStatics are destroyed
prior to program shutdown, this leads to errors where an attempt is
made to access a ManagedStatic that has already been destroyed.
Reviewed by: rnk, dblaikie
Differential Revision: http://reviews.llvm.org/D4106
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210724 91177308-0d34-0410-b5e6-96231b3b80d8
This destructor is run as part of static program termination, and
so all ManagedStatics (including this lock) will have been
destroyed by llvm_shutdown. Furthermore, if there is actually
a race condition during static program termination, then we are
just hiding a bug somewhere else, because other threads should
not be running at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210717 91177308-0d34-0410-b5e6-96231b3b80d8
This will allow inlining get_magic, which should in turn fix one of the mingw
build problems after the switch to std::error_code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210712 91177308-0d34-0410-b5e6-96231b3b80d8
We weren't doing this before, so all instruction using the *Helper
classes were considered for any ALU slot.
This fixes a hang in the builtin-char-clz-1.0.generated.cl piglit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210703 91177308-0d34-0410-b5e6-96231b3b80d8
Previously we would always print the offset as decimal, regardless of
the formatting requested. Now we use the formatImm() helper so the value
is printed as the client (LLDB in the motivating example) requested.
Before:
ldr.w r8, [sp, #180] @ always
After:
ldr.w r8, [sp, #0xb4] @ when printing hex immediates
ldr.w r8, [sp, #0180] @ when printing decimal immediates
rdar://17237103
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210701 91177308-0d34-0410-b5e6-96231b3b80d8
Previously there was a separate mode entirely (--hdis vs.
--disassemble). It makes a bit more sense for the immediate printing
style to be a flag for --disassmeble rather than an entirely different
thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210700 91177308-0d34-0410-b5e6-96231b3b80d8
This is the same problem fixed in r210664 for more types.
The test passes without this fix. For some reason
I'm only hitting this when creating selects lowered
to v2i32 selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210692 91177308-0d34-0410-b5e6-96231b3b80d8
The idea of this patch is to turn llvm/Support/system_error.h into a
transitional header that just brings in the erorr_code api to the llvm
namespace. I will remove it shortly afterwards.
The cases where the general idea needed some tweaking:
* std::errc is a namespace in msvc, so we cannot use "using std::errc". I could
add an #ifdef, but there were not that many uses, so I just added std:: to
them in this patch.
* Template specialization had to be moved to the std namespace in this
patch set already.
* The msvc implementation of default_error_condition doesn't seem to
provide the same transformations as we need. Not too surprising since
the standard doesn't actually say what "equivalent" means. I fixed the
problem by keeping our old mapping and using it at error_code
construction time.
Despite these shortcomings I think this is still a good thing. Some reasons:
* The different implementations of system_error might improve over time.
* It removes 925 lines of code from llvm already.
* It removes 6313 bytes from the text segment of the clang binary when
it is built with gcc and 2816 bytes when building with clang and
libstdc++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210687 91177308-0d34-0410-b5e6-96231b3b80d8
The manual lists them as *_RTN_U32, not *_U32_RTN, which is more
consistent with how every other sized instruction is named.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210674 91177308-0d34-0410-b5e6-96231b3b80d8
There seem to be only 2 places that produce these,
and it's kind of tricky to hit them.
Also fixes failure to bitcast between i64 and v2f32,
although this for some reason wasn't actually broken in the
simple bitcast testcase, but did in the scalar_to_vector one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210664 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
MIPS32r6/MIPS64r6 support has not been added yet.
inlineasm-cnstrnt-reg.ll:
Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6
when -integrated-as is the default. We can't change the mnemonic since the
LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no
instructions that use LO.
2008-08-01-AsmInline.ll:
Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit
different code and this is a regression test.
mips64instrs.ll and mips64muldiv.ll
Check registers and the way the multiply is used in m1
divrem.ll
Check registers and use multiple filecheck prefixes to limit redundancy
Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida
Reviewed By: matheusalmeida
Subscribers: matheusalmeida
Differential Revision: http://reviews.llvm.org/D3894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210656 91177308-0d34-0410-b5e6-96231b3b80d8
