150952 Commits

Author SHA1 Message Date
Kevin Enderby
96e8b4cb36 Updated llvm-objdump symbolic disassembly with x86_64 Mach-O MH_KEXT_BUNDLE
file types so it symbolically disassembles operands using the external
relocation entries.

rdar://31521343


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306037 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 17:41:22 +00:00
Rafael Espindola
6f1c76b0b9 Add a common error checking for some invalid expressions.
This refactors a bit of duplicated code and fixes an assertion failure
on ELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 17:25:35 +00:00
David Stuttard
9066575ebe [AMDGPU] Add intrinsics for tbuffer load and store - build error fix
Variable was unused in non-debug build (used in assert) causing compile time
warning and eventual build failure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306034 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 17:15:49 +00:00
Sanjay Patel
ea114fd519 [x86] add tests for select --> sbb transform; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 17:01:14 +00:00
David Stuttard
dad6e61ce7 [AMDGPU] Add intrinsics for tbuffer load and store
Intrinsic already existed for llvm.SI.tbuffer.store

Needed tbuffer.load and also re-implementing the intrinsic as llvm.amdgcn.tbuffer.*

Added CodeGen tests for the 2 new variants added.
Left the original llvm.SI.tbuffer.store implementation to avoid issues with existing code

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, tpr

Differential Revision: https://reviews.llvm.org/D30687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 16:29:22 +00:00
Krzysztof Parzyszek
5715184cc4 [Hexagon] Fix typo in a testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 16:25:46 +00:00
Craig Topper
bba5503eed [InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).

This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.

Reviewers: spatel, majnemer, davide

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 16:23:30 +00:00
Teresa Johnson
8c8509b508 [ThinLTO] Remove unnecessary include of Linker.h (NFC)
The ModuleLinker is no longer used by ThinLTO, so this is not needed.

Patch by Benoit Belley <Benoit.Belley@autodesk.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 16:18:48 +00:00
Craig Topper
b776efaa09 [InstCombine] Add one use checks to or/and->xnor folding
If the components of the and/or had multiple uses, this transform created an additional instruction.

This patch makes sure we remove one of the components.

Differential Revision: https://reviews.llvm.org/D34498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306027 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 16:12:02 +00:00
Krzysztof Parzyszek
52e734792d [Hexagon] Handle a global operand to A2_addi when creating duplexes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306012 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:53:31 +00:00
Sanjay Patel
4c45e36dd8 [InstCombine] reverse bitcast + bitwise-logic canonicalization (PR33138)
There are 2 parts to this patch made simultaneously to avoid a regression.

We're reversing the canonicalization that moves bitwise vector ops before bitcasts. 
We're moving bitwise vector ops *after* bitcasts instead. That's the 1st and 3rd hunks 
of the patch. The motivation is that there's only one fold that currently depends on 
the existing canonicalization (see next), but there are many folds that would 
automatically benefit from the new canonicalization. 
PR33138 ( https://bugs.llvm.org/show_bug.cgi?id=33138 ) shows why/how we have these 
patterns in IR.

There's an or(and,andn) pattern that requires an adjustment in order to continue matching
to 'select' because the bitcast changes position. This match is unfortunately complicated 
because it requires 4 logic ops with optional bitcast and sext ops.

Test diffs:

  1. The bitcast.ll and bitcast-bigendian.ll changes show the most basic difference - 
     bitcast comes before logic.
  2. There are also tests with no diffs in bitcast.ll that verify that we're still doing 
     folds that were enabled by the previous canonicalization.
  3. icmp-xor-signbit.ll shows the payoff. We don't need to adjust existing icmp patterns 
     to look through bitcasts.
  4. logical-select.ll contains several tests for the or(and,andn) --> select fold to 
     verify that we are still handling those cases. The lone diff shows the movement of 
     the bitcast from the new canonicalization rule.

Differential Revision: https://reviews.llvm.org/D33517



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306011 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:46:54 +00:00
whitequark
3a93e4af81 [X86] Add support for "probe-stack" attribute
This commit adds prologue code emission for stack probe function
calls.

Reviewed By: majnemer

Differential Revision: https://reviews.llvm.org/D34387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306010 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:42:53 +00:00
Florian Hahn
bd91b7fe65 [ARM] Create relocations for beq.w branches to ARM function syms.
Summary:
The ARM ELF ABI requires the linker to do interworking for wide
conditional branches from Thumb code to ARM code. 

That was pointed out by @peter.smith in the comments for D33436.

Reviewers: rafael, peter.smith, echristo

Reviewed By: peter.smith

Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, peter.smith

Differential Revision: https://reviews.llvm.org/D34447

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:32:41 +00:00
Sanjay Patel
e8033d703b [InstCombine] add peekThroughBitcast() helper; NFC
This is an NFC portion of D33517. We have similar helpers in the backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306008 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:28:01 +00:00
Petar Jovanovic
27bff2421e [mips] Allow $AT to be used as a register name
This patch allows $AT to be used as a register name in assembly files.
Currently only $at is recognized as a valid register name.

Patch by Stanislav Ocovaj.

Differential Revision: https://reviews.llvm.org/D34348


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:24:16 +00:00
Nirav Dave
9bd0f56ab3 [DAG] Add Target Store Merge pass ordering function
Allow targets to specify if they should merge stores before or after
legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306006 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 15:07:49 +00:00
Pavel Labath
2dfb7e4fe8 Revert "[Support] Add RetryAfterSignal helper function" and subsequent fix
The fix in r306003 uncovered a pretty fundamental problem that libc++
implementation of std::result_of does not handle the prototype of
open(2) correctly (presumably because it contains ...). This makes the
whole function unusable in its current form, so I am also reverting the
original commit (r305892), which introduced the function, at least until
I figure out a way to solve the libc++ issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 14:18:55 +00:00
Krzysztof Parzyszek
7e5eff00e0 [Hexagon] Recognize potential offset overflow for store-imm to stack
Reserve an extra scavenging stack slot if the offset field in store-
-immediate instructions may overflow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 14:11:23 +00:00
Pavel Labath
fc01a4a7c8 [Support] Fix return type deduction in RetryAfterSignal
The default value of the ResultT template argument (which was there only
to avoid spelling out the long std::result_of template multiple times)
was being overriden by function call template argument deduction. This
manifested itself as a compiler error when calling the function as
FILE *X = RetryAfterSignal(nullptr, fopen, ...)
because the function would try to assign the result of fopen to
nullptr_t, but a more insidious side effect was that
RetryAfterSignal(-1, read, ...) would return "int" instead of "ssize_t",
losing precision along the way.

I fix this by having the function take the argument in a way that
prevents argument deduction from kicking in and add a test that makes
sure the return type is correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306003 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 13:55:54 +00:00
Kamil Rytarowski
fb1808c254 [Solaris] replace Solaris.h hack with a set of better hacks
Summary:
Got rid of unwieldy -include Solaris.h portability solution, replacing it with interposed header and moving endian defines into Host.h.

Fixes PR28370.

Reviewers: joerg, alekseyshl, mgorny

Reviewed By: joerg

Subscribers: llvm-commits, mgorny, ro, krytarowski

Patch by Fedor Sergeev.

Differential Revision: https://reviews.llvm.org/D3413


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306002 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 13:18:46 +00:00
Pavel Labath
841b888a68 [Testing/Support] Remove the const_cast in TakeExpected
Summary:
The const_cast in the "const" version of TakeExpected was quite
dangerous, as the function does indeed modify the apparently const
argument.

I assume the reason the const overload was added was to make the
function bind to xvalues(temporaries). That can be also achieved with
rvalue references, so I use that instead.

Using the ASSERT macros on const Expected objects will now become
illegal, but I believe that is correct, as it is not actually possible
to inspect the error stored in an Expected object without modifying it.

Reviewers: zturner, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34405

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306001 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 13:11:50 +00:00
Sagar Thakur
7cbb839d2b Revert [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocations in RuntimeDyld
Reverting due to build bot failures



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306000 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 12:48:04 +00:00
Sam Kolton
1f2bcd710f [AMDGPU] SDWA: remove support for VOP2 instructions that have only 64-bit encoding
Summary:
Despite that this instructions are listed in VOP2, they are treated as VOP3 in specs. They should not support SDWA.
There are no real instructions for them, but there are pseudo instructions.

Reviewers: arsenm, vpykhtin, cfang

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D34403

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305999 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 12:42:14 +00:00
Kristof Beyls
bfafbd5fbf Don't conditionalize Neon instructions, even in IT blocks.
This has been deprecated since ARMARM v7-AR, release C.b, published back
in 2012.

This also removes test/CodeGen/Thumb2/ifcvt-neon.ll that originally was
introduced to check that conditionalization of Neon instructions did
happen when generating Thumb2. However, the test had evolved and was no
longer testing that. Rather than trying to adapt that test, this commit
introduces test/CodeGen/Thumb2/ifcvt-neon-deprecated.mir, since we can
now use the MIR framework to write nicer/more maintainable tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305998 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 12:11:38 +00:00
Sagar Thakur
9410186031 [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocations in RuntimeDyld
After the N64 static relocation model support was added to llvm it is required to add its support in RuntimeDyld also because lldb uses ExecutionEngine for evaluating expressions.

Reviewed by sdardis
Differential: D31649


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305997 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 11:49:19 +00:00
Simon Dardis
00619943f0 [mips] Implement the ".rdata" MIPS assembly directive.
Rather than creating a separate ".rdata" section distinct from the
customary ".rodata" in ELF, ".rdata" switches to the ".rodata" section.

This patch relands r305949 and r305950 with the correct commit message
and addresses nit raised during review.

Patch By: John Baldwin!

Differential Revision: https://reviews.llvm.org/D34452



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305995 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 10:41:51 +00:00
Ekaterina Vaartis
5ffaf3e12f Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 10:38:49 +00:00
John Brawn
e001a156b8 [ARM] Add .w aliases of MOV with shifted operand
These appear to have been simply missing.

Differential Revision: https://reviews.llvm.org/D34461


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 10:30:53 +00:00
John Brawn
943dd9a9fe [ARM] Clean up choice of narrow instructions in ARMAsmParser, NFC
This patch makes a couple of changes to how we decide whether to use the narrow
or wide encoding of thumb2 instructions:
 * Common out the detection of the .w qualifier
 * Check for the CPSR operand in a consistent way

Differential Revision: https://reviews.llvm.org/D34460


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 10:29:31 +00:00
Diana Picus
e36adbda88 Revert "Enable vectorizer-maximize-bandwidth by default."
This reverts commit r305960 because it broke self-hosting on AArch64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305990 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 10:00:28 +00:00
Igor Breger
54b8b993d1 [GlobalISel][X86] Support vector type G_INSERT legalization/selection.
Summary:
Support vector type G_INSERT legalization/selection.
Split from https://reviews.llvm.org/D33665

Reviewers: qcolombet, t.p.northover, zvi, guyblank

Reviewed By: guyblank

Subscribers: guyblank, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305989 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 09:43:35 +00:00
Florian Hahn
7ebe2a2831 [ARM] Add macro fusion for AES instructions.
Summary:
This patch adds a macro fusion using CodeGen/MacroFusion.cpp to pair AES
instructions back to back and adds FeatureFuseAES to enable the feature.

Reviewers: evandro, javed.absar, rengolin, t.p.northover

Reviewed By: javed.absar

Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305988 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 09:39:36 +00:00
Elena Demikhovsky
347e991cca AVX-512: Lowering Masked Gather intrinsic - fixed a bug
Masked gather for vector length 2 is lowered incorrectly for element type i32.
The type <2 x i32> was automatically extended to <2 x i64> and we generated VPGATHERQQ instead of VPGATHERQD.
The type <2 x float> is extended to <4 x float>, so there is no bug for this type, but the sequence may be more optimal.

In this patch I'm fixing <2 x i32>bug and optimizing <2 x float> sequence for GATHERs only. The same fix should be done for Scatters as well.

Differential revision: https://reviews.llvm.org/D34343



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305987 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 06:47:41 +00:00
Sam Kolton
e88fc4046f [AMDGPU] SDWA: add support for GFX9 in peephole pass
Summary:
Added support based on merged SDWA pseudo instructions. Now peephole allow one scalar operand, omod and clamp modifiers.
Added several subtarget features for GFX9 SDWA.
This diff also contains changes from D34026.
Depends D34026

Reviewers: vpykhtin, rampitec, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D34241

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305986 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 06:26:41 +00:00
Craig Topper
e696366e67 [InstCombine] Add test cases to demonstrate that and->xnor and or->xnor folding can create more instructions than it removed when there are multiple uses. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305985 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 05:20:39 +00:00
Hiroshi Inoue
9afae17999 [PowerPC] fix potential verification errors
This patch fixes trivial mishandling of 32-bit/64-bit instructions that may cause verification errors with -verify-machineinstrs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305984 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 04:33:44 +00:00
Reid Kleckner
367f21dc72 [llvm-readobj] Dump the COFF image load config
This includes the safe SEH tables and the control flow guard function
table. LLD will emit the guard table soon, and I need a tool that dumps
them for testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305979 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 01:10:29 +00:00
Reid Kleckner
42bbb7fb32 [wasm] Fix WebAssembly asm backend after r305968
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305978 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 01:07:05 +00:00
Rafael Espindola
2eeaae37a5 Also test thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305976 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 00:44:05 +00:00
Davide Italiano
05a4b44a1b Revert "[Target] Implement the ".rdata" MIPS assembly directive."
This reverts commit r305949 and r305950 as they didn't have the
correct commit message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305973 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 00:11:41 +00:00
Sam Clegg
4f724efaa6 [WebAssembly] Cleanup WasmObjectWriter.cpp. NFC
- Use auto where appropriate
- Use early return to reduce nesting
- Remove stray comment line
- Use C++ foreach over explicit iterator

Differential Revision: https://reviews.llvm.org/D34477

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305971 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 23:46:41 +00:00
Stanislav Mekhanoshin
91cd127b89 [AMDGPU] Add FP_CLASS to the add/setcc combine
This is one of the nodes which also compile as v_cmp_*.

Differential Revision: https://reviews.llvm.org/D34485

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305970 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 23:46:22 +00:00
Eugene Zelenko
dfaebc43c9 [ProfileData, Support] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305969 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 23:19:47 +00:00
Rafael Espindola
bb561ec060 Use a MutableArrayRef. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305968 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 23:06:53 +00:00
Rafael Espindola
91f66751eb Fix build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305967 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 23:02:57 +00:00
Bob Haarman
d0b66dbf40 [codeview] respect signedness of APSInts when printing to YAML
Summary:
This fixes a bug where we always treat APSInts in Codeview as
signed when writing them to YAML. One symptom of this problem is that
llvm-pdbdump raw would show Enumerator Values that differ between the
original PDB and a PDB that has been round-tripped through YAML.

Reviewers: zturner

Reviewed By: zturner

Subscribers: llvm-commits, fhahn

Differential Revision: https://reviews.llvm.org/D34013

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305965 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 22:31:52 +00:00
Stanislav Mekhanoshin
6189e64739 [AMDGPU] Combine add and adde, sub and sube
If one of the arguments of adde/sube is zero we can fold another
add/sub into it.

Differential Revision: https://reviews.llvm.org/D34374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305964 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 22:30:01 +00:00
Sam Clegg
b209206d2c Mark dump() methods as const. NFC
Add const qualifier to any dump() method where adding one
was trivial.

Differential Revision: https://reviews.llvm.org/D34481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305963 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 22:19:17 +00:00
Stanislav Mekhanoshin
1a1f544263 [AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc
This simplification allows to avoid generating v_cndmask_b32
to serialize condition code between compare and use.

Differential Revision: https://reviews.llvm.org/D34300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305962 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 22:05:06 +00:00
NAKAMURA Takumi
52c6452739 TableGen.cmake: Use DEPFILE for Ninja Generator with CMake>=3.7.
CMake emits build targets as relative paths (from build.ninja) but Ninja doesn't identify absolute path (in *.d) as relative path (in build.ninja).
So, let file names, in the command line, relative from ${CMAKE_BINARY_DIR}, where build.ninja is.

Note that tblgen is executed on ${CMAKE_BINARY_DIR} as working directory.

Differential Revision: https://reviews.llvm.org/D33707

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305961 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 22:04:07 +00:00