Commit Graph

130773 Commits

Author SHA1 Message Date
Chad Rosier
4d87cf623d Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267399 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 13:25:14 +00:00
Krzysztof Parzyszek
8a38a6017e [Hexagon] Correctly set "Flags" in ELF header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267397 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 12:49:47 +00:00
James Molloy
c8f01da286 [GlobalOpt] Allow constant globals to be SRA'd
The current logic assumes that any constant global will never be SRA'd. I presume this is because normally constant globals can be pushed into their uses and deleted. However, that sometimes can't happen (which is where you really want SRA, so the elements that can be eliminated, are!).

There seems to be no reason why we can't SRA constants too, so let's do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267393 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 10:48:29 +00:00
Igor Kudrin
3c7ad33b0b [Coverage] Restore the correct count value after processing a nested region in case of combined regions.
If several regions cover the same area of code, we have to restore
the combined value for that area when return from a nested region.

This patch achieves that by combining regions before calling buildSegments.

Differential Revision: http://reviews.llvm.org/D18610


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267390 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 09:43:37 +00:00
Silviu Baranga
5a397274ef [SCEV] Improve the run-time checking of the NoWrap predicate
Summary:
This implements a new method of run-time checking the NoWrap
SCEV predicates, which should be easier to optimize and nicer
for targets that don't correctly handle multiplication/addition
of large integer types (like i128).

If the AddRec is {a,+,b} and the backedge taken count is c,
the idea is to check that |b| * c doesn't have unsigned overflow,
and depending on the sign of b, that:

   a + |b| * c >= a (b >= 0) or
   a - |b| * c <= a (b <= 0)

where the comparisons above are signed or unsigned, depending on
the flag that we're checking.

The advantage of doing this is that we avoid extending to a larger
type and we avoid the multiplication of large types (multiplying
i128 can be expensive).

Reviewers: sanjoy

Subscribers: llvm-commits, mzolotukhin

Differential Revision: http://reviews.llvm.org/D19266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267389 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 09:27:16 +00:00
Marcin Koscielnicki
c627cc351a [PowerPC] [PR27387] Disallow r0 for ADD8TLS.
ADD8TLS, a variant of add instruction used for initial-exec TLS,
currently accepts r0 as a source register.  While add itself supports
r0 just fine, linker can relax it to a local-exec sequence, converting
it to addi - which doesn't support r0.

Differential Revision: http://reviews.llvm.org/D19193

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267388 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 09:24:34 +00:00
Mehdi Amini
3f9946eb0d Run GlobalOpt before emitting the bitcode for ThinLTO
This is motivated by reducing the size of the IR and thus reduce
compile time.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267385 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 08:47:49 +00:00
Mehdi Amini
7d2a81594a ThinLTO: Move createNameAnonFunctionPass insertion in PassManagerBuilder (NFC)
It is just code motion, but makes more sense this way.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267384 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 08:47:37 +00:00
Igor Breger
485b34b54f fix comments
related to  
Differential Revision: http://reviews.llvm.org/D17913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267383 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 08:30:28 +00:00
Michael Zuckerman
72cd5936fd Fixing wrong mask size error. From __mmask8 to __mmask16.
Was reviewed over the shoulder by AsafBadouh.
Connected to review http://reviews.llvm.org/D19195.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267379 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 05:27:51 +00:00
Davide Italiano
50e602f06f [Support/ELFRelocs] Add R_386_GOT32X.
The new relocation recently defined in the Intel386 psABI
was still missing from this file. A subsequent commit will
add support for GOT32X in MC, together with a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267378 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 04:38:08 +00:00
Craig Topper
4bc7520d7e [X86] Replace a SmallVector used to pass 2 values to an ArrayRef parameter with a fixed size array. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267377 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 04:30:29 +00:00
Junmo Park
5aea4d1b7f Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267375 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 01:40:54 +00:00
Craig Topper
85a7d561e2 [X86] Add a complete set of tests for all operand sizes of cttz/ctlz with and without zero undef being lowered to bsf/bsr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267373 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 01:01:15 +00:00
Adrian Prantl
c5cc3f2a20 Verifier: Verify that each inlinable callsite of a debug-info-bearing function
in a debug-info-bearing function has a debug location attached to it. Failure to
do so causes an "!dbg attachment points at wrong subprogram for function"
assertion failure when the inliner sets up inline scope info.

rdar://problem/25878916

This reaplies r267320 without changes after fixing an issue in the OpenMP IR
generator in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267370 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 22:23:13 +00:00
Rafael Espindola
4c6a7658fc Also check the IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267367 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 21:42:56 +00:00
Rafael Espindola
5a63926ffa Add a test for how we handle protected visibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267366 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 21:30:18 +00:00
Simon Pilgrim
ff7d156e10 [X86][AVX] Added PR24935 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267362 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 20:30:48 +00:00
Saleem Abdulrasool
43355ace0e ARM: fix __chkstk Frame Setup on WoA
This corrects the MI annotations for the stack adjustment following the __chkstk
invocation.  We were marking the original SP usage as a Def rather than Kill.
The (new) assigned value is the definition, the original reference is killed.

Adjust the ISelLowering to mark Kills and FrameSetup as well.

This partially resolves PR27480.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267361 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 20:12:48 +00:00
Simon Pilgrim
fe702865fb Tweak comments to make it clear that these combines are for SSE scalar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267360 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 19:31:56 +00:00
Simon Pilgrim
a07a9dbeff [InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is required
As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267359 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 18:35:59 +00:00
Simon Pilgrim
6efee72867 [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 2 of 2)
Split from D17490. This patch improves support for determining the demanded vector elements through SSE scalar intrinsics:

1 - demanded vector element support for unary and some extra binary scalar intrinsics (RCP/RSQRT/SQRT/FRCZ and ADD/CMP/DIV/ROUND).

2 - addss/addsd get simplified to a fadd call if we aren't interested in the pass through elements

3 - if we don't need the lowest element of a scalar operation then just use the first argument (the pass through elements) directly

We can add support for propagating demanded elements through any equivalent packed SSE intrinsics in a future patch (these wouldn't use the pass through patterns).

Differential Revision: http://reviews.llvm.org/D19318

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267357 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 18:23:14 +00:00
Simon Pilgrim
0a660a2b80 [InstCombine][SSE] Demanded vector elements for scalar intrinsics (Part 1 of 2)
This patch improves support for determining the demanded vector elements through SSE scalar intrinsics:

1 - recognise that we only need the lowest element of the second input for binary scalar operations (and all the elements of the first input)

2 - recognise that the roundss/roundsd intrinsics use the lowest element of the second input and the remaining elements from the first input

Differential Revision: http://reviews.llvm.org/D17490

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267356 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 18:12:42 +00:00
Simon Pilgrim
db74d7c300 [InstCombine] Avoid updating argument demanded elements in separate passes.
As discussed on D17490, we should attempt to update an intrinsic's arguments demanded elements in one pass if we can.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267355 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 17:57:27 +00:00
Nick Lewycky
a0613703b4 Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267354 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 17:55:57 +00:00
Nick Lewycky
7be7739e12 Remove emacs mode markers from .cpp files. NFC
.cpp files are unambiguously C++, you only need the mode markers on .h files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267353 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 17:55:41 +00:00
Simon Pilgrim
c4d2c7c24e [X86][InstCombine] Tidyup VPERMILVAR -> shufflevector conversion to helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267352 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 17:23:46 +00:00
Simon Pilgrim
a3ce49106c [X86][InstCombine] Tidyup PSHUFB -> shufflevector conversion to helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267351 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 17:00:34 +00:00
Simon Pilgrim
2bfa472698 [X86][SSE] getTargetShuffleMaskIndices - dropped (unused) UNDEF handling
We aren't currently making use of this in any successful mask decode and its actually incorrect as it inserts the wrong number of SM_SentinelUndef mask elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267350 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 16:49:53 +00:00
Simon Pilgrim
3b640cc9ab [X86][SSE] Use range loop. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267349 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 16:33:35 +00:00
Craig Topper
67c79eb14c [Lanai] Use EVT::getEVTString() to print a type as a string instead of an enum encoding value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267348 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 16:30:51 +00:00
Simon Pilgrim
8b9bfa9ca1 [X86][SSE] Added SSSE3/AVX/AVX2 BITREVERSE tests
Codegen is pretty bad at the moment but could use PSHUFB quite efficiently 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267347 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 15:45:06 +00:00
Simon Pilgrim
3f1ed3f5aa [X86][XOP] Fixed VPPERM permute op decoding (PR27472).
Fixed issue with VPPERM target shuffle mask decoding that was incorrectly masking off the 3-bit permute op with a 2-bit mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267346 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 15:05:04 +00:00
Duncan P. N. Exon Smith
f8838c9ca2 BitcodeReader: Delay metadata parsing until reading a function body
There's hardly any functionality change here.  Instead of calling
materializeMetadata on the first call to materialize(GlobalValue*), wait
until the first one that's actually going to do something.  Noticed by
inspection; I don't have a concrete case where this makes a difference.

Added an assertion in materializeMetadata to be sure this (or a future
change) doesn't delay materializeMetadata after function-level metadata.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267345 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 15:04:28 +00:00
Teresa Johnson
ff1d72888b [ThinLTO] Remove GlobalValueInfo class from index
Summary:
Remove the GlobalValueInfo and change the ModuleSummaryIndex to directly
reference summary objects. The info structure was there to support lazy
parsing of the combined index summary objects, which is no longer
needed and not supported.

Reviewers: joker.eph

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19462

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267344 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 14:57:11 +00:00
Simon Pilgrim
76e20279a3 [X86][SSE] Improved support for decoding target shuffle masks through bitcasts
Reused the ability to split constants of a type wider than the shuffle mask to work with masks generated from scalar constants transfered to xmm.

This fixes an issue preventing PSHUFB target shuffle masks decoding rematerialized scalar constants and also exposes the XOP VPPERM bug described in PR27472.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267343 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 14:53:54 +00:00
Duncan P. N. Exon Smith
311d89d774 ModuleSummaryIndex: Avoid enum bitfields for MSVC portability
Enum bitfields have crazy portability issues with MSVC.  Use unsigned
instead of LinkageTypes here in the ModuleSummaryIndex to address
Takumi's concerns from r267335.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267342 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 14:25:37 +00:00
Duncan P. N. Exon Smith
879fccddd3 Revert "Declare GlobalValue::LinkageTypes based on unsigned."
This reverts commit r267335.  The build has been broken for hours
because of it:

  http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/23352/

The correct fix is avoid using any enum in a bitfield.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267341 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 14:13:17 +00:00
Marcin Koscielnicki
534be04157 [SystemZ] [SSP] Add support for LOAD_STACK_GUARD.
This fixes PR22248 on s390x.  The previous attempt at this was D19101,
which was before LOAD_STACK_GUARD existed.  Compared to the previous
version, this always emits a rather ugly block of 4 instructions, involving
a thread pointer load that can't be shared with other potential users.
However, this is necessary for SSP - spilling the guard value (or thread
pointer used to load it) is counter to the goal, since it could be
overwritten along with the frame it protects.

Differential Revision: http://reviews.llvm.org/D19363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267340 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 13:57:49 +00:00
Simon Pilgrim
ff70139057 [X86][SSE] Demonstrate issue with decoding shuffle masks that have been lowered as rematerialized constants on scalar unit
Found whilst investigating PR27472


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 13:45:30 +00:00
Aaron Ballman
37c06ef983 Silence two C4806 warnings ('|': unsafe operation: no value of type 'bool' promoted to type 'const unsigned int' can equal the given constant). The fact that they trigger with this code seems like it may be a bug, but the warning itself is still generally useful enough to retain it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267337 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 13:03:20 +00:00
NAKAMURA Takumi
67d948482b Declare GlobalValue::LinkageTypes based on unsigned.
Or, "LinkageTypes Linkage : 4;" might be sign-extended on msc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267335 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 10:11:45 +00:00
NAKAMURA Takumi
028b451b44 llvm/test/tools/gold/X86/thinlto.ll: Possible fix corresponding to r267318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267334 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 08:02:00 +00:00
Duncan P. N. Exon Smith
a61a99b62e BitcodeReader: Fix some holes in upgrade from r267296
Add tests for some missing cases to bitcode upgrade in r267296.

  - DICompositeType with an 'elements:' field, which will cause it to be
    involved in a cycle after the upgrade.

  - A DIDerivedType that references a class in 'extraData:'.

I updated test/Bitcode/dityperefs-3.8.ll with the missing cases and
regenerated test/Bitcode/dityperefs-3.8.ll.bc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267332 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 06:52:01 +00:00
Craig Topper
c8d2e3b5cb [X86] Merge LowerCTLZ and LowerCTLZ_ZERO_UNDEF into a single function that branches internally for the one difference, allowing the rest of the code to be common. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267331 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 06:27:39 +00:00
Craig Topper
5a6c34b731 [X86] Node need to check if AVX512 is supported when lowering vector CTLZ. The CTLZ operation is only Custom for vectors if AVX512 is enabled so if a vector gets here AVX512 is implied. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267330 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 06:27:35 +00:00
Mehdi Amini
822155bcb5 Add "hasSection" flag in the Summary
Reviewers: tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19405

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267329 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 05:31:43 +00:00
Gerolf Hoflehner
3f71db1efb [MachineCombiner] Support for floating-point FMA on ARM64 (re-commit r267098)
The original patch caused crashes because it could derefence a null pointer
for SelectionDAGTargetInfo for targets that do not define it.

Evaluates fmul+fadd -> fmadd combines and similar code sequences in the
machine combiner. It adds support for float and double similar to the existing
integer implementation. The key features are:

- DAGCombiner checks whether it should combine greedily or let the machine
combiner do the evaluation. This is only supported on ARM64.
- It gives preference to throughput over latency: the heuristic used is
to combine always in loops. The targets decides whether the machine
combiner should optimize for throughput or latency.
- Supports for fmadd, f(n)msub, fmla, fmls patterns
- On by default at O3 ffast-math



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267328 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 05:14:01 +00:00
Craig Topper
f5542f610c [X86] Remove isel patterns for selecting tzcnt/lzcnt from cmove/ne+cttz/ctlz. These are folded by DAG combine now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267326 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 04:38:34 +00:00
Craig Topper
c0f92c94ab [CodeGen] Teach DAG combine to fold select_cc seteq X, 0, sizeof(X), ctlz_zero_undef(X) -> ctlz(X). InstCombine already does this for IR and X86 pattern matches this during isel.
A follow up commit will remove the X86 patterns to allow this to be tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267325 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 04:38:32 +00:00