36961 Commits

Author SHA1 Message Date
Tim Northover
401c43dfc3 ARM: fix handling of movw/movt relocations with addend.
We were emitting only one half of a the paired relocations needed for these
instructions because we decided that an offset needed a scattered relocation.
In fact, movw/movt relocations can be paired without being scattered.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261679 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 20:20:23 +00:00
Geoff Berry
54db5571ec [AArch64] Generate csinv instruction more often
Reviewers: t.p.northover, jmolloy

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261675 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 19:34:13 +00:00
Davide Italiano
f93279bef6 [X86ISelLowering] Stop typing the same return over and over and over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261666 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 18:39:38 +00:00
Weiming Zhao
c922999776 Fix PR25339: ARM Constant Island
Summary:
Currently, the ARM Constant Island may not converge (or not converge quickly).
This patch let it move to the closest water after the user if it doesn't converge after 15 iterations.

This address https://llvm.org/bugs/show_bug.cgi?id=25339

Reviewers: t.p.northover, srhines, kristof.beyls, aadg, rengolin

Subscribers: weimingz, aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D16890

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261665 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 18:39:19 +00:00
Derek Schuff
c15325e5a1 [WebAssembly] Add TODO comment to revisit red zone size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261664 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 18:17:46 +00:00
Derek Schuff
8ff73c1307 [WebAssembly] Implement red zone for user stack
Implements a mostly-conventional redzone for the userspace
stack. Because we have unsigned load/store offsets we continue to use a
local SP subtracted from the incoming SP but do not write it back to
memory.

Differential Revision: http://reviews.llvm.org/D17525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261662 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 18:13:07 +00:00
Geoff Berry
58820d4f87 [AArch64] Fix fastcc -tailcallopt epilog code generation.
Summary:
Fix a bug in epilog generation where the incoming stack arguments were
not being popped for fastcc functions when -tailcallopt was passed.

Reviewers: t.p.northover, mcrosier, jmolloy, rengolin

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16894

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261650 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 16:54:36 +00:00
Aaron Ballman
6d92f5b545 Silencing a signed vs unsigned mismatch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261640 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 15:02:43 +00:00
Chad Rosier
6828fd91e9 [AArch64] Fix comment typo in Cyclone scheduling defs. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261637 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 14:05:13 +00:00
Junmo Park
b2eca29685 [ARM] fix initialization of PredictableSelectIsExpensive
Summary:
If we want classify OoO or not, using getSchedModel().isOutOfOrder()
could be more proper way than using Subtarget->isLikeA9().

Reviewers: jmolloy, rengolin

Differential Revision: http://reviews.llvm.org/D17433


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261623 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 09:56:58 +00:00
Nikolay Haustov
0e5677e2b4 [AMDGPU] Fix operands of S_BFE_U64 and S_BFM_B64
src1 of s_bfe_u64 is 32-bit (same as s_bfe_i64).
src0 and src1 of s_bfm_b64 are 32-bit.
Update tests.

Review: http://reviews.llvm.org/D17480

Reviewers: arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261621 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 09:19:14 +00:00
Igor Breger
ec0406b1e1 AVX512: Fix predicate of AVX pcmpeqw/b , pcmpgtb/w/d instructions . AVX512 version of this instructions return result in kmask register, so AVX patterns should not be disabled.
Differential Revision: http://reviews.llvm.org/D17517

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 08:55:33 +00:00
Duncan P. N. Exon Smith
5b9b80ea30 CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest).  All of these
functions require non-null parameters already, so references are more
clear.  As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261605 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 02:46:52 +00:00
David Majnemer
b23b0fffbc [X86] Create mergeable constant pool entries for AVX
We supported creating mergeable constant pool entries for smaller
constants but not for 32-byte AVX constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261584 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 22:23:11 +00:00
Derek Schuff
718d992d1f [WebAssembly] Fix writeback of stack pointer with dynamic alloca
Previously the stack pointer was only written back to memory in the
prolog. But this is wrong for dynamic allocas, for which
target-independent codegen handles SP updates after the prolog (and
possibly even in another BB). Instead update the SP global in
ADJCALLSTACKDOWN which is generated after the SP update sequence.
This will have further refinements when we add red zone support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261579 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:57:17 +00:00
Duncan P. N. Exon Smith
110284e56c CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...
This is a little embarrassing.

When I reverted r261504 (getIterator() => getInstrIterator()) in
r261567, I did a `git grep` to see if there were new calls to
`getInstrIterator()` that I needed to migrate.  There were 10-20 hits,
and I blindly did a `sed ...` before calling `ninja check`.

However, these were `MachineInstrBundleIterator::getInstrIterator()`,
which predated r261567.  Perhaps coincidentally, these had an identical
name and return type.

This commit undoes my careless sed and restores
`MachineBasicBlock::iterator::getInstrIterator()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261577 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:30:15 +00:00
Davide Italiano
cd25a02e5e [X86ISelLowering] Consolidate duplicated code in a single place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261573 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:06:46 +00:00
Matt Arsenault
2f65ff664c AMDGPU/R600: Implement allowsMisalignedMemoryAccess
This avoids some test regressions in a future commit
when unaligned operations are expanded when they
have custom lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261570 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:04:16 +00:00
Duncan P. N. Exon Smith
20a62528ef Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
This reverts commit r261504, since it's not obvious the new name is
better:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html

I'll recommit if we get consensus that it's the right direction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261567 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:49:58 +00:00
Dan Gohman
e1553a649a [WebAssembly] Re-enable the TailDuplicate pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261566 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:47:12 +00:00
JF Bastien
4a8755bfe6 WebAssembly: update expected failures
clang r261557 lowers va_arg in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261564 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:37:34 +00:00
Dan Gohman
1b10833563 [WebAssembly] Teach address folding to fold bitwise-or nodes.
LLVM converts adds into ors when it can prove that the operands don't share
any non-zero bits. Teach address folding to recognize or instructions with
constant operands with this property that can be folded into addresses as
if they were adds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261562 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:04:02 +00:00
Tom Stellard
1d53227930 [AMDGPU][llvm-mc] Support for 32-bit inline literals
Patch by: Artem Tamazov

Summary:
Note: Support for 64-bit inline literals TBD
Added: Support of abs/neg modifiers for literals (incomplete; parsing TBD).
Added: Some TODO comments.
Reworked/clarity: rename isInlineImm() to isInlinableImm()
Reworked/robustness: disallow BitsToFloat() with undefined value in isInlinableImm()
Reworked/reuse: isSSrc32/64(), isVSrc32/64()
Tests added.

Reviewers: tstellarAMD, arsenm

Subscribers: vpykhtin, nhaustov, SamWot, arsenm

Projects: #llvm-amdgpu-spb

Differential Revision: http://reviews.llvm.org/D17204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261559 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 19:17:56 +00:00
Tom Stellard
52b2fdbe17 [AMDGPU] [llvm-mc] [VI] Fix encoding of LDS/GDS instructions.
Patch by: Artem Tamazov

Summary: Tests added.

Reviewers: tstellarAMD, arsenm

Subscribers: vpykhtin, SamWot, #llvm-amdgpu-spb

Projects: #llvm-amdgpu-spb

Differential Revision: http://reviews.llvm.org/D17271

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261558 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 19:17:53 +00:00
Nemanja Ivanovic
94db889776 Fix for PR26690 take 2
This is what was meant to be in the initial commit to fix this bug. The
parens were missing. This commit also adds a test case for the bug and
has undergone full testing on PPC and X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261546 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 18:04:00 +00:00
Dan Gohman
125ad6e3d9 [WebAssembly] Properly ignore llvm.dbg.value instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261538 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 17:45:20 +00:00
Zoran Jovanovic
5fa0e4be6e [mips] added support for trunc macro
Author: obucina
Reviewers: dsanders
Differential Revision: http://reviews.llvm.org/D15745


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261529 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 16:00:23 +00:00
Nemanja Ivanovic
485b73c671 Revert bad fix for PR26690.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261527 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 15:06:32 +00:00
Nemanja Ivanovic
6bf5860c4e Fix for PR26690
I mistook BitVector::empty() to mean BitVector::count() == 0 and it does
not. Corrected the issue with the fix for PR26500.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261525 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 14:47:49 +00:00
Benjamin Kramer
b0ce7c7fb5 Fix some abuse of auto flagged by clang's -Wrange-loop-analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261524 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 13:11:58 +00:00
Igor Breger
54e0fe8d68 AVX512F: Add assembler Intel syntax tests for knl, fix minor bugs.
Differential Revision: http://reviews.llvm.org/D17498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261521 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 12:37:41 +00:00
Igor Breger
2ec70dbae0 AVX512: Fix scalar mem operands.
Differential Revision: http://reviews.llvm.org/D17500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261520 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 11:48:27 +00:00
Craig Topper
3e936408dd [X86] Minor formatting fix. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261515 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 08:00:04 +00:00
Duncan P. N. Exon Smith
65b18dd93d Reapply "CodeGen: Use references in MachineTraceMetrics::Trace, NFC"
This reverts commit r261510, effectively reapplying r261509.  The
original commit missed a caller in AArch64ConditionalCompares.

Original commit message:

Pass non-null arguments by reference in MachineTraceMetrics::Trace,
simplifying future work to remove implicit iterator => pointer
conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261511 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 03:33:28 +00:00
Duncan P. N. Exon Smith
17ef67672c Document assumption in X86FrameLowering::inlineStackProbe()
Resolve FIXME from r261504.  Apparently bundled instructions are illegal
here:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160215/334146.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261507 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 02:32:35 +00:00
Duncan P. N. Exon Smith
6e5736e1aa CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Delete MachineInstr::getIterator(), since the term "iterator" is
overloaded when talking about MachineInstr.

- Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so
  that ilist_node::getIterator() is still available.
- Add it back as MachineInstr::getInstrIterator().  This matches the
  naming in MachineBasicBlock.
- Add MachineInstr::getBundleIterator().  This is explicitly called
  "bundle" (not matching MachineBasicBlock) to disintinguish it clearly
  from ilist_node::getIterator().
- Update all calls.  Some of these I switched to `auto` to remove
  boiler-plate, since the new name is clear about the type.

There was one call I updated that looked fishy, but it wasn't clear what
the right answer was.  This was in X86FrameLowering::inlineStackProbe(),
added in r252578 in lib/Target/X86/X86FrameLowering.cpp.  I opted to
leave the behaviour unchanged, but I'll reply to the original commit on
the list in a moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261504 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 22:58:35 +00:00
Duncan P. N. Exon Smith
8de6150816 ADT: Remove == and != comparisons between ilist iterators and pointers
I missed == and != when I removed implicit conversions between iterators
and pointers in r252380 since they were defined outside ilist_iterator.

Since they depend on getNodePtrUnchecked(), they indirectly rely on UB.
This commit removes all uses of these operators.  (I'll delete the
operators themselves in a separate commit so that it can be easily
reverted if necessary.)

There should be NFC here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261498 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 20:39:50 +00:00
Craig Topper
cfaeacdafb [X86] Remove unused encoding types from disassembler. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261494 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 19:49:16 +00:00
Simon Pilgrim
b9582ec27e [X86][AVX] Add shuffle masking support for EltsFromConsecutiveLoads
Add support for the case where we have a consecutive load (which must include the first + last elements) with a mixture of undef/zero elements. We load the vector and then apply a shuffle to clear the zero'd elements.

Differential Revision: http://reviews.llvm.org/D17297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261490 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 19:15:48 +00:00
Sanjoy Das
1c5b38d20f Fix LLVM's handling and detection of skylake and cannonlake CPUs
Summary:
 - Rename `"skylake"` == SkylakeServerProc to `"skylake-avx512"`
 - Change `"skylake"` to denote SkylakeClientProc
 - Fix the detection of cpu family 6 and model 94 to be
   SkylakeClientProc instead of SkylakeServerProc
 - Remove the `"cnl"` for CannonLake

Reviewers: craig.topper, delena

Subscribers: zansari, echristo, qcolombet, RKSimon, spatel, DavidKreitzer, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17090

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261482 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 17:12:03 +00:00
JF Bastien
31fee5e7e4 WebAssembly: update expected torture test failures
r261457 handles CopyToReg nodes with flag results in LowerCopyToReg, which was causing the SelectionDAGNodes assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261479 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 16:52:00 +00:00
Dan Gohman
a96dc7d5ad [WebAssembly] Support physical registers in the rewrite-to-discard optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261465 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 03:27:22 +00:00
David Majnemer
9f1a234a23 Unbreak non-X86 targets from fallout caused by r261462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261463 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 01:40:04 +00:00
David Majnemer
36935fd5b1 [X86] Use the correct alignment for COMDAT constant pool entries
COFF doesn't have sections with mergeable contents.  Instead, each
constant pool entry ends up in a COMDAT section.  The linker, when
choosing between COMDAT sections, doesn't choose the max alignment of
the two sections.  You just get whatever alignment was on the section.

If one constant needed a higher alignment in one object file from
another one, then we will get into trouble if the linker chooses the
lower alignment one.

Instead, lets promote the alignment of the constant pool entry to make
sure we don't use an under aligned constant with an instruction which
assumed otherwise.

This fixes PR26680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261462 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-21 01:30:30 +00:00
Dan Gohman
98f8ef3a28 [WebAssembly] Refine a README.txt entry.
The register coloring pass may also need to be involved in order to
optimally sort registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261458 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 23:11:14 +00:00
Dan Gohman
772074148f [WebAssembly] Handle CopyToReg nodes with flag results in LowerCopyToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261457 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 23:09:44 +00:00
Derek Schuff
545c0902d4 [WebAssembly] Write stack pointer back to memory when FP is used
The stack pointer is bumped when there is a frame pointer or when there
are static-size objects, but was only getting written back when there
were static-size objects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261453 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 22:18:47 +00:00
Derek Schuff
37d3f7f35c [WebAssembly] Stackify function prologs and epilogs
The instructions are the same, but fewer locals are used.

Differential Revision: http://reviews.llvm.org/D17428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261452 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 21:46:50 +00:00
Nemanja Ivanovic
530622611f Fix the build bot break caused by rL261441.
The patch has a necessary call to a function inside an assert. Which is fine
when you have asserts turned on. Not so much when they're off. Sorry about
the regression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261447 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 20:45:37 +00:00
Nemanja Ivanovic
3cf0c95d5c Fix for PR 26500
This patch corresponds to review:
http://reviews.llvm.org/D17294

It ensures that whatever block we are emitting the prologue/epilogue into, we
have the necessary scratch registers. It takes away the hard-coded register
numbers for use as scratch registers as registers that are guaranteed to be
available in the function prologue/epilogue are not guaranteed to be available
within the function body. Since we shrink-wrap, the prologue/epilogue may end
up in the function body.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261441 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 18:16:25 +00:00