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Author SHA1 Message Date
Rafael Espindola
5aca927ae6 implement FLDD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30802 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 14:03:39 +00:00
Rafael Espindola
d9ae778125 implement fadds, faddd, fmuls and fmuld 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30801 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 13:46:42 +00:00
Chris Lattner
783d45ef14 handle pmin/pmax with multiclasses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30800 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 07:49:33 +00:00
Chris Lattner
dc52f17a30 regenerate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30799 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 07:15:19 +00:00
Chris Lattner
85899b8b10 Bugfix: this allows multiclasses to have default arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30798 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 07:14:48 +00:00
Chris Lattner
7733799464 simplify pack and shift intrinsics with multiclasses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 07:06:17 +00:00
Chris Lattner
01998742c3 Use a multiclass to simplify 'SSE2 Integer comparison' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:47:08 +00:00
Chris Lattner
736c020fc8 move class defns close to uses to make it easier to read 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:33:36 +00:00
Chris Lattner
fb996ee727 simplify horizontal op definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30794 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:31:41 +00:00
Chris Lattner
3b57a833a5 remove more unneeded type info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:27:03 +00:00
Chris Lattner
aab370db24 remove unneeded definitions and type info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30792 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:19:41 +00:00
Chris Lattner
15258d5f9d remove some unneeded type info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 06:17:43 +00:00
Chris Lattner
845fb75536 simplify patterns by merging in operand info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30790 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:50:25 +00:00
Chris Lattner
d1b651d5de Factor operands into packed unary classes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:47:20 +00:00
Chris Lattner
dc5aa21b10 remove dead/duplicate instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30788 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:41:52 +00:00
Chris Lattner
a0ea63db75 Pull operand info up into parent class for scalar sse intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:26:13 +00:00
Chris Lattner
86c1b3a2fd convert the sole sd unary intrinsic to a multiclass for consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30786 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:19:31 +00:00
Chris Lattner
3b8378552e pull operand string into the multiclass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30785 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:13:26 +00:00
Chris Lattner
9498ed8ac9 Remove RSQRTSS[rm] RCPSS[rm], which are dead. 
Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30784 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 05:09:48 +00:00
Chris Lattner
4cc84edd3b eliminate redundancy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 04:52:09 +00:00
Chris Lattner
ed83a7019b Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom 
part was always forced to be sextload, even when we needed an zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30782 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 00:58:36 +00:00
Chris Lattner
0c79fed5f9 Set the jt section 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30781 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:52:33 +00:00
Chris Lattner
cf9668f23d initialize ivar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:52:08 +00:00
Chris Lattner
0336fdba85 If a target uses a GOT, put it in the jt data section, not the text 
section.  This will fix alpha when Andrew implements
AlphaTargetMachine::getTargetLowering().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30779 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:50:56 +00:00
Chris Lattner
111c2fa2a0 Alpha uses a got 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30778 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:46:51 +00:00
Chris Lattner
428e75eaef Add support for targets to declare that they use a GOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30777 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:46:34 +00:00
Chris Lattner
e0cfc8b2f2 jump tables handle pic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30776 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:32:29 +00:00
Chris Lattner
db3ea6754b print labels even if a MBB doesn't have a corresponding LLVM BB, just don't 
print the LLVM BB label.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30775 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 21:28:17 +00:00
Rafael Espindola
935b1f8fce add optional input flag to FMRRD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30774 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 20:33:26 +00:00
Rafael Espindola
614057b843 add support for calling functions that return double 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30771 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 19:10:05 +00:00
Evan Cheng
3cff9f8947 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30770 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 18:57:51 +00:00
Chris Lattner
6e1f1fdd35 ugly codegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30769 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 17:39:34 +00:00
Chris Lattner
4bdd2753db Fix a miscompilation of: 
long long foo(long long X) {
  return (long long)(signed char)(int)X;
}

Instead of:

_foo:
        extsb r2, r4
        srawi r3, r4, 31
        mr r4, r2
        blr

we now produce:

_foo:
        extsb r4, r4
        srawi r3, r4, 31
        blr

This fixes a miscompilation in ConstantFolding.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30768 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 17:34:12 +00:00
Rafael Espindola
af1dabef35 fix some bugs affecting functions with no arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30767 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 17:26:30 +00:00
Rafael Espindola
1b5076887e fix the stack alignment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30766 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 14:29:47 +00:00
Rafael Espindola
4a408d46d4 add support for calling functions that have double arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 12:50:22 +00:00
Evan Cheng
a26eb5e1a7 Still need to support -mcpu=<> or cross compilation will fail. Doh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30764 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 09:17:41 +00:00
Evan Cheng
abc346ceda Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3, and 64-bit support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30763 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 08:21:07 +00:00
Evan Cheng
88c1578011 It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30762 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 07:50:56 +00:00
Chris Lattner
b6bb7e1ffe add an accessor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 01:16:29 +00:00
Chris Lattner
5504602836 MachineBasicBlock::splice was incorrectly updating parent pointers on 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 01:12:44 +00:00
Evan Cheng
786225adf0 Make use of getStore(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 23:01:46 +00:00
Evan Cheng
ad071e1cd1 Add getStore() helper function to create ISD::STORE nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30758 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 22:57:11 +00:00
Chris Lattner
9c78ecb511 Don't crash if an MBB doesn't have an LLVM BB 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30757 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 21:40:14 +00:00
Rafael Espindola
39b5a21259 use a const ref for passing the vector to ArgumentLayout 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30756 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 17:46:48 +00:00
Rafael Espindola
a284584352 implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL 
implement FMDRR
add support for f64 function arguments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30754 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 16:48:49 +00:00
Jim Laskey
bc588b8bbf Alias analysis code clean ups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 15:07:25 +00:00
Chris Lattner
867b99f845 add a new SimplifyDemandedVectorElts method, which works similarly to 
SimplifyDemandedBits.  The idea is that some operations can be simplified if
not all of the computed elements are needed.  Some targets (like x86) have a
large number of intrinsics that operate on a single element, but pass other
elts through unmodified.  If those other elements are not needed, the
intrinsics can be simplified to scalar operations, and insertelement ops can
be removed.

This turns (f.e.):

ushort %Convert_sse(float %f) {
        %tmp = insertelement <4 x float> undef, float %f, uint 0                ; <<4 x float>> [#uses=1]
        %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, uint 1             ; <<4 x float>> [#uses=1]
        %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, uint 2           ; <<4 x float>> [#uses=1]
        %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, uint 3           ; <<4 x float>> [#uses=1]
        %tmp28 = tail call <4 x float> %llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > )               ; <<4 x float>> [#uses=1]
        %tmp37 = tail call <4 x float> %llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > )               ; <<4 x float>> [#uses=1]
        %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > )               ; <<4 x float>> [#uses=1]
        %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer )          ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 )              ; <int> [#uses=1]
        %tmp69 = cast int %tmp to ushort                ; <ushort> [#uses=1]
        ret ushort %tmp69
}

into:

ushort %Convert_sse(float %f) {
entry:
        %tmp28 = sub float %f, 1.000000e+00             ; <float> [#uses=1]
        %tmp37 = mul float %tmp28, 5.000000e-01         ; <float> [#uses=1]
        %tmp375 = insertelement <4 x float> undef, float %tmp37, uint 0         ; <<4 x float>> [#uses=1]
        %tmp48 = tail call <4 x float> %llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > )           ; <<4 x float>> [#uses=1]
        %tmp59 = tail call <4 x float> %llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > )            ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.x86.sse.cvttss2si( <4 x float> %tmp59 )              ; <int> [#uses=1]
        %tmp69 = cast int %tmp to ushort                ; <ushort> [#uses=1]
        ret ushort %tmp69
}

which improves codegen from:

_Convert_sse:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret

to:

_Convert_sse:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        movss LCPI1_2, %xmm1
        minss %xmm1, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret


This is just a first step, it can be extended in many ways.  Testcase here:
Transforms/InstCombine/vec_demanded_elts.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 06:55:50 +00:00
Chris Lattner
ce0420e65c new testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 06:51:54 +00:00
Chris Lattner
06a248c238 Add insertelement/extractelement helper ctors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 06:24:58 +00:00