136247 Commits

Author SHA1 Message Date
Matthew Simpson
155b8551c6 [LV] Generate both scalar and vector integer induction variables
This patch enables the vectorizer to generate both scalar and vector versions
of an integer induction variable for a given loop. Previously, we only
generated a scalar induction variable if we knew all its users were going to be
scalar. Otherwise, we generated a vector induction variable. In the case of a
loop with both scalar and vector users of the induction variable, we would
generate the vector induction variable and extract scalar values from it for
the scalar users. With this patch, we now generate both versions of the
induction variable when there are both scalar and vector users and select which
version to use based on whether the user is scalar or vector.

Differential Revision: https://reviews.llvm.org/D22869

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277474 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 15:25:16 +00:00
Ahmed Bougacha
d170182063 [GlobalISel] Set, require, and verify Legalized MF property.
RegBankSelect and InstructionSelect run after the legalizer and
require a Legalized function: check that all instructions are legal.

Note that this should be in the MachineVerifier, but it can't use the
MachineLegalizer as it's currently in the separate GlobalISel library.
Note that the RegBankSelect verifier checks have the same layering
problem, but we only use inline methods so end up not needing to link
against the GlobalISel library.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277472 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 15:10:32 +00:00
Ahmed Bougacha
a877bb83bf [AArch64][GlobalISel] Mark basic binops/memops as legal.
We currently use and test these, and select most of them. Mark them
as legal even though we don't go through the full ir->asm flow yet.

This doesn't currently have standalone tests, but the verifier will
soon learn to check that the regbankselect/select tests are legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277471 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 15:10:28 +00:00
Ahmed Bougacha
46fe427fc7 [GlobalISel] Add Legalized MachineFunction property.
Legalized: The MachineLegalizer ran; all pre-isel generic instructions
have been legalized, i.e., all instructions are now one of:
  - generic and always legal (e.g., COPY)
  - target-specific
  - legal pre-isel generic instructions.

This lets us enforce certain invariants across passes.
This property is GlobalISel-specific, but is always available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277470 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 15:10:25 +00:00
Nirav Dave
07d957665f Revert "[MC] Fix handling of end-of-line preprocessor comments"
Causes TSan failure on PPC64

This reverts commit r277459.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277468 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 15:08:52 +00:00
Dan Gohman
143e93e010 [WebAssembly] Remove a README.txt entry that is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277467 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 14:53:44 +00:00
Artur Pilipenko
e6be5e76b2 [LVI] NFC. Fix a typo getValueFromFromCondition -> getValueFromCondition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277466 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 14:44:32 +00:00
Ahmed Bougacha
3797d93a1e [CodeGen] Generalize MachineFunctionProperties::print comma handling.
This is only used for debug prints, but the previous hardcoded ", "
caused it to be printed unnecessarily when OnlySet, and is annoying
when adding new properties.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277465 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 14:42:57 +00:00
Ahmed Bougacha
6a35fcace7 [GlobalISel] Require isSSA in GISel passes.
The GISel passes don't make sense on non-SSA functions.
All GISel tests already set isSSA. Enforce that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277464 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 14:42:55 +00:00
Matthew Simpson
90b7f569d8 [LV] Untangle the concepts of uniform and scalar
This patch refactors the logic in collectLoopUniforms and
collectValuesToIgnore, untangling the concepts of "uniform" and "scalar". It
adds isScalarAfterVectorization along side isUniformAfterVectorization to
distinguish the two. Known scalar values include those that are uniform,
getelementptr instructions that won't be vectorized, and induction variables
and induction variable update instructions whose users are all known to be
scalar.

This patch includes the following functional changes:

- In collectLoopUniforms, we mark uniform the pointer operands of interleaved
  accesses. Although non-consecutive, these pointers are treated like
  consecutive pointers during vectorization.

- In collectValuesToIgnore, we insert a value into VecValuesToIgnore if it
  isScalarAfterVectorization rather than isUniformAfterVectorization. This
  differs from the previous functionaly in that we now add getelementptr
  instructions that will not be vectorized into VecValuesToIgnore.

This patch also removes the ValuesNotWidened set used for induction variable
scalarization since, after the above changes, it is now equivalent to
isScalarAfterVectorization.

Differential Revision: https://reviews.llvm.org/D22867

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277460 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 14:29:41 +00:00
Nirav Dave
22973d396c [MC] Fix handling of end-of-line preprocessor comments
Recommitting after fixing test.

When parsing assembly where the line comment syntax is not hash, the
lexer cannot distinguish between hash's that start a hash line comment
and one that is part of an assembly statement and must be distinguished
during parsing. Previously, this was incompletely handled by not checking
for EndOfStatement at the end of statements and interpreting hash
prefixed statements as comments.

Change EndOfStatement Parsing to check for Hash comments and reintroduce
Hash statement parsing to catch previously handled cases.

Reviewers: rnk, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23017

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277459 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 14:25:49 +00:00
David Callahan
0712e11c30 Revert rL277454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277455 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 13:26:07 +00:00
David Callahan
d7436803ba test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277454 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 13:19:12 +00:00
Sam Parker
d18c8aae08 [ARM] Improve smul* and smla* isel for Thumb2
Added (sra (shl x, 16), 16) to the sext_16_node PatLeaf for ARM to
simplify some pattern matching. This has allowed several patterns
for smul* and smla* to be removed as well as making it easier to add
the matching for the corresponding instructions for Thumb2 targets.
Also added two Pat classes that are predicated on Thumb2 with the
hasDSP flag and UseMulOps flags. Updated the smul codegen test with
the wider range of patterns plus the ThumbV6 and ThumbV6T2 targets.

Differential Revision: https://reviews.llvm.org/D22908



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277450 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 12:44:27 +00:00
NAKAMURA Takumi
02c2861750 HexagonVectorPrint.cpp: Fix r277370. Don't use getInstrVecReg() in the expression of assert(). It has side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277448 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 11:59:16 +00:00
Ahmed Bougacha
b48427578b [GlobalISel] Don't RegBankSelect target-specific instructions.
They don't have types and should be using register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277447 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 11:41:16 +00:00
Ahmed Bougacha
a124aa1825 [GlobalISel] Don't legalize non-generic instructions.
They don't have types and should be legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277446 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 11:41:09 +00:00
Ahmed Bougacha
99853c1c1d [GlobalISel] Const-ify MachineInstrs passed to MachineLegalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277445 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 11:41:03 +00:00
Simon Dardis
0bdecd2eeb [mips] Update the P5600 scheduler for isComplete = 1
These changes update the schedule model for the P5600 and includes the
rest of the MSA and MIPS32R5 instruction sets.

Reviewers: dsanders, vkalintris

Differential Revision: https://reviews.llvm.org/D21835


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277441 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 10:32:00 +00:00
Bernard Ogden
921ae8e295 [ARM] Some saturation instructions not DSP-only
Summary:
Commit 276701 requires that targets have the DSP extensions to use
certain saturating instructions. This requires some corrections.

For ARM ISA the instructions in question are available in all v6*
architectures.

For Thumb2, the instructions in question are available from v6T2.
SSAT and USAT are part of the base architecture while SSAT16 and
USAT16 require the DSP extensions.

Reviewers: rengolin

Subscribers: aemerson, rengolin, samparker, llvm-commits

Differential Revision: https://reviews.llvm.org/D23010

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277439 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 10:04:03 +00:00
Benjamin Kramer
df988869b8 [LoadStoreVectorizer] Don't use a linear walk for an existence check in a SmallPtrSet
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277436 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 09:35:17 +00:00
Igor Breger
0691cf23e8 [AVX512] Don't use i128 masked gather/scatter/load/store. Do more accurately dataWidth check.
Differential Revision: http://reviews.llvm.org/D23055

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277435 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 09:15:28 +00:00
Matt Arsenault
3638aecf0f AArch64: Assert on branch displacement bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277434 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 08:56:52 +00:00
Matt Arsenault
08fb6f0810 AArch64: Consolidate branch inversion logic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277431 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 08:30:06 +00:00
Matt Arsenault
1cee04d59a AArch64: BranchRelaxtion cleanups
Move some logic into TII.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277430 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 08:06:17 +00:00
Matt Arsenault
5d4d2680c1 AArch64: Add missing branch relaxation tests
The branch relaxation pass has the worst test coverage
of any pass in AArch64. Add a few tests that hit some
large pieces of code in the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277428 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 07:41:05 +00:00
Matt Arsenault
c2fcbdb2b3 AArch64: Fix end iterator dereference
Not all blocks have terminators. I'm not sure how this wasn't
crashing before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277427 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 07:20:09 +00:00
Craig Topper
a99d4e1d68 [AVX-512] Mark VADDPS/PD and VMULPS/PD as commutable. This necessitated adding itineraries to all of the instructions that use the avx512_fp_binop_p class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277422 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 06:16:53 +00:00
Craig Topper
8d6665d783 [AVX-512] Use SSE_MUL_ITINS_S/SSE_DIV_ITINS_S for the scalar FMUL/FDIV instructions to match SSE/AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277421 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 06:16:51 +00:00
Chandler Carruth
c9e642268a [Inliner] Clean up doxygen comments to match modern style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277417 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 05:49:32 +00:00
Craig Topper
7a4565f0eb [AVX-512] Correct ExeDomain for many AVX-512 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277416 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 05:11:15 +00:00
Junmo Park
f29090aa9b Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277415 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 04:38:27 +00:00
Sanjoy Das
f21ab36404 [Verifier] Improve test coverage for rL277413
As suggest via post-commit review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277414 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 03:23:22 +00:00
Sanjoy Das
308cf93891 [Verifier] Disallow illegal ptr<->int casts in ConstantExprs
This should have been a part of rL277085, but I hadn't considered this
case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277413 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 02:55:57 +00:00
Bruno Cardoso Lopes
b1fa8fe727 Revert r277408 and r277407
Revert r277408 "Fix test from rL277407."
Revert r277407 "[MC] Fix handling of end-of-line preprocessor comments"

This is currently breaking:
  http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_check/20731

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277412 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 02:53:59 +00:00
Sean Silva
e9e07465ef CodeExtractor : Add ability to preserve profile data.
Added ability to estimate the entry count of the extracted function and
the branch probabilities of the exit branches.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22744

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277411 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 02:15:45 +00:00
Sanjoy Das
81274146ab Tie the Verifier class to a Module; NFCI
Summary:
This commit changes the Verifier class to accept a Module via the
constructor to make it obvious that a specific instance of the class is
only intended to work with a specific module.  The `updateModule` setter
(despite being private) was making this fact less transparent.

There are fields in the `Verifier` class like `DeoptimizeDeclarations`
and `GlobalValueVisited` which are module specific, so a given
Verifier instance will not in fact work across multiple modules today.
This change just makes that more obvious.

The motivation is to make it easy to get to the datalayout of the
module unambiguously.  That is required to verify that `inttoptr` and
`ptrtoint` constant expressions are well typed in the face of
non-integral pointer types.

Reviewers: dexonsmith, bkramer, majnemer, chandlerc

Subscribers: mehdi_amini, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D23040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277409 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 01:34:50 +00:00
Nirav Dave
e9cc165371 Fix test from rL277407.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277408 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 01:27:09 +00:00
Nirav Dave
6fc4119b60 [MC] Fix handling of end-of-line preprocessor comments
Summary:
When parsing assembly where the line comment syntax is not hash, the
lexer cannot distinguish between hash's that start a hash line comment
and one that is part of an assembly statement and must be distinguished
during parsing. Previously, this was incompletely handled by not checking
for EndOfStatement at the end of statements and interpreting hash
prefixed statements as comments.

Change EndOfStatement Parsing to check for Hash comments and reintroduce
Hash statement parsing to catch previously handled cases.

Reviewers: rnk, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23017

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277407 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 01:05:29 +00:00
Hans Wennborg
0e6a15a292 Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"
This caused PR28805. Adding a regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277402 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 23:00:01 +00:00
Tim Shen
a9ed4cc01c [ADT] NFC: Generalize GraphTraits requirement of "NodeType *" in interfaces to "NodeRef", and migrate SCCIterator.h to use NodeRef
Summary: By generalize the interface, users are able to inject more flexible Node token into the algorithm, for example, a pair of vector<Node>* and index integer. Currently I only migrated SCCIterator to use NodeRef, but more is coming. It's a NFC.

Reviewers: dblaikie, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22937

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277399 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 22:32:20 +00:00
Derek Schuff
23429a5af3 [WebAssembly] Support CFI for WebAssembly target
Summary: This patch implements CFI for WebAssembly. It modifies the
LowerTypeTest pass to pre-assign table indexes to functions that are
called indirectly, and lowers type checks to test against the
appropriate table indexes. It also modifies the WebAssembly backend to
support a special ".indidx" assembly directive that propagates the table
index assignments out to the linker.

Patch by Dominic Chen

Differential Revision: https://reviews.llvm.org/D21768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277398 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 22:25:02 +00:00
Lang Hames
f4cfadb9c0 [Orc] Fix common symbol support in ORC.
Common symbol support in ORC was broken in r270716 when the symbol resolution
rules in RuntimeDyld were changed. With the switch to lazily materialized
symbols in r277386, common symbols can be supported by having
RuntimeDyld::emitCommonSymbols search for (but not materialize!) definitions
elsewhere in the logical dylib.

This patch adds the 'Common' flag to JITSymbolFlags, and the necessary check
to RuntimeDyld::emitCommonSymbols.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277397 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 22:23:24 +00:00
David Blaikie
4c028797dc Simplify some code found when it was moved in r277177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277394 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 21:50:43 +00:00
Michael Kuperstein
3a6d437582 [PM] Port SpeculativeExecution to the new PM
Differential Revision: https://reviews.llvm.org/D23033


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277393 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 21:48:33 +00:00
Derek Schuff
6b6b112dba [WebAssembly] Add asm.js-style exception handling support
Summary: This patch includes asm.js-style exception handling support for
WebAssembly. The WebAssembly MVP does not have any support for
unwinding or non-local control flow. In order to support C++ exceptions,
emscripten currently uses JavaScript exceptions along with some support
code (written in JavaScript) that is bundled by emscripten with the
generated code.
This scheme lowers exception-related instructions for wasm such that
wasm modules can be compatible with emscripten's existing scheme and
share the support code.

Patch by Heejin Ahn

Differential Revision: https://reviews.llvm.org/D22958

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277391 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 21:34:04 +00:00
Sumanth Gundapaneni
95c3ece2ff Build llvm with ccache if package is present
This patch has the following changes

The CMake variable LLVM_CCACHE_BUILD is set to OFF by default.
Set this to ON for a ccache enabled build

CCACHE_CPP2 is required to compile the source file directly instead
of compiling the preprocessed file. This will help WERROR is turned ON
for a host clang compiler

The below two options makes more sense in the context of a buildbot

CCACHE_HASHDIR is required to maintain the separate cached data across
builders. This will also help the debuggers to point to the correct source
location

CCACHE_SIZE is important in the perspective of buildbot to increase the
limit on the amount of data to hold in cache for faster compilation

CCACHE_DIR is used to save the cached data to a specific directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277389 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 21:28:03 +00:00
Zachary Turner
822ef4e420 [msf] Teach LLVM to parse a split Fpm.
The FPM is split at regular intervals across the MSF file, as the MS code
suggests. It turns out that the value of the interval is precisely the
block size. If the block size is 4096, then there are two Fpm pages every
4096 blocks.

So here we teach the PDBFile class to parse a split FPM, and also add more
options when dumping the FPM to display some additional information such
as orphaned pages (pages which the FPM says are allocated, but which
nothing appears to use), use after free pages (pages which the FPM says
are not allocated, but which are referenced by a stream), and multiple use
pages (pages which the FPM says are allocated but are used more than
once).

Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D23022

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277388 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 21:19:45 +00:00
Lang Hames
075c1e2e1a [ExecutionEngine][MCJIT][Orc] Replace RuntimeDyld::SymbolInfo with JITSymbol.
This patch replaces RuntimeDyld::SymbolInfo with JITSymbol: A symbol class
that is capable of lazy materialization (i.e. the symbol definition needn't be
emitted until the address is requested). This can be used to support common
and weak symbols in the JIT (though this is not implemented in this patch).

For consistency, RuntimeDyld::SymbolResolver is renamed to JITSymbolResolver.

For space efficiency a new class, JITEvaluatedSymbol, is introduced that
behaves like the old RuntimeDyld::SymbolInfo - i.e. it is just a pair of an
address and symbol flags. Instances of JITEvaluatedSymbol can be used in
symbol-tables to avoid paying the space cost of the materializer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277386 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 20:49:11 +00:00
Krzysztof Parzyszek
9296f21a70 [Hexagon] Tidy up some code, NFC: reapply r277372 with a fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277383 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-01 20:31:50 +00:00