Commit Graph

85546 Commits

Author SHA1 Message Date
Bill Wendling
5d0061e025 Use attribute query methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 07:08:30 +00:00
Bill Wendling
b44e3ee1a7 Use method to query for attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 06:58:52 +00:00
Bill Wendling
5df15c692b Add method to query for 'NoAlias' attribute on call/invoke instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165208 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 06:52:09 +00:00
Bill Wendling
fac31ded96 Use method to query for attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165207 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 06:49:41 +00:00
Bill Wendling
9158eecd42 Query for attributes via the correct method call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165206 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 06:48:57 +00:00
Bill Wendling
8f00ae6a3f Use new accessor methods to query for attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 06:43:21 +00:00
Kostya Serebryany
41d876cea3 [tsan] add 3 internal flags for fine-grain control of what is instrumented and what is not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165204 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 05:28:50 +00:00
Craig Topper
266eff8539 Remove template from function that is only used with one type after r165092.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 05:18:31 +00:00
Lang Hames
442c59f0a2 Fix reg mask slot test, and preserve LiveIntervals and VirtRegMap in the PBQP
allocator. Fixes PR13945.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165201 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 04:50:53 +00:00
Sean Silva
96098782d1 docs: Fix typo on front page
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 04:41:27 +00:00
Jack Carter
9d577c8614 Implement methods that enable expansion of load immediate
macro instruction (li) in the assembler.

We have identified three possible expansions depending on 
the size of immediate operand:
  1) for 0 ≤ j ≤ 65535.
     li d,j =>
     ori d,$zero,j

  2) for −32768 ≤ j < 0.
     li d,j =>
     addiu d,$zero,j

  3) for any other value of j that is representable as a 32-bit integer.
     li d,j =>
     lui d,hi16(j)
     ori d,d,lo16(j)

All of the above have been implemented in ths patch.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 04:03:53 +00:00
Sean Silva
34c6b7e925 docs: Sphinxify GoldPlugin document.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165198 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 03:56:23 +00:00
Jack Carter
30116cd2e2 This patch is a partial implementation of mips .set assembler directive. Directive is defined as follows:
.set option
The patch implements following options

    at - lets the assembler use the $at register for macros,
         but generates warnings if the source program uses $at

    noat - let source programs use $at without issuingwarnings.

    noreorder - prevents the assembler from reordering machine 
                language instructions.
    nomacro - causes the assembler to print a warning whenever 
              an assembler operation generates more than one 
              machine language instruction.
    macro - lets the assembler generate multiple machine instructions 
            from a single assembler instruction
    reorder - lets the assembler reorder machine language 
               instructions to improve performance

The above variants are parsed and their boolean values set or unset.
The code to actually use them will come later.

Following options are not implemented yet:

nomips16
nomicromips
move
nomove

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 02:29:46 +00:00
Sean Silva
047d3617cb tblgen: Whitespace and 80-col cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 00:54:27 +00:00
Jordan Rose
81be6bfd66 Make sure 'prefix-clang++' is aliased to 'prefix-clang', not 'clang'.
When aliasing tools, rather than using the base TOOLEXENAME, we should
instead use the built tool's basename (for 'make') or the installed
tool's basename (for 'make install').

This should not cause any changes for anyone building unprefixed 'clang'
and 'clang++' tools.

Patch by Rick Foos!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165189 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 00:47:59 +00:00
Andrew Trick
72fd0a9448 Enable -schedmodel, but prefer itineraries until we have more benchmark data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 00:24:34 +00:00
Jakub Staszak
395c1502a7 Fix PR13967.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:59:47 +00:00
Bill Wendling
10181ae49c Add an explicit -object_path_lto flag during linking with a uniquified temporary
file name if building Apple-style.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:52:10 +00:00
Michael Liao
471b917b26 Clean up tailing whitespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165182 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:43:52 +00:00
Andrew Trick
13745262a8 Added instregex support to TableGen subtarget emitter.
This allows the processor-specific machine model to override selected
base opcodes without any fanciness.
e.g. InstRW<[CoreXWriteVANDP], (instregex "VANDP")>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:06:32 +00:00
Andrew Trick
2062b1260f TableGen subtarget emitter, nearly first class support for SchedAlias.
A processor can now arbitrarily alias one SchedWrite onto
another. Only the SchedAlias definition need be within the processor
model. The aliased SchedWrite may be a SchedVariant, WriteSequence, or
transitively refer to another alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:06:28 +00:00
Andrew Trick
fe05d98c25 Cleanup TableGen subtarget emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:06:25 +00:00
Chad Rosier
d494a3bfc5 [ms-inline asm] Default to the 'm' constraint. This matches the behavior of the
MSVC compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 22:18:38 +00:00
Chad Rosier
34448ae393 [ms-inline asm] Add support in the X86AsmPrinter for printing memory references
in the Intel syntax.

The MC layer supports emitting in the Intel syntax, but this would require the
inline assembly MachineInstr to be lowered to an MCInst before emission.  This
is potential future work, but for now emitting directly from the MachineInstr
suffices.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 22:06:44 +00:00
Jack Carter
42faefc11d This patch moves from using a hard coded number (4)
for the number of bytes in a particular instruction
to using
   const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
   Desc.getSize()

This is necessary with the advent of 16 bit instructions with
mips16 and micromips. It is also puts Mips in compliance with
the other targets for getting instruction size.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 21:58:54 +00:00
Sean Silva
3c0962878c tblgen: Remove last traces of old TableGenMain API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 21:31:08 +00:00
Sean Silva
9e21138ab7 tblgen: Migrate llvm-tblgen to new TableGenMain API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 21:29:19 +00:00
Sean Silva
f42a6741de tblgen: Put new TableGenMain API in place.
In order to avoid rev-lock with Clang when moving to the new API, also
preserve the current API temporarily and insert a shim to implement the
new API in terms of the old.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 21:29:18 +00:00
Bill Wendling
ec7559db6d Add function to return return attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 21:19:35 +00:00
Bill Wendling
4c230b3338 Update to use the predicate methods to query if an attribute exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165163 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 21:17:09 +00:00
Nadav Rotem
2e7d38192d Fix a cycle in the DAG. In this code we replace multiple loads with a single load and
multiple stores with a single load. We create the wide loads and stores (and their chains)
before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge
loads with a different chain. When that happened, the assumption that it is safe to RAUW
broke and a cycle was introduced.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 19:30:31 +00:00
Nick Kledzik
436eaa88fd Use unsigned long long instead of uin64_t for OS where that matters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 19:27:25 +00:00
Chad Rosier
7f74eade1f Typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 19:00:20 +00:00
Benjamin Kramer
e25de4ae04 Don't call getAsUnsignedInteger directly, it fails to compile if uint64_t is not "unsigned long long".
while there add more test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165140 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 18:54:36 +00:00
Nick Kledzik
7a0f86fa78 Add getAsUnsignedInteger test case that checks that known bad values are rejected
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 18:15:27 +00:00
Bill Wendling
739dc6e6d8 No need to call functions which do the same thing as the default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 18:10:49 +00:00
Bill Wendling
3bd59a9a06 Remove assert that's too restrictive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 18:08:57 +00:00
Bill Wendling
847d165459 Add methods which query for the specific attribute instead of using the
enums. This allows for better encapsulation of the Attributes class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 17:54:26 +00:00
Tim Northover
565ebde5fe Implement .rel relocation for R_ARM_ABS32 in MCJIT.
Patch by Amara Emerson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 16:29:42 +00:00
Preston Gurd
fcf0628d93 This Patch corrects a problem whereby the optimization to use a faster divide
instruction (for Intel Atom) was not being done by Clang, because
the type context used by Clang is not the default context.

It fixes the problem by getting the global context types for each div/rem
instruction in order to compare them against the types in the BypassTypeMap.

Tests for this will be done as a separate patch to Clang.

Patch by Tyler Nowicki.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 16:11:44 +00:00
Nadav Rotem
c653de6c0f A DAGCombine optimization for mergeing consecutive stores to memory. The optimization
is not profitable in many cases because modern processors perform multiple stores
in parallel and merging stores prior to merging requires extra work. We handle two main cases:

1. Store of multiple consecutive constants:
  q->a = 3;
  q->4 = 5;
In this case we store a single legal wide integer.

2. Store of multiple consecutive loads:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;
In this case we load/store either ilegal vector registers or legal wide integer registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 16:11:15 +00:00
Preston Gurd
bfcb4aa10b Set up MCSchedModel after detecting the CPU type in X86SubTarget.
Corrects a problem whereby MCSchedModel was not being set up when
the CPU type was auto-detected.

Patch by Andy Zhang.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 15:55:13 +00:00
Dmitry Vyukov
6afc7cbdfe tsan: update the test for new atomic enums
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 13:19:20 +00:00
Dmitry Vyukov
03fe214515 tsan: update the test for new atomic enums
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 13:13:54 +00:00
Dmitry Vyukov
9a8c112dae tsan: prepare for migration to new memory_order enum values (ABI compatible)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 13:00:57 +00:00
Silviu Baranga
541a858f1a Fixed a bug in the ExecutionDependencyFix pass that caused dependencies to not propagate through implicit defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 08:29:36 +00:00
Chandler Carruth
322e9ba2cb Fix an issue where we failed to adjust the alignment constraint on
a memcpy to reflect that '0' has a different meaning when applied to
a load or store. Now we correctly use underaligned loads and stores for
the test case added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 08:26:28 +00:00
Chandler Carruth
f710fb14ee Try to use a better set of abstractions for computing the alignment
necessary during rewriting. As part of this, fix a real think-o here
where we might have left off an alignment specification when the address
is in fact underaligned. I haven't come up with any way to trigger this,
as there is always some other factor that reduces the alignment, but it
certainly might have been an observable bug in some way I can't think
of. This also slightly changes the strategy for placing explicit
alignments on loads and stores to only do so when the alignment does not
match that required by the ABI. This causes a few redundant alignments
to go away from test cases.

I've also added a couple of tests that really push on the alignment that
we end up with on loads and stores. More to come here as I try to fix an
underlying bug I have conjectured and produced test cases for, although
it's not clear if this bug is the one currently hitting dragonegg's
gcc47 bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 08:14:02 +00:00
Eric Christopher
76ad43c6e1 Revert 165051-165049 while looking into the foreach.m failure in
more detail.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 08:10:01 +00:00
Craig Topper
8e8f8724e1 Fix doxygen comment to match function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 06:47:18 +00:00