Commit Graph

34175 Commits

Author SHA1 Message Date
Lang Hames
88ffce3c57 [RuntimeDyld][MachO] Fix handling of empty eh-frame sections.
This patch switches from an unguarded to a guarded loop for eh-frame record
fixups. In the unguarded version we would always make at least one call to
processFDE, which would then crash trying to fix up a frame that didn't exist.

Fixes <rdar://problem/24301582>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259103 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 22:35:48 +00:00
Simon Pilgrim
681c4b8b04 [X86][AVX] Added more thorough 256-bit vector consecutive load tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259100 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 22:29:51 +00:00
Sanjoy Das
aca48e8203 [RS4GC] Change opt %s to opt < %s; NFC
This is as per http://llvm.org/docs/TestingGuide.html#fragile-tests.  I
didn't touch the tests outside deopt-bundles/ since they'll be gone
soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259097 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 21:51:21 +00:00
Sanjoy Das
8c0cdd184d [PlaceSafepoints] Clamp NoStatepoints to true
This change permanently clamps -spp-no-statepoints to true (the code
deletion will come later).  Tests that specifically tested
PlaceSafepoint's ability to wrap calls in gc.statepoint have been moved
to RS4GC's test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259096 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 21:51:14 +00:00
Matt Arsenault
e26a9f0de4 AMDGPU: Match fmed3 patterns with legacy fmin/fmax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259090 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 20:53:48 +00:00
Matt Arsenault
6a2bf372b8 AMDGPU: Match some med3 patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259089 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 20:53:42 +00:00
Matt Arsenault
ed6685cf17 AMDGPU: Set DX10Clamp bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259088 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 20:53:35 +00:00
Sanjay Patel
13e05949ac add masked intrinsic tests to show missed opportunities
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259083 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 19:54:20 +00:00
Sergei Larin
b333a462d9 [SplitModule] In split module utility we should never separate alias with its aliasee.
Summary: When splitting module with preserving locals, we currently do not handle case of global alias being separated with its aliasee.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16585



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259075 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 18:59:28 +00:00
David Majnemer
2404e4b025 Address buildbot fallout from r259065
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259074 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 18:59:04 +00:00
David Majnemer
98232aa5c9 [X86] Don't transform X << 1 to X + X during type legalization
While legalizing a 64-bit shift left by 1, the following occurs:

We split the shift operand in half: a high half and a low half.
We then create an ADDC with the low half and a ADDE with the high half +
the carry bit from the ADDC.

This is problematic if X is any_ext'd because the high half computation
is now undef + undef + carry bit and there is no way to ensure that the
two undef values had the same bitwise representation.  This results in
the lowest bit in the high half turning into garbage.

Instead, do not try to turn shifts into arithmetic during type
legalization.

This fixes PR26350.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259065 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 18:20:05 +00:00
Sanjoy Das
61400390f8 [PlaceSafepoints] Clean up tests; NFC
Use `opt < %s` instead of `opt %s` as specified in
http://llvm.org/docs/TestingGuide.html#fragile-tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259062 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 18:01:03 +00:00
Tom Stellard
641de45f36 AMDGPU: waitcnt operand fixes
Summary:
Allow lgkmcnt up to 0xF (hardware allows that).
Fix mask for ExpCnt in AMDGPUInstPrinter.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D16314

Patch by: Nikolay Haustov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259059 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 17:13:44 +00:00
Sanjoy Das
7b763c6151 [PlaceSafepoints] Minor test cleanup; NFC
There is no need to place quotes around some_call and
personality_function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259055 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 16:11:27 +00:00
Sanjoy Das
191fe55fbd [LICM] Keep metadata on control equivalent hoists
Summary:
If the instruction we're hoisting out of a loop into its preheader is
guaranteed to have executed in the loop, then the metadata associated
with the instruction (e.g. !range or !dereferenceable) is valid in the
preheader.  This is because once we're in the preheader, we know we're
eventually going to reach the location the metadata was valid at.

This change makes LICM smarter around this, and helps it recognize cases
like these:

```
  do {
    int a = *ptr; !range !0
    ...
  } while (i++ < N);
```

to

```
  int a = *ptr; !range !0
  do {
    ...
  } while (i++ < N);
```

Earlier we'd drop the `!range` metadata after hoisting the load from
`ptr`.

Reviewers: igor-laevsky

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16669

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259053 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 15:51:58 +00:00
Oliver Stannard
b95072ef89 Revert r259035, it introduces a cyclic library dependency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259045 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 13:19:47 +00:00
Igor Breger
39f8bee93d AVX512: Fix truncate v32i8 to v32i1 lowering implementation.
Enable truncate 128/256bit packed byte/word with AVX512BW but without AVX512VL, use 512bit instructions.

Differential Revision: http://reviews.llvm.org/D16531

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 13:19:25 +00:00
Zoran Jovanovic
b735cc6751 [mips][microMIPS] Disable FastISel for microMIPS
Author: milena.vujosevic.janicic
Reviewers: dsanders

FastIsel is not supported for microMIPS, thus it needs to be disabled. 
Test micromips-zero-mat-uses.ll is deleted since the tested sequence of instructions is not generated for microMIPS without FastISel.
Differential Revision: http://reviews.llvm.org/D15892


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259039 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 11:08:03 +00:00
Oliver Stannard
ef19a274ad Add backend dignostic printer for unsupported features
Re-commit of r258951 after fixing layering violation.

The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

Differential Revision: http://reviews.llvm.org/D16590



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259035 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 10:07:27 +00:00
Asaf Badouh
665e71adfd [X86][AVX512] small fix in ptestm intrinsics
move ptestm{q|d} intrinsics from patterns form (in td file) to the intrinsics table

Differential Revision: http://reviews.llvm.org/D16633



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259029 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 08:33:22 +00:00
Junmo Park
91de9d1201 [DAGCombiner] Don't add volatile or indexed stores to ChainedStores
Summary:
findBetterNeighborChains does not handle volatile or indexed stores.
However, it did not check when adding stores to ChainedStores.

Reviewers: arsenm

Differential Revision: http://reviews.llvm.org/D16463


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259024 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 06:23:33 +00:00
NAKAMURA Takumi
c1aeea845d Revert r258951 (and r258950), "Refactor backend diagnostics for unsupported features"
It broke layering violation in LLVMIR.

clang r258950 "Add backend dignostic printer for unsupported features"
llvm  r258951 "Refactor backend diagnostics for unsupported features"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259016 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 04:41:32 +00:00
Dan Gohman
99c12c224c [WebAssembly] Don't stackify a register def past a get_local use in the same tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259013 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 03:59:09 +00:00
Dan Gohman
dbc2732e36 [WebAssembly] Enhanced register stackification
This patch revamps the RegStackifier pass with a new tree traversal mechanism,
enabling three major new features:

 - Stackification of values with multiple uses, using the result value of set_local
 - More aggressive stackification of instructions with side effects
 - Reordering operands in commutative instructions to enable more stackification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259009 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 01:22:44 +00:00
Evgeniy Stepanov
ca14b57177 Tweak unnamed label syntax in textual IR for easier matching in tests.
Change the unnamed label comments like
  ; <label>:8  ; preds = %1
to
  ; <label>:8:  ; preds = %1

This way lit tests can match [[LABEL]]: in both asserts and no-asserts builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258993 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 21:53:08 +00:00
Derek Schuff
ffa1468fac [WebAssembly] Implement byval arguments
Summary:
Just does the simple allocation of a stack object and passes
a pointer to the callee.

Differential Revision: http://reviews.llvm.org/D16610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258989 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 21:17:39 +00:00
Davide Italiano
1db4cdc3b1 [llvm-nm] Remove redundant check for file validity.
We already perform it at the beginning of the function so we can't
arrive here with an invalid object. Also, add a test so that bugs
won't sneak in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258982 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 20:27:44 +00:00
Tim Northover
8362c240ca ARMv7k: base ABI decision on v7k Arch rather than watchos OS.
Various bits we want to use the new ABI actually compile with "-arch armv7k
-miphoneos-version-min=9.0". Not ideal, but also not ridiculous given how
slices work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258975 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 19:32:29 +00:00
Sanjay Patel
50c72a431d [SimplifyCFG] limit recursion depth when speculating instructions (PR26308)
This is a fix for:
https://llvm.org/bugs/show_bug.cgi?id=26308

With the switch to using the TTI cost model in:
http://reviews.llvm.org/rL228826
...it became possible to hit a zero-cost cycle of instructions (gep -> phi -> gep...), 
so we need a cap for the recursion in DominatesMergePoint().

A recursion depth parameter was already added for a different reason in:
http://reviews.llvm.org/rL255660
...so we can just set a limit for it.

I pulled "10" out of the air and made it an independent parameter that we can play with.
It might be higher than it needs to be given the currently low default value of 
PHINodeFoldingThreshold (2). That's the starting cost value that we enter the recursion
with, and most instructions have cost set to TCC_Basic (1), so I don't think we're going
to speculate more than 2 instructions with the current parameters.

As noted in the review and the TODO comment, we can do better than just limiting recursion
depth.

Differential Revision: http://reviews.llvm.org/D16637



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258971 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 19:22:45 +00:00
John McCall
5ee1f22ae3 Add support for objc_unsafeClaimAutoreleasedReturnValue to the
ObjC ARC Optimizer.

The main implication of this is:

1. Ensuring that we treat it conservatively in terms of optimization.
2. We put the ASM marker on it so that the runtime can recognize
objc_unsafeClaimAutoreleasedReturnValue from releaseRV.

<rdar://problem/21567064>

Patch by Michael Gottesman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258970 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 19:05:08 +00:00
Oliver Stannard
bf8415a84d Refactor backend diagnostics for unsupported features
The BPF and WebAssembly backends had identical code for emitting errors
for unsupported features, and AMDGPU had very similar code. This merges
them all into one DiagnosticInfo subclass, that can be used by any
backend.

There should be minimal functional changes here, but some AMDGPU tests
have been updated for the new format of errors (it used a slightly
different format to BPF and WebAssembly). The AMDGPU error messages will
now benefit from having precise source locations when debug info is
available.

The implementation of DiagnosticInfoUnsupported::print must be in
lib/Codegen rather than in the existing file in lib/IR/ to avoid
introducing a dependency from IR to CodeGen.

Differential Revision: http://reviews.llvm.org/D16590



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258951 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 17:30:33 +00:00
Simon Pilgrim
705e6271de [X86][SSE] Test insertps instrinsic calls with masks that can't combine to something simpler
For these basic tests of the intrinsic, make sure the mask can't simplify to movss, blend-with-zero or something else

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258941 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 16:51:57 +00:00
Igor Laevsky
953dd914d6 [DebugInfo] Support zero-length CIE in the _eh_frame parser
MCJIT emits zero-length CIE at the end of the _eh_frame section. This change
ensures that parser inside DebugInfo will not crash and correctly record such cases.
We are now recording DW_EH_PE_omit as a default value for FDE and LSDA encodings.
Also Offset != EndAugmentationOffset assertion check will only happen if augmentation 
string had 'z' letter in it.

Differential Revision: http://reviews.llvm.org/D16588



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258931 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 14:05:35 +00:00
Matthew Simpson
e470293402 Reapply commit r258404 with fix
This patch is the second attempt to reapply commit r258404. There was bug in
the initial patch and subsequent fix (mentioned below).

The initial patch caused an assertion because we were computing smaller type
sizes for instructions that cannot be demoted. The fix first determines the
instructions that will be demoted, and then applies the smaller type size to
only those instructions.

This should fix PR26239 and PR26307.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258929 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 13:43:27 +00:00
Benjamin Kramer
25ed974814 Revert "Allow X86::COND_NE_OR_P and X86::COND_NP_OR_E to be reversed."
and "Add a missing test case for r258847."

This reverts commit r258847, r258848. Causes miscompilations and backend
errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258927 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 12:44:12 +00:00
Sjoerd Meijer
6e2d811b06 Add missing build attribute regression tests for Cortex-A8
Differential Revision: http://reviews.llvm.org/D16576


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258923 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 11:34:51 +00:00
Marek Olsak
73be6ab813 AMDGPU/SI: Stoney has only 16 LDS banks
Summary:
This is a candidate for stable, along with all patches that add the "stoney"
processor.

Reviewers: tstellarAMD

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D16485

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258922 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 11:19:45 +00:00
Igor Breger
635f34044e AVX512: Fix vpmovzxbw predicate for AVX1/2 instructions.
Differential Revision: http://reviews.llvm.org/D16595

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258915 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 08:57:46 +00:00
Igor Breger
17870555d0 AVX512: Add store mask patterns.
Differential Revision: http://reviews.llvm.org/D16596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258914 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 08:43:25 +00:00
Chen Li
062e753253 [IndVarSimplify] Rewrite loop exit values with their initial values from loop preheader
Summary:
This is a revised version of D13974, and the following quoted summary are from D13974

"This patch adds support to check if a loop has loop invariant conditions which lead to loop exits. If so, we know that if the exit path is taken, it is at the first loop iteration. If there is an induction variable used in that exit path whose value has not been updated, it will keep its initial value passing from loop preheader. We can therefore rewrite the exit value with
its initial value. This will help remove phis created by LCSSA and enable other optimizations like loop unswitch."

D13974 was committed but failed one lnt test. The bug was that we only checked the condition from loop exit's incoming block was a loop invariant. But there could be another condition from loop header to that incoming block not being a loop invariant. This would produce miscompiled code.

This patch fixes the issue by checking if the incoming block is loop header, and if not, don't perform the rewrite. The could be further improved by recursively checking all conditions leading to loop exit block, but I'd like to check in this simple version first and improve it with future patches.     

Reviewers: sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258912 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 07:40:41 +00:00
David Majnemer
94dbbd19d0 Revert "Revert "[SimplifyCFG] allow speculation of exactly one expensive instruction (PR24818)""
This reverts commit r258903 which reverted r255660.  r258903 was an
accidental commit and should not have been committed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258905 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 02:59:41 +00:00
David Majnemer
bc3672991c [SimplifyCFG] Don't mistake icmp of and for a tree of comparisons
SimplifyCFG tries to turn complex branch conditions into a switch.
Some of it's logic attempts to reason about bitwise arithmetic produced
by InstCombine.  InstCombine can turn things like (X == 2) || (X == 3)
into (X & 1) == 2 and so SimplifyCFG tries to detect when this occurs so
that it can produce a switch instruction.

However, the legality checking was not sufficient to determine whether
or not this had occured.  Correctly check this case by requiring that
the right-hand side of the comparison be a power of two.

This fixes PR26323.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258904 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 02:43:28 +00:00
David Majnemer
e7026ee101 Revert "[SimplifyCFG] allow speculation of exactly one expensive instruction (PR24818)"
This reverts commit r255660.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 02:43:22 +00:00
Matt Arsenault
de2c3bc98d AMDGPU: Fix default device handling
When no device name is specified, default to kaveri
for HSA since SI is not supported and it woud fail.

Default to "tahiti" instead of "SI" since these are
effectively the same, and tahiti is an actual device.

Move default device handling to the TargetMachine
rather than the AMDGPUSubtarget. The module ISA version
is computed from the device name provided with the target
machine, so the attributes printed by the AsmPrinter were
inconsistent with those computed in the subtarget.

Also remove DevName field from subtarget since it's redundant
with getCPU() in the superclass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258901 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 02:17:49 +00:00
Dan Gohman
cd269059f9 [WebAssembly] Add a test for the mem-intrinsic code in WebAssemblyPeephole.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258895 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 01:37:52 +00:00
Kevin Enderby
6bc5c395e1 Fix identify_magic() to check that a file that starts with MH_MAGIC is
at least as big as the mach header to be identified as a Mach-O file and
make sure smaller files are not identified as a Mach-O files but as
unknown files. Also fix identify_magic() so it looks at all 4 bytes of
the filetype field when determining the type of the Mach-O file.
Then fix the macho-invalid-header test case to check that it is an
unknown file and make sure it does not get the error for
object_error::parse_failed.  And also update the unit tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258883 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 23:43:37 +00:00
Reid Kleckner
80814c51f4 [llvm-tblgen] Stop emitting the intrinsic name matching code
The AMDGPU backend was the last user of the old StringMatcher
recognition code. Move it over to the new lookupLLVMIntrinsicName
funciton, which is now improved to handle all of the interesting edge
cases exposed by AMDGPU intrinsic names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 23:01:21 +00:00
Derek Schuff
539303e404 [WebAssembly] Omit no-op adds for non-mem uses of FrameIndex
Differential Revision: http://reviews.llvm.org/D16554

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258872 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 22:47:43 +00:00
Simon Pilgrim
6c77f5367f [X86][SSE] Added 8i8 to 8i64 sext/zext tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258868 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 22:19:22 +00:00
Simon Pilgrim
bf3a7e4025 [X86] Add support for zeroed shuffle elements to getShuffleScalarElt
Enable handling of SM_SentinelZero shuffle elements to getShuffleScalarElt. Improves VZEXT_LOAD matches in EltsFromConsecutiveLoads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258865 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 21:39:25 +00:00