144292 Commits

Author SHA1 Message Date
Sanjay Patel
093eb4f6ff [InstCombine] enable (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2) for vectors with splat constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293507 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:19:32 +00:00
David Blaikie
ea0aa0fa59 unique_ptrify some containers in GlobalISel::RegisterBankInfo
To simplify/clarify memory ownership, make leaks (as one was found/fixed
recently) harder to write, etc.

(also, while I was there - removed a duplicate lookup in a container)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293506 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:13:56 +00:00
Matt Arsenault
6f6c6c9128 AMDGPU: Fix atomic_inc/atomic_dec + ds_swizzle not being divergent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293504 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:09:47 +00:00
Tom Stellard
945c85d877 AMDGPU/GlobalISel: Add support for simple shaders
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.

Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm

Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D26730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293503 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:09:15 +00:00
Daniel Berlin
93a40279b1 Update pr31758.ll for unreachable revert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293502 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:08:06 +00:00
Daniel Berlin
77a24c81b1 Revert "NewGVN: Make unreachable blocks be marked with unreachable"
This reverts commit r293196

Besides making things look nicer, ATM, we'd like to preserve analysis
more than we'd like to destroy the CFG.  We'll probably revisit in the future

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293501 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:06:55 +00:00
Simon Pilgrim
549b31f040 [X86][SSE] Add support for combining PINSRW+ASSERTZEXT+PEXTRW patterns with target shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293500 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:58:34 +00:00
Matt Arsenault
430953ebc8 DAG: Constant fold fp16_to_fp/fp16_to_fp
This fixes emitting conversions of constants on targets
without legal f16 that need to use these for legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293499 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:57:41 +00:00
Sanjay Patel
f406e8165b [InstCombine] fixed to propagate 'exact' on lshr
The original shift is bigger, so this may qualify as 'obvious', 
but here's an attempt at an Alive-based proof:

Name: exact
Pre: (C1 u< C2)
%a = shl i8 %x, C1
%b = lshr exact i8 %a, C2 
  =>
%c = lshr exact i8 %x, C2 - C1
%b = and i8 %c, ((1 << width(C1)) - 1) u>> C2

Optimization is correct!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293498 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:53:03 +00:00
Sanjay Patel
c15acfb9b1 [InstCombine] add 'exact' to lshr to show that it got dropped; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293496 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:38:49 +00:00
Benjamin Kramer
eb8cfb32d2 [Coroutines] Add header guard to header that's missing one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293494 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:32:20 +00:00
Adam Nemet
8b177c8b59 [Inliner] Fold analysis remarks into missed remarks
This significantly reduces the noise level of these messages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293492 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:22:45 +00:00
Krzysztof Parzyszek
10d8ceab1f [RDF] Add phis for entry block live-ins (in addition to function live-ins)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293491 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:20:30 +00:00
Haicheng Wu
f24bf5a453 [Inliner] Fix a comment to match the code. NFC.
TotalAltCost => TotalSecondaryCost

Differential Revision: https://reviews.llvm.org/D29231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293490 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:15:14 +00:00
Sanjay Patel
00794ce70d [InstCombine] enable lshr(shl X, C1), C2 folds for vectors with splat constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293489 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 16:11:40 +00:00
Sanjay Patel
c8ac2767b6 [InstCombine] add tests for shift-shift patterns; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293487 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 15:54:50 +00:00
Rafael Espindola
0f1ef541e4 Bring back r293480. It is safe now.
Original message:

    Fix the values of two xcore ELF flags.

    The values in llvm grew from a pre-MC day when they would not show up
    in .o files and are outside of the SHF_MASKPROC.

    Fortunately the MC output is not currently used as xcore has its own
    assemble and that assembler uses valid values. This updates llvm to
    use the same values as the xmos assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293486 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 15:49:20 +00:00
Rafael Espindola
d5702b77f0 Only print architecture dependent flags for that architecture.
Different architectures can have different meaning for flags in the
SHF_MASKPROC mask, so we should always check what the architecture use
before checking the flag.

NFC for now, but will allow fixing the value of an xmos flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293484 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 15:38:43 +00:00
Tom Stellard
7603d04f82 TableGen: Fix infinite recursion in RegisterBankEmitter
Summary:
AMDGPU has two register classes with the same set of registers, and this
was causing this tablegen backend would get stuck in infinite recursion.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: tpr, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D29049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293483 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 15:07:01 +00:00
Benjamin Kramer
2adb00a99f [Hexagon] Make header self-contained.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293482 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 14:55:33 +00:00
Rafael Espindola
3d66fa9327 Revert "Fix the values of two xcore ELF flags."
This reverts commit r293480.

The patch is correct, but found bugs in other areas that need to be fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293481 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 14:39:48 +00:00
Rafael Espindola
4b9ff85e31 Fix the values of two xcore ELF flags.
The values in llvm grew from a pre-MC day when they would not show up
in .o files and are outside of the SHF_MASKPROC.

Fortunately the MC output is not currently used as xcore has its own
assemble and that assembler uses valid values. This updates llvm to
use the same values as the xmos assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293480 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 14:07:43 +00:00
Asaf Badouh
3191d3a9f5 [X86][MCU] Minor bug fix for r293469 + test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293478 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 13:14:37 +00:00
Marek Olsak
8e270f5a6b AMDGPU: Remove a useless VI SMRD pattern
Summary: already covered by complex patterns

Reviewers: arsenm, nhaehnle, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28995

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293477 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 12:25:14 +00:00
Marek Olsak
b6f3d4a2c8 AMDGPU: Fix assembler encoding for EXP instructions on VI
Reviewers: arsenm, tstellarAMD

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28992

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293476 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 12:25:03 +00:00
Daniel Berlin
be1b992213 Revert "[MemorySSA] Revert r293361 and r293363, as the tests fail under asan."
This reverts commit r293471, reapplying r293361 and r293363 with a fix
for an out-of-bounds read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293474 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 11:35:39 +00:00
Sam McCall
b6af32432c [MemorySSA] Revert r293361 and r293363, as the tests fail under asan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293471 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 09:19:50 +00:00
Kristof Beyls
e9939d4d42 [GlobalISel] Add support for indirectbr
Differential Revision: https://reviews.llvm.org/D28079


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293470 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 09:13:18 +00:00
Asaf Badouh
bd71534b8a [X86][MCU] replace select with bit manipulation instead of branches
Differential Revision: https://reviews.llvm.org/D28354


 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293469 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 08:16:59 +00:00
Alexey Bader
7726f8808d [LanRef] Fix typo in getelementptr example.
Summary: Change B type from double to pointer to double.

Reviewers: delena, sanjoy

Reviewed By: sanjoy

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D29009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293467 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 07:38:58 +00:00
Craig Topper
dd23d7ede6 [AVX-512] Remove duplicate CodeGenOnly patterns for scalar register broadcast. We can use COPY_TO_REGCLASS like AVX does.
This causes stack spill slots be oversized sometimes, but the same should already be happening with AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293464 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 06:59:06 +00:00
Sam McCall
ec19b49e1d Include LLVMDumpValue in release builds.
This part of the C API is still used in language bindings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293460 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 05:40:52 +00:00
Jonas Paulsson
54490fc7ca [LoopVectorize] Improve getVectorCallCost() getScalarizationOverhead() call.
By calling getScalarizationOverhead with the CallInst instead of the types of
its arguments, we make sure that only unique call arguments are added to the
scalarization cost.

getScalarizationOverhead() is extended to handle calls by only passing on the
actual call arguments (which is not all the operands).

This also eliminates a wrapper function with the same name.

review: Hal Finkel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293459 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 05:38:05 +00:00
Craig Topper
8b0f69514c [AVX-512] Remove KSET0B/KSET1B in favor of the patterns that select KSET0W/KSET1W for v8i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293458 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 05:37:47 +00:00
Davide Italiano
4835612c12 [MemorySSA] Correct an assertion surrounding with parentheses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293453 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 03:16:43 +00:00
Will Dietz
876a1ad124 Test RuntimeDyld doesn't crash with R_X86_64_NONE (r293388).
Largely based on LLD test for dtrace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293451 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 01:28:42 +00:00
Craig Topper
5a5e8a7eb6 [AVX-512] Don't reuse VSHLI/VSRLI for mask register shifts. VSHLI/VSHRI shift within elements while KSHIFT moves whole elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293448 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 00:06:01 +00:00
Chris Ray
47870eea3d [X86][Disassembler] Added SALC instruction
Reviewers: joe.abbey, craig.topper

Reviewed By: craig.topper

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D29201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293447 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 23:02:47 +00:00
Craig Topper
ff2c48dbb6 [AVX-512] Fix lowering for mask register concatenation with undef in the lower half.
Previously this test case fired an assertion in getNode because we tried to create an insert_subvector with both input types the same size and the index pointing to half the vector width.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293446 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 22:53:33 +00:00
Chris Ray
8179f864a0 [X86] Fixing flag usage for RCL and RCR
Summary: The RCL and RCR instructions use the carry flag.

Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29237

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293441 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 20:05:30 +00:00
Matthias Braun
aaf8acb74e MachineInstr: Remove parameter from dump()
The primary use of the dump() functions in LLVM is for use in a
debugger. Unfortunately lldb does not seem to handle default arguments
so using `p SomeMI.dump()` fails and you have to type the longer `p
SomeMI.dump(nullptr)`. Remove the paramter to make the most common use
easy. (You can always construct something like `p
SomeMI.print(dbgs(),MyTII)` if you need more features).

Differential Revision: https://reviews.llvm.org/D29241

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293440 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 18:20:42 +00:00
Simon Pilgrim
12186ce14d [X86][SSE] Lower scalar_to_vector(0) to zero vector
Replaces an xor+movd/movq with an xorps which will be shorter in codesize, avoid an int-fpu transfer, allow modern cores to fast path the result during decode and helps other combines recognise an all-zero vector.

The only reason I can think of that we'd want to keep scalar_to_vector in this case is to help recognise the upper elts are undef but this doesn't seem to be a problem.

Differential Revision: https://reviews.llvm.org/D29097

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293438 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 18:13:37 +00:00
Zvi Rackover
6698c5da92 [X86] Reproducer for pr31719. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293437 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 17:57:26 +00:00
Matthias Braun
1a20e3f2d5 llvm-c: Keep LLVMDumpModule() even in release builds
While this probably should be considered a dump debugger utility, the C
API currently has no other ways to print a module to stderr for error
reporting purposes, so keep it even in release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293436 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 17:52:03 +00:00
Sanjay Patel
3a412958e7 [InstCombine] enable (X >>?,exact C1) << C2 --> X << (C2 - C1) for vectors with splats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293435 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 17:11:18 +00:00
Sanjay Patel
c7576ae80d [InstCombine] add tests for shl(shr X, C1), C2 transforms; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293434 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 16:52:59 +00:00
Saleem Abdulrasool
ce948e6304 ARM: support -mlong-calls with AEABI TLS on ELF
Support lowering AEABI TLS access (__aeabi_read_tp) with long calls.
This requires adjusting the call sequence to use an indirect call to get
full addressability.

Resolves PR31769!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293433 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 16:46:22 +00:00
Sanjay Patel
7ce26385c4 [ValueTracking] clean up lookThroughCast; NFCI
1. Use auto with dyn_cast.
2. Don't use else after return.
3. Convert chain of 'else if' to switch.
4. Improve variable names.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293432 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 16:34:57 +00:00
Elena Demikhovsky
81518f1117 [X86 Codegen] Fixed a bug in unsigned saturation
PACKUSWB converts Signed word to Unsigned byte, (the same about DW) and it can't be used for umin+truncate pattern.
AVX-512 VPMOVUS* instructions fit the pattern since they convert Unsigned to Unsigned.

See https://llvm.org/bugs/show_bug.cgi?id=31773

Differential Revision: https://reviews.llvm.org/D29196



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293431 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 13:18:30 +00:00
NAKAMURA Takumi
0634a6fc51 Add -mtriple=aarch64-unknown to llvm/test/CodeGen/AArch64/GlobalISel/gisel-abort.ll.
Unsupported target might be induced if default target is neither macho nor elf. (e.g. *-win32)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293430 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-29 11:10:34 +00:00