Commit Graph

147358 Commits

Author SHA1 Message Date
Evgeniy Stepanov
7bfedca6fc [asan] Fix dead stripping of globals on Linux.
Use a combination of !associated, comdat, @llvm.compiler.used and
custom sections to allow dead stripping of globals and their asan
metadata. Sometimes.

Currently this works on LLD, which supports SHF_LINK_ORDER with
sh_link pointing to the associated section.

This also works on BFD, which seems to treat comdats as
all-or-nothing with respect to linker GC. There is a weird quirk
where the "first" global in each link is never GC-ed because of the
section symbols.

At this moment it does not work on Gold (as in the globals are never
stripped).

This is a re-land of r298158 rebased on D31358. This time,
asan.module_ctor is put in a comdat as well to avoid quadratic
behavior in Gold.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299697 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:55:17 +00:00
Evgeniy Stepanov
9d134816b4 [asan] Put ctor/dtor in comdat.
When possible, put ASan ctor/dtor in comdat.

The only reason not to is global registration, which can be
TU-specific. This is not the case when there are no instrumented
globals. This is also limited to ELF targets, because MachO does
not have comdat, and COFF linkers may GC comdat constructors.

The benefit of this is a lot less __asan_init() calls: one per DSO
instead of one per TU. It's also necessary for the upcoming
gc-sections-for-globals change on Linux, where multiple references to
section start symbols trigger quadratic behaviour in gold linker.

This is a rebase of r298756.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299696 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:55:13 +00:00
Evgeniy Stepanov
fcc345974f [asan] Delay creation of asan ctor.
Create the constructor in the module pass.
This in needed for the GC-friendly globals change, where the constructor can be
put in a comdat  in some cases, but we don't know about that in the function
pass.

This is a rebase of r298731 which was reverted due to a false alarm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299695 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:55:09 +00:00
Peter Collingbourne
593fb7ed17 Bitcode: Do not create FNENTRYs for aliases of functions.
There doesn't seem to be any point in doing this.

Differential Revision: https://reviews.llvm.org/D31691

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299694 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:39:24 +00:00
Keno Fischer
93e3e80c72 [StripDeadDebugInfo] Drop dead CUs entirely
Summary:
Prior to this while it would delete the dead DIGlobalVariables, it would
leave dead DICompileUnits and everything referenced therefrom. For a bit
bitcode file with thousands of compile units those dead nodes easily
outnumbered the real ones. Clean that up.

Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D31720

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299692 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:26:22 +00:00
Yaxun Liu
e4f931e960 [AMDGPU] Temporarily change constant address space from 4 to 2
Our final address space mapping is to let constant address space to be 4 to match nvptx.
However for now we will make it 2 to avoid unnecessary work in FE/BE/devlib
about intrinsics returning constant pointers.

Differential Revision: https://reviews.llvm.org/D31770


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299690 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:17:32 +00:00
Yi Kong
dc9458d5a7 Revert "[ARM] Add Kryo to available targets"
This reverts commit 942d6e6f58.

Build breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299689 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:16:14 +00:00
Nirav Dave
d4d2ab353e [SDAG] Fix visitAND optimization to deal with vector extract case again.
Summary:
Fix case elided by rL298920.

Fixes PR32545.

Reviewers: eli.friedman, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31759

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299688 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:05:41 +00:00
Craig Topper
f8e400cffa [InstSimplify] Remove unreachable default from SimplifyBinOp.
We have dedicated handlers for every opcode so nothing can get here anymore. The switch doesn't get detected as fully covered because Opcode is an unsigned. Casting to Instruction::BinaryOps still doesn't detect it because BinaryOpsEnd is in the enum and 1 past the last opcode.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299687 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 18:59:08 +00:00
Daniel Berlin
3d88b146f6 NewGVN: Rename some functions for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299685 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 18:52:58 +00:00
Daniel Berlin
934731460a NewGVN: Fixup some small issues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299684 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 18:52:55 +00:00
Daniel Berlin
8648b7dd7a NewGVN: Fix a small formatting issue in performSymbolicLoadEvaluation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299683 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 18:52:53 +00:00
Daniel Berlin
a96ab41df7 NewGVN: This patch makes memory congruence work for all types of
memorydefs, not just stores.  Along the way, we audit and fixup issues
about how we were tracking memory leaders, and improve the verifier
to notice more memory congruency issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299682 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 18:52:50 +00:00
Yi Kong
942d6e6f58 [ARM] Add Kryo to available targets
Summary:
Host CPU detection now supports Kryo, so we need to recognize it in ARM
target.

Reviewers: mcrosier, t.p.northover, rengolin, echristo, srhines

Reviewed By: t.p.northover, echristo

Subscribers: aemerson

Differential Revision: https://reviews.llvm.org/D31775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299674 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 18:10:08 +00:00
Matt Arsenault
0719006e7e AMDGPU: Stop using CCAssignToRegWithShadow
This does not do what it is attempting to use it for
and requires working around in LowerFormalArguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299667 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 17:37:27 +00:00
Craig Topper
864291860e [InstSimplify] Teach SimplifyMulInst to recognize vectors of i1 as And. Not just scalar i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 17:33:37 +00:00
Krzysztof Parzyszek
6cf90d3647 [Hexagon] Change the vector scaling for vector offsets
Keep full offset value on MI-level instructions, but have it scaled down
in the MC-level instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299664 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 17:28:21 +00:00
Davide Italiano
0caf385833 [ADT] Add a generic breadth-first-search graph iterator.
This will be used in LCSSA to speed up the canonicalization.

Differential Revision:  https://reviews.llvm.org/D31694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299660 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 17:03:04 +00:00
Stanislav Mekhanoshin
3b10e5fb8d [AMDGPU] Eliminate barrier if workgroup size is not greater than wavefront size
If a workgroup size is known to be not greater than wavefront size
the s_barrier instruction is not needed since all threads are guarantied
to come to the same point at the same time.

Differential Revision: https://reviews.llvm.org/D31731

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299659 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 16:48:30 +00:00
Craig Topper
ba2269c0f0 [InstCombine] Fix a case where we weren't checking that an instruction had a single use resulting in extra instructions being created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299658 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 16:42:46 +00:00
Sam Kolton
3481b0868e [AMDGPU] Resubmit SDWA peephole: enable by default
Reviewers: vpykhtin, rampitec, arsenm

Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D31671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299654 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 15:03:28 +00:00
Jonas Paulsson
ff14b9ebc7 [SelectionDAG] NFC patch removing a redundant check.
Since the BUILD_VECTOR has already been checked by
isBuildVectorOfConstantSDNodes() in SelectionDAG::getNode() for a
SIGN_EXTEND_INREG, it can be assumed that Op is always either undef or a
ConstantSDNode, and Ops.size() will always equal VT.getVectorNumElements().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299647 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 13:00:37 +00:00
Simon Pilgrim
ed65bfc6c9 [X86][MMX] Test showing failure to create MMX non-temporal store
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299640 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 10:32:30 +00:00
Daniel Sanders
f167493b19 [globalisel][tablegen] Move <Target>InstructionSelector declarations to anonymous namespaces
Summary: This resolves the issue of tablegen-erated includes in the headers for non-GlobalISel builds in a simpler way than before.

Reviewers: qcolombet, ab

Reviewed By: ab

Subscribers: igorb, ab, mgorny, dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30998



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299637 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 09:49:34 +00:00
David Green
3b23ff5204 [ARM] Remove a dead ADD during the creation of TBBs
During the optimisation of jump tables in the constant island pass,
an extra ADD could be left over, now dead but not removed.

Differential Revision: https://reviews.llvm.org/D31389



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299634 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 08:32:47 +00:00
Craig Topper
3c3df0d82a [InstSimplify] Add test cases for mixing add/sub i1 with xor of i1. Seems we can simplify in one direction but not the other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299627 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 05:48:06 +00:00
Craig Topper
1194a001b6 [InstSimplify] Teach SimplifyAddInst and SimplifySubInst that vectors of i1 can be treated as Xor too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299626 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 05:28:41 +00:00
Dean Michael Berris
af703fae1e [XRay][docs] Fix hyperlink to XRay doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299624 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:26:26 +00:00
Lang Hames
d6028a160d [Orc] Add missing header include for r299611.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299623 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:12:47 +00:00
Craig Topper
0555b65034 Revert accidental commit of r299619.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299622 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:04:10 +00:00
Craig Topper
f399f6df54 Revert accidental commit of r299618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299621 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:03:34 +00:00
Craig Topper
8f5aadd465 [IR] Add commutable matchers for Add and Mul to go with the logic operations that are already present. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299620 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:02:33 +00:00
Craig Topper
4b9e4f7c82 bar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299619 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:02:31 +00:00
Craig Topper
5c2c633a8d foo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299618 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 04:02:28 +00:00
Keith Wyss
6eb553fb1a [XRay] - Fix spelling error to test commit access.
Just a spelling change in a comment intended to test svn commit access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299616 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 03:32:01 +00:00
Lang Hames
456e01a064 [Orc] Break QueueChannel out into its own header and add a utility,
createPairedQueueChannels, to simplify channel creation in the RPC unit tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299611 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 01:49:21 +00:00
Lang Hames
e128ff2ea9 [Orc] Make orcError return an error_code rather than Error.
This will allow orcError to be used in convertToErrorCode implementations,
which will help in transitioning Orc RPC to Error.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299610 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 01:35:13 +00:00
Reid Kleckner
57cceedbb1 [lit] Implement timeouts and max_time for process pool testing
This is necessary to pass the lit test suite at llvm/utils/lit/tests.

There are some pre-existing failures here, but now switching to pools
doesn't regress any tests.

I had to change test-data/lit.cfg to import DummyConfig from a module to
fix pickling problems, but I think it'll be OK if we require test
formats to be written in real .py modules outside lit.cfg files.

I also discovered that in some circumstances AsyncResult.wait() will not
raise KeyboardInterrupt in a timely manner, but you can pass a non-zero
timeout to work around this. This makes threading.Condition.wait use a
polling loop that runs through the interpreter, so it's capable of
asynchronously raising KeyboardInterrupt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299605 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 00:38:28 +00:00
Peter Collingbourne
ce637fef4f StringTableBuilder: Don't assert when writing an empty raw string table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299602 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 00:10:17 +00:00
Peter Collingbourne
1f64ee0da0 Bitcode: Remove an unused declaration. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299598 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 22:49:52 +00:00
Bryant Wong
062224cde7 [Bugpoint] Use unique_ptr correctly.
Moving Modules into `testMergedProgram` is incorrect (and causes segmentation
faults) since all callers expect to retain ownership. This is evidenced by the
later calls to `unique_ptr<Module>::get` in the same function.

Differential Revision: https://reviews.llvm.org/D31727

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299596 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 22:23:48 +00:00
Keno Fischer
15bfd0f9a0 [X86 TTI] Implement LSV hook
Summary:
LSV wants to know the maximum size that can be loaded to a vector register.
On X86, this always matches the maximum register width. Implement this
accordingly and add a test to make sure that LSV can vectorize up to the
maximum permissible width on X86.

Reviewers: delena, arsenm

Reviewed By: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D31504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299589 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 20:51:38 +00:00
Ivan Krasin
4640b8eb90 Remove accidental debug printf. Follow up to r299583.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299584 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 20:07:43 +00:00
Ivan Krasin
f836c7dbde Revert r299536. [AMDGPU] SDWA peephole: enable by default.
Reason: breaks multiple bots:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/3988
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/1173

Original Review URL: https://reviews.llvm.org/D31671



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299583 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 19:58:12 +00:00
Krzysztof Parzyszek
acdd13502c [Hexagon] Use -mattr to select HVX mode in a testcase, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299582 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 19:46:37 +00:00
Daniel Berlin
d6a6d70f05 MemorySSA: Remove MemorySSA walker caching.
Summary:
Remove all the caching the clobber walker does, and that the
caching walker does.  With the patch to enable storing clobbering
access results for stores, i can find no improvement with the cache
turned on (and a number of degradations, both time and memory, from
the cost of caching.  For a large program i have, we do millions of
lookups and inserts with zero hits).

I haven't tried to rename or simplify the walker otherwise yet.

(Appreciate some perf testing on this past my own testing)

Reviewers: george.burgess.iv, davide

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31576

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299578 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 19:01:58 +00:00
Petr Hosek
12290fa787 [llvm-readobj] Only print the real size of the note
Note payloads are padded to a multiple of 4 bytes in size, but the size
of the string that should be print can be smaller e.g. the n_descsz
field in gold's version note is 9, so that's the whole size of the
string that should be printed. The padding is part of the format of a
SHT_NOTE section or PT_NOTE segment, but it's not part of the note
itself.

Printing the extra null bytes may confuse some tools, e.g. when the
llvm-readobj is sent to grep, it treats the output as binary because
it contains a null byte.

Differential Revision: https://reviews.llvm.org/D30804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299576 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 18:55:50 +00:00
Adam Nemet
c0a481413e [DAGCombine] Support FMF contract in fused multiple-and-sub too
This is a follow-on to r299096 which added support for fmadd.

Subtract does not have the case where with two multiply operands we commute in
order to fuse with the multiply with the fewer uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299572 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 17:58:48 +00:00
Adam Nemet
0a518c38de [DAGCombine] Remove commented-out code from r299096
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299571 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 17:58:44 +00:00
Sanjay Patel
bcca3be4b5 [InstCombine] add fold for icmp with or mask of low bits (PR32542)
We already have these 'and' folds:

// X & -C == -C -> X >  u ~C
// X & -C != -C -> X <= u ~C
//   iff C is a power of 2

...but we were missing the 'or' siblings.

http://rise4fun.com/Alive/n6

This should improve:
https://bugs.llvm.org/show_bug.cgi?id=32524
...but there are 2 or more other pieces to fix still.

Differential Revision: https://reviews.llvm.org/D31712



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299570 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 17:57:05 +00:00