145264 Commits

Author SHA1 Message Date
Craig Topper
8f60fb0d6f [TableGen] Make sure EnforceSameSize populates the type sets if necessary.
This was found by another commit I'm working on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295578 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 22:53:38 +00:00
Simon Pilgrim
7d34dcef8f [AArch64] Fix enumeral/non-enumeral conditional expression warning.
gcc only allows you to mix enums / ints if they have the same signedness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295577 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 22:50:28 +00:00
Simon Pilgrim
5ff0a24f6e [X86] Fix enumeral/non-enumeral comparison warning.
gcc only allows you to mix enums / ints if they have the same signedness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295576 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 22:40:58 +00:00
Simon Pilgrim
f9e2c1f957 [X86][SSE] Avoid repeated calls to SDValue::getValueType.
Added assertion to check input type of X86ISD::VZEXT during target known bits calculation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295575 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 22:25:27 +00:00
Sanjay Patel
2b341046dd [InstCombine] add nsw/nuw X, signbit --> or X, signbit
Changing to 'or' (rather than 'xor' when no wrapping flags are set)
allows icmp simplifies to happen as expected.

Differential Revision: https://reviews.llvm.org/D29729


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295574 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 22:20:09 +00:00
Sanjay Patel
132ef2be48 [InstSimplify] add nsw/nuw (xor X, signbit), signbit --> X
The change to InstCombine in:
https://reviews.llvm.org/D29729
...exposes this missing fold in InstSimplify, so adding this
first to avoid a regression.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295573 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 21:59:09 +00:00
Sanjay Patel
f7584cdc50 [InstSimplify] add tests for add nsw/nuw (xor X, signbit), signbit --> X; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295572 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 21:51:14 +00:00
Craig Topper
58ee25f913 Recommit "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."
Clang has now been fixed to not use these intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295571 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 21:50:58 +00:00
Sanjay Patel
33dd286521 [x86] remove stale comments from tests; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295569 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 21:07:37 +00:00
Sanjay Patel
4c507d5052 [x86] fold sext (xor Bool, -1) --> sub (zext Bool), 1
This is the same transform that is current used for:
select Bool, 0, -1



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295568 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 21:03:28 +00:00
Piotr Padlewski
e7c7257c3a [MemorySSA] NFC small fixes
Summary:
2 small fixes extracted from
https://reviews.llvm.org/D29064

Reviewers: kuhar, davide, dberlin, george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295566 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 20:34:36 +00:00
Craig Topper
b3d03a9308 Revert "[X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR."
This reverts r295564. I missed that clang was still using the intrinsics despite our half implemented autoupgrade support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295565 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 20:14:20 +00:00
Craig Topper
aa2f6f93a2 [X86] Remove XOP VPCMOV intrinsics and autoupgrade them to native IR.
It seems we were already upgrading 128-bit VPCMOV, but the intrinsic was still defined and being used in isel patterns. While I was here I also simplified the tablegen multiclasses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295564 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 19:51:25 +00:00
Craig Topper
a6bf7e7433 [X86][IR] Simplify the XOP vpcmov autoupgrade code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295563 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 19:51:19 +00:00
Craig Topper
fc7a041c9e [X86][IR] Merge together some very similar AutoUpgrade handling. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295562 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 19:51:14 +00:00
Matt Arsenault
a418139e85 AMDGPU: Fix assembler subtarget predicate for gfx9
This was accepting GFX9 instructions on VI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295557 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 19:12:26 +00:00
Matt Arsenault
4371ec2c18 AMDGPU: Fix disassembly of aperture registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295555 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 18:41:41 +00:00
Matt Arsenault
83c857cd3a AMDGPU: Merge initial gfx9 support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295554 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 18:29:53 +00:00
Sanjay Patel
d0fd4adddf [InstCombine] add tests for trunc(insertelement); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295553 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 18:27:04 +00:00
Easwaran Raman
08ce689a38 Refactor instruction simplification code in visitors. NFC.
Several visitors check if operands to the instruction are constants,
either as it is or after looking up SimplifiedValues, check if the
result is a constant and update the SimplifiedValues map. This
refactoring splits it into a common function that does the checking of
whether the operands are constants and updating of the SimplifiedValues
table, and an instruction specific part that is implemented by each
instruction visitor as a lambda and passed to the common function.

Differential revision: https://reviews.llvm.org/D30104

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295552 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 17:22:52 +00:00
Sanjay Patel
de80e80f01 [InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC
We're ok shrinking splats, but not shuffles in general.

See https://reviews.llvm.org/D30123 for discussion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295547 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 15:24:31 +00:00
Brian Cain
34b4908c3e opt-viewer: Fix syntax highlighting
Syntax highlighting has been done line-at-a-time. Done this way, the lexer
resets the context at each line, distorting the formatting.

This change will render the whole file at once and feed the highlighted text
line-at-a-time to be wrapped by the SourceFileRenderer.

Leading/trailing newlines were being ignored by Pygments but since each line
was rendered in its own row, it didn't matter. This bug was masked by the
line-at-a-time algorithm. So now we need to add "stripnl=False" to the 
CppLexer to change its behavior to match the expectation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295546 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 15:13:58 +00:00
Craig Topper
47cf6aadec [AVX-512] Remove 128/256-bit masked fp max/min intrinsics. Upgrade them to legacy unmasked intrinsics and select instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295543 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 07:07:50 +00:00
Dehao Chen
6ded4c316a Add default OptLevel value for createSimpleLoopUnrollPass to fix the build break introduced by r295538. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295542 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 06:42:16 +00:00
Jan Vesely
aa04f11f4a AMDGPU/R600: Assert on infinite loop in EmitClauseMarkers
Differential Revision: https://reviews.llvm.org/D29792

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295539 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 04:24:10 +00:00
Dehao Chen
1ae1089dec Increases full-unroll threshold.
Summary:
The default threshold for fully unroll is too conservative. This patch doubles the full-unroll threshold

This change will affect the following speccpu2006 benchmarks (performance numbers were collected from Intel Sandybridge):

Performance:

403	0.11%
433	0.51%
445	0.48%
447	3.50%
453	1.49%
464	0.75%

Code size:

403	0.56%
433	0.96%
445	2.16%
447	2.96%
453	0.94%
464	8.02%

The compiler time overhead is similar with code size.

Reviewers: davidxl, mkuper, mzolotukhin, hfinkel, chandlerc

Reviewed By: hfinkel, chandlerc

Subscribers: mehdi_amini, zzheng, efriedma, haicheng, hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D28368

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295538 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 03:46:51 +00:00
Davide Italiano
8faf95ff17 [IR/Verifier] Don't visit DISubprograms more than needed.
Before this patch we happened to visit twice, one when scanning
MDNodes and the other one while visiting the function. Remove
the explicit call to visitDISubprogram there, so we don't emit
the same error twice in case the verifier fail and we save some
time when running it.
Thanks to Justin Bogner for the report and Adrian for the quick
review!

PR: 31995

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295537 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 03:02:44 +00:00
Dylan McKay
72748efa68 [AVR] Set UseIntegratedAssembler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295535 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 02:26:11 +00:00
Justin Bogner
4be00b7013 OptDiag: Allow constructing DiagnosticLocation from DISubprograms
This avoids creating a DILocation just to represent a line number,
since creating Metadata is expensive. Creating a DiagnosticLocation
directly is much cheaper.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295531 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 02:00:27 +00:00
Zachary Turner
47c9a8fc0d Remove the is_trivially_copyable check entirely.
This is still breaking builds because some compilers think
this type is not trivially copyable even when it should be.

Reverting this static_assert until I have time to investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295529 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 01:51:00 +00:00
Zachary Turner
a0a840a431 Use llvm workaround for missing is_trivially_copyable.
some versions of GCC don't have this, so LLVM provides a
workaround.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295526 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 01:46:01 +00:00
Zachary Turner
980cadce13 Don't assume little endian in StreamReader / StreamWriter.
In an effort to generalize this so it can be used by more than
just PDB code, we shouldn't assume little endian.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295525 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 01:35:33 +00:00
Matthias Braun
045ad1b55f machine-region-info.mir: Slightly simplify test, -mtriple
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295520 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 00:48:43 +00:00
Justin Bogner
787e150ebe OptDiag: Decouple backend diagnostics from debug info metadata
This creates and uses a DiagnosticLocation type rather than using
DebugLoc for this purpose in the backend diagnostics. This is NFC for
now, but will allow us to create locations for diagnostics without
having to create new metadata nodes when we don't have a DILocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295519 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 00:42:23 +00:00
Matthias Braun
5e55477ae5 MachineRegionInfo: Fix pass initialization
- Adapt MachineBasicBlock::getName() to have the same behavior as the IR
  BasicBlock (Value::getName()).
- Add it to lib/CodeGen/CodeGen.cpp::initializeCodeGen so that it is linked in
  the CodeGen library.
- MachineRegionInfoPass's name conflicts with RegionInfoPass's name ("region").
- MachineRegionInfo should depend on MachineDominatorTree,
  MachinePostDominatorTree and MachineDominanceFrontier instead of their
  respective IR versions.
- Since there were no tests for this, add a X86 MIR test.

Patch by Francis Visoiu Mistrih<fvisoiumistrih@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295518 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 00:41:16 +00:00
Justin Bogner
a39b1ce61f Verifier: Disallow a line number without a file in DISubprogram
A line number doesn't make much sense if you don't say where it's
from. Add a verifier check for this and update some tests that had
bogus debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295516 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 23:57:42 +00:00
Sanjay Patel
e581944506 [InstCombine] add tests for trunc(shuffle X, C, M); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295513 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 23:16:54 +00:00
Matthias Braun
92e3dc4c50 AArch64LoadStoreOptimizer: Correctly clear kill flags
When promoting the Load of a Store-Load pair to a COPY all kill flags
between the store and the load need to be cleared.

rdar://30402435

Differential Revision: https://reviews.llvm.org/D30110

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295512 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 23:15:03 +00:00
Simon Pilgrim
6bd44f2375 [X86] Add MOVBE targets to load combine tests
Test folded endian swap tests with MOVBE instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295508 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 23:00:21 +00:00
Guozhi Wei
4d5bc87951 [PPC] Give unaligned memory access lower cost on processor that supports it
Newer ppc supports unaligned memory access, it reduces the cost of unaligned memory access significantly. This patch handles this case in PPCTTIImpl::getMemoryOpCost.

This patch fixes pr31492.

Differential Revision: https://reviews.llvm.org/D28630

This is resubmit of r292680, which was reverted by r293092. The internal application failures were actually caused by a source code bug.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295506 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 22:29:39 +00:00
Eugene Zelenko
06332794af [CodeGen] Revert changes in LowLevelType to pre-r295499 to fix broken buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295505 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 22:23:34 +00:00
Krzysztof Parzyszek
eee70a1f65 [Hexagon] Start using regmasks on calls
Reapply r295371 with a fix for the Windows bot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295504 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 22:14:51 +00:00
Davide Italiano
4022d8a46d [NewGVN] isOnlyReachableViaThisEdge() is dead now. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295503 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 22:12:30 +00:00
Simon Pilgrim
4231bd0a9d [X86] Simplify by pulling out valuetype. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295502 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 22:10:10 +00:00
Eugene Zelenko
dc5aad66ca [CodeGen] Attempt to fix buildbots broken in r295499.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295501 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 22:07:26 +00:00
Davide Italiano
24976e5c1c [NewGVN] createVariableOrConstant is not required anymore. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295500 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 21:55:47 +00:00
Eugene Zelenko
ad3a5404cb [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295499 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 21:43:25 +00:00
Simon Pilgrim
fcd878d181 [X86] Add subborrow stack folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295496 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 21:16:24 +00:00
Sanjay Patel
69382f1737 [x86] add tests for sext (not bool); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295495 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 21:10:40 +00:00
Matthew Simpson
b82f5b8ba8 [LAA] Remove unused code (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295493 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-17 20:46:52 +00:00