Commit Graph

51706 Commits

Author SHA1 Message Date
Jakub Staszak
c9040b3b13 Remove unneeded type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 00:08:00 +00:00
Jim Grosbach
4e4139588c ARM: Parameterize the immediate operand type for NEON VSHLL.
No functional change yet. Will be implementing range-checked immediates
for better diagnostics and disambiguation of instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 00:02:17 +00:00
Jakub Staszak
e6d81ad6a5 - Remove unneeded #includes.
- Remove unused types/fields.
- Add some constantness.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 23:59:33 +00:00
Jakob Stoklund Olesen
6fbea43b0b Revert r145971: "Use conservative size estimate for tBR_JTr."
This caused more offset errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 22:41:31 +00:00
Bill Wendling
054a8be154 Re-enable compact unwind. It seems to work now. <rdar://problem/10441838>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 22:18:12 +00:00
Bill Wendling
84d518af19 Explicitly check for the different SUB instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 22:14:27 +00:00
Evan Cheng
7c2a4a30e0 First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 22:12:01 +00:00
Jakob Stoklund Olesen
d25c27807e Use conservative size estimate for tBR_JTr.
This pseudo-instruction contains a .align directive in its expansion, so
the total size may vary by 2 bytes.

It is too difficult to accurately keep track of this alignment
directive, just use the worst-case size instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 21:55:39 +00:00
Jakob Stoklund Olesen
305e5fe797 Remove alignment from deserted constant islands.
ARMConstantIslandPass may sometimes leave empty constant islands behind
(it really shouldn't). Remove the alignment from the empty islands so
the size calculations are still correct.

This should fix the many Thumb1 assembler errors in the nightly test
suite.

The reduced test case for this problem is way too big. That is to be
expected for ARMConstantIslandPass bugs.

<rdar://problem/10534709>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 21:55:35 +00:00
Bill Wendling
581ac2723c Encode the total stack if there isn't a frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 21:34:01 +00:00
Bill Wendling
57a3cd2f32 * Add a macro to remove a magic number.
* Rename variables to reflect what they're actually used for.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 21:23:42 +00:00
Jakob Stoklund Olesen
f2e944523c Pretty-print basic block alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 21:08:39 +00:00
Hal Finkel
d21e930eac add RESTORE_CR and support CR unspills
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145961 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 20:55:36 +00:00
Hal Finkel
16588e794c remove old FIXME
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 20:52:56 +00:00
Bill Wendling
5b2c4978ce Check the correct value for small stack sizes. Also modify some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 19:16:17 +00:00
Bill Wendling
75e14e0ebd For a small sized stack, we encode that value directly with no "stack adjust" value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 19:09:06 +00:00
Justin Holewinski
4c7ffb6a7e PTX: Continue to fix up the register mess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 17:39:48 +00:00
Justin Holewinski
e37a83f66b PTX: Encode registers as unsigned values in the MC asm printer instead of using external symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 17:39:46 +00:00
Sebastian Pop
464f3a332f use space star instead of star space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 17:34:16 +00:00
Sebastian Pop
f6f77e90a1 add missing point at the end of sentences
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 17:34:11 +00:00
Benjamin Kramer
88c09143b6 Simplify common predecessor finding.
- Walking over pred_begin/pred_end is an expensive operation.
- PHINodes contain a value for each predecessor anyway.
- While it may look like we used to save a few iterations with the set,
  be aware that getIncomingValueForBlock does a linear search on
  the values of the phi node.
- Another -5% on ARMDisassembler.cpp (Release build). This was the last
  entry in the profile that was obviously wasting time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 16:14:29 +00:00
Benjamin Kramer
85dadecbd6 Push StringRefs through the metadata interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 11:50:26 +00:00
Craig Topper
fe03315925 Add X86ISD::HADD/HSUB to getTargetNodeName
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145929 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 09:31:36 +00:00
Craig Topper
cb6bd11bd6 Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other integer vector loads are promoted to those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 09:04:59 +00:00
Craig Topper
34671b812a Merge floating point and integer UNPCK X86ISD node types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145926 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 08:21:25 +00:00
Craig Topper
3d8c2ce3e4 Clean up some of the shuffle decoding code for UNPCK instructions. Add instruction commenting for AVX/AVX2 forms for integer UNPCKs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 05:31:16 +00:00
Jim Grosbach
23261af193 ARM mode 'mul' operand ordering tweak.
Same as r145922, just for ARM mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 05:28:00 +00:00
Jim Grosbach
cf9814ddd2 Thumb2: MUL two-operand form encoding operand order fix.
Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we
match gas.

rdar://10532439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 05:03:45 +00:00
Craig Topper
1ff73d7a67 Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do both. Do the same for the 256-bit version. Use loops to reduce size of isVSHUFPYMask. Fix test cases that were incorrectly passing due to isCommutedSHUFPMask not checking for the vector being 128-bit. This caused some 256-bit shuffles to be incorrectly commuted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145921 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 04:59:07 +00:00
Jim Grosbach
df33e0d05e Thumb2 encoding choice correction for PLD.
Using encoding T1 for offset of #0 and encoding T2 for #-0.

rdar://10532413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 04:49:29 +00:00
Bruno Cardoso Lopes
ff452f5349 Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 03:34:48 +00:00
Bruno Cardoso Lopes
a00a62acd0 Explicit symbols for gnu mimicing relocations. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145911 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 03:34:42 +00:00
Bruno Cardoso Lopes
2bcc789a9d Add register HWR29 numbering. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145910 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 03:34:36 +00:00
Andrew Trick
8a5d792944 LSR: prune undesirable formulae early.
It's always good to prune early, but formulae that are unsatisfactory
in their own right need to be removed before running any other pruning
heuristics. We easily avoid generating such formulae, but we need them
as an intermediate basis for forming other good formulae.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145906 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 03:13:31 +00:00
Evan Cheng
89dae971b1 Mix some minor misuse of MachineBasicBlock iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145903 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 02:49:06 +00:00
Pete Cooper
d3743fc092 Removed isWinToJoinCrossClass from the register coalescer.
The new register allocator is much more able to split back up ranges too constrained by register classes.

Fixes <rdar://problem/10466609>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145899 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 02:06:50 +00:00
Lang Hames
bae56b4c21 Kill off the LoopSplitter. It's not being used or maintained.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:57:59 +00:00
Bill Wendling
80caf9c273 Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:57:48 +00:00
Jim Grosbach
cb86509e7a Tidy up value checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:53:17 +00:00
NAKAMURA Takumi
6482e91149 MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:48:32 +00:00
Lang Hames
9ad7e07a0f Update PBQP's analysis usage to reflect the requirements of the inline spiller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:45:57 +00:00
Chad Rosier
ed42c5f778 [arm-fast-isel] Doublewords only require word-alignment.
rdar://10528060

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:44:17 +00:00
Jakob Stoklund Olesen
3e572ac2fb Align ARM constant pool islands via their basic block.
Previously, all ARM::CONSTPOOL_ENTRY instructions had a hardwired
alignment of 4 bytes emitted by ARMAsmPrinter.  Now the same alignment
is set on the basic block.

This is in preparation of supporting ARM constant pool islands with
different alignments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145890 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:43:02 +00:00
Jakob Stoklund Olesen
8c741b8064 Use logarithmic units for basic block alignment.
This was actually a bit of a mess. TLI.setPrefLoopAlignment was clearly
documented as taking log2(bytes) units, but the x86 target would still
set a preferred loop alignment of '16'.

CodePlacementOpt passed this number on to the basic block, and
AsmPrinter interpreted it as bytes.

Now both MachineFunction and MachineBasicBlock use logarithmic
alignments.

Obviously, MachineConstantPool still measures alignments in bytes, so we
can emulate the thrill of using as.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:26:19 +00:00
Bill Wendling
79df986c60 The compact encoding of the registers are 3-bits each. Make sure we shift the
value over that much.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:26:14 +00:00
Jim Grosbach
d9a6e8978d Fix ARM handling of tBcc branch relaxation.
rdar://10069056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:08:19 +00:00
Jakob Stoklund Olesen
e80fba0e6c Use an existing function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145883 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:51:12 +00:00
Jim Grosbach
370b78d795 Move target-specific logic out of generic MCAssembler.
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:47:03 +00:00
Nick Lewycky
7c06741004 Expose a switch for the new gcov format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145880 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:29:13 +00:00
Chad Rosier
dce42b75dc Probably not a good idea to convert a single vector load into a memcpy. We
don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:19:08 +00:00
Jim Grosbach
f68a26b5d8 Tidy up. Hard tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:13:09 +00:00
Jim Grosbach
f77d5b14af Switch MCAssembler to method names starting w/ lower-case.
per http://llvm.org/docs/CodingStandards.html#ll_naming

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:03:48 +00:00
Jim Grosbach
f503ef6800 Simple branch relaxation for Thumb2 Bcc instructions.
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 23:45:46 +00:00
Nick Lewycky
aa21e417f2 Silence tsan false-positives (tsan can't track things which are only safe due to
memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 23:07:05 +00:00
Chad Rosier
a4b6fd5be0 Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:53:09 +00:00
Chad Rosier
d8bd26ee24 Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio
where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://10510150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145865 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:37:00 +00:00
Jim Grosbach
713c70238c Tweak ADDrr fix. Bad check for explicit .w
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:27:04 +00:00
Jim Grosbach
927b9df4c6 Thumb2 prefer ADD register encoding T2 to T3 when possible.
rdar://10529664


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145860 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:16:39 +00:00
Akira Hatanaka
d6bc5237d8 Add definitions of 64-bit extract and insert instrucions and make
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:26:34 +00:00
Akira Hatanaka
cee46abc16 Split ExtIns into two base classes and have instructions EXT and INS derive from
them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:14:28 +00:00
Jim Grosbach
da84786bee Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.
rdar://10529348


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:06:26 +00:00
Akira Hatanaka
2bf08ec854 Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
O32 with relocation-model=pic too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:03:03 +00:00
Jim Grosbach
253ef7a779 ARM assembly parsing for the rest of the VMUL data type aliases.
Finish up rdar://10522016.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 20:29:59 +00:00
Jim Grosbach
422faab909 Fix previous commit. Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 20:12:26 +00:00
Jim Grosbach
45755a77ec Tidy up. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145843 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 20:09:44 +00:00
Jim Grosbach
afb500ace1 ARM assmebler parsing for two-operand VMUL instructions.
Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.

rdar://10522016

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 19:55:46 +00:00
Hal Finkel
3fd0018af1 enable PPC register scavenging by default (update tests and remove some FIXMEs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:17 +00:00
Hal Finkel
9489487f98 don't include CR bit subregs in callee-saved list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:12 +00:00
Hal Finkel
2e313caa36 add register pressure for CR regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:54:17 +00:00
Benjamin Kramer
4da7f90b17 Add a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic blocks.
- Calling getUser in a loop is much more expensive than iterating over a few instructions.
- Use it instead of the open-coded loop in AddrModeMatcher.
- 5% speedup on ARMDisassembler.cpp Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:23:27 +00:00
Craig Topper
1dc0fbc168 Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 07:27:14 +00:00
Craig Topper
beabc6cc6d Clean up and optimizations to the X86 shuffle lowering code. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 06:56:46 +00:00
Nadav Rotem
1608769abe Add support for vectors of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145801 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 06:29:09 +00:00
Eric Christopher
309bedd7bc Add inline subprogram names to the name lookup table since they may
not get there any other way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-04 06:02:38 +00:00
Bob Wilson
6ce2deacef Fix 80-column issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-04 00:52:23 +00:00
Anton Korobeynikov
0cb2a45cce Emit the ctors in the proper order on ARM/EABI.
Maybe some targets should use this as well.

Patch by Evgeniy Stepanov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 23:49:37 +00:00
Venkatraman Govindaraju
80b1ae9292 Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since
AnalyzeBranch doesn't change the successor, just the order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 21:24:48 +00:00
Benjamin Kramer
a86bfc1071 Simplify code. No functionality change.
-3% on ARMDissasembler.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 16:18:22 +00:00
Benjamin Kramer
c00c05f8f5 Clear the new cache.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 15:19:55 +00:00
Benjamin Kramer
feb9b4bc3b Add a "seen blocks" cache to LVI to avoid a linear scan over the whole cache just to remove no blocks from the maps.
-15% on ARMDisassembler.cpp (Release build).  It's not that great to add another
layer of caching to the caching-heavy LVI but I don't see a better way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 15:16:45 +00:00
Sanjoy Das
199ce33b3b Check for stack space more intelligently.
libgcc sets the stack limit field in TCB to 256 bytes above the actual
allocated stack limit.  This means if the function's stack frame needs
less than 256 bytes, we can just compare the stack pointer with the
stack limit.  This should result in lesser calls to __morestack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 09:32:07 +00:00
Sanjoy Das
40f8222e1e Fix a bug in the x86-32 code generated for segmented stacks.
Currently LLVM pads the call to __morestack with a add and sub of 8
bytes to esp.  This isn't correct since __morestack expects the call
to be followed directly by a ret.

This commit also adjusts the relevant test-case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145765 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 09:21:07 +00:00
Nick Lewycky
3604924799 Creating multiple JITs on X86 in multiple threads causes multiple writes (of
the same value) to this variable. This code could be refactored, but it doesn't
matter since the old JIT is going away. Add tsan annotations to ignore the
race.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 02:45:50 +00:00
Chad Rosier
9eff1e33f6 [arm-fast-isel] Unaligned stores of floats require special care.
rdar://10510150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145742 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 02:21:57 +00:00
Pete Cooper
de2e27cc52 Fixed deadstoreelimination bug where negative indices were incorrectly causing the optimisation to occur
Turns out long long + unsigned long long is unsigned.  Doh!

Fixes http://llvm.org/bugs/show_bug.cgi?id=11455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145731 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 00:04:30 +00:00
Chad Rosier
24fbf2bf16 Add support for constant folding the pow intrinsic.
rdar://10514247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-03 00:00:03 +00:00
Jim Grosbach
587f5062b9 ARM NEON VEXT aliases for data type suffices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 23:34:39 +00:00
Jim Grosbach
e40ab244c1 ARM VEXT tighten up operand classes a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 22:57:57 +00:00
Jim Grosbach
84defb51ca ARM VST1 single lane assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145718 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 22:34:51 +00:00
Nick Lewycky
8a8d479214 Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.


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2011-12-02 22:16:29 +00:00
Jim Grosbach
872eedbb3a ARM VLD1 single lane assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 22:01:52 +00:00
Jim Grosbach
204aa64f30 ARM encoder method needs the physical register number, not the enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 22:01:25 +00:00
Chad Rosier
b74c865841 [arm-fast-isel] After promoting a function parameter be sure to update the
argument value type.  Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 20:25:18 +00:00
Jim Grosbach
dad2f8e7fb Clean up aliases for ARM VLD1 single-lane assembly parsing a bit.
Add the 16-bit lane variants while I'm at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 18:52:30 +00:00
Benjamin Kramer
30fe1ae20d Fix quadratic behavior in InlineFunction by fetching the personality function of the callee once and not for every invoke in the caller.
The callee is usually smaller than the caller, too. This reduces the compile
time of ARMDisassembler.cpp by 32% (Release build). It still takes ages to
compile though.

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2011-12-02 18:37:31 +00:00
Jim Grosbach
94f2dc90a5 Check for error after InstantiateMultclassDef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 18:33:03 +00:00
Jan Sjödin
ce25d26b40 Add XOP feature flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 15:14:37 +00:00
Craig Topper
f8363305eb Reduce duplicate code in isHorizontalBinOp and add some asserts to protect assumptions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145681 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 08:18:41 +00:00
Craig Topper
138a5c66b9 Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145680 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 07:16:01 +00:00
Hal Finkel
826941a0af remove unneeded FIXME comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:17 +00:00
Hal Finkel
db809e0eb7 make sure ScheduleDAGInstrs::EmitSchedule does not crash when the first instruction in Sequence is a Noop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:07 +00:00
Hal Finkel
64c34e2535 update PPC 940 hazard rec. to function in postRA mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 04:58:02 +00:00
Chad Rosier
aab8e28d5e Fix a few more places where TargetData/TargetLibraryInfo is not being passed.
Add FIXMEs to places that are non-trivial to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 01:26:24 +00:00
Jim Grosbach
7636bf6530 ARM start parsing VLD1 single lane instructions.
The alias pseudos need cleaned up for size suffix handling, but this gets
the basics working. Will be cleaning up and adding more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02 00:35:16 +00:00
Chad Rosier
21646e8bec Abuse of mass replace isn't warranted even when the build is failing. Thanks
for the suggestion, Eric.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 23:16:03 +00:00
Chad Rosier
ca3043101f Fix build by not assuming TLI is guaranteed. Will have to track down cases where
TLI isn't being passed to ensure we don't miss opportunities to fold calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 22:38:31 +00:00
Chad Rosier
aebc3aae3f Prevent library calls from being folded if -fno-builtin has been specified.
rdar://10500969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 22:14:50 +00:00
Dylan Noblesmith
fe0926d773 CodeGen: fix CMake build
Missing file from r145629.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:49:23 +00:00
Dylan Noblesmith
d95e67dac0 ExecutionEngine: honor optimization level
It was getting ignored after r144788.

Also fix an accidental implicit cast from the OptLevel enum
to an optional bool argument. MSVC warned on this, but gcc
didn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:49:21 +00:00
Chad Rosier
00737bdb48 Last bit of TargetLibraryInfo propagation. Also fixed a case for TargetData
where it appeared beneficial to pass.
More of rdar://10500969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:29:16 +00:00
Anshuman Dasgupta
dc81e5da27 Add a deterministic finite automaton based packetizer for VLIW architectures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 21:10:21 +00:00
David Blaikie
18c7ec1344 Fix unreachable return & simplify some branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 20:58:30 +00:00
Sanjoy Das
fc9261279a Dummy commit to check commit access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 19:15:08 +00:00
Pete Cooper
165695d261 Improved fix for abs(val) != 0 to check other similar case. Also fixed style issues and confusing comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 19:13:26 +00:00
Kostya Serebryany
cc1d856d8e [asan] two minor fixes: use UnreachableInst after the neverreturn function call; use report_fatal_error when blacklist file can not be found
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 18:54:53 +00:00
Chad Rosier
fbd828d8e1 Add missing functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 18:26:19 +00:00
Benjamin Kramer
618f89f22a Autodetect bulldozers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 18:24:17 +00:00
Chad Rosier
32b6c59ad0 Add a few more functions to TargetLibraryInfo. More of rdar://10500969.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145596 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 17:54:37 +00:00
Eric Christopher
7d5a61e975 For 64-bit the rest of the general regs are ok for the q constraint. Make
sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 08:12:41 +00:00
David Blaikie
0becc96b24 Add some missing anchors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 08:00:17 +00:00
Eli Friedman
522fb8cc01 Pass AVX vectors which are arguments to varargs functions on the stack. <rdar://problem/10463281>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145573 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 04:49:21 +00:00
Pete Cooper
65a6b57c33 Added instcombine pattern to spot comparing -val or val against 0.
(val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0"

Fixes <rdar://problem/10482509>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145563 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 03:58:40 +00:00
Chad Rosier
618c1dbd29 Propagate TargetLibraryInfo throughout ConstantFolding.cpp and
InstructionSimplify.cpp.  Other fixups as needed.
Part of rdar://10500969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 03:08:23 +00:00
Nick Lewycky
66d004ef70 Make use of "getScalarType()". No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 02:39:36 +00:00
Eli Friedman
32e698cc10 Small fix for assembler generation on Darwin PPC64. Patch by Michael Kostylev. PR11437.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01 01:43:47 +00:00
Kostya Serebryany
af65a8c54b make asan work at -O0, llvm part. Patch by glider@google.com
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 22:19:26 +00:00
Jan Sjödin
dd649e35e5 Support for encoding all FMA4 instructions and tablegen patterns for all
remaining FMA4 instructions and intrinsics with tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 22:09:42 +00:00
Eli Friedman
3dad610aaa Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
<rdar://problem/10497732>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 21:54:15 +00:00
Matt Beaumont-Gay
7b8e121520 Remove unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 19:53:11 +00:00
Jim Grosbach
096334e25e ARM parsing for VLD1 all lanes, with writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 19:35:44 +00:00
Chad Rosier
8ff4115ef0 Add a few functions to TargetLibraryInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 19:19:00 +00:00
Jim Grosbach
13af222bab ARM parsing for VLD1 two register all lanes, no writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 18:21:25 +00:00
Benjamin Kramer
5f794df76e X86: Turns out bulldozer also supports sse42 and lzcnt.
While at it remove the barcelona/instanbul/shanghai subtargets, they're
unsupported by GCC and look pretty broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 15:48:16 +00:00
Benjamin Kramer
2a6cf70650 X86: Add subtargets for AMD's bulldozer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 15:27:46 +00:00
Nadav Rotem
18197d7425 X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 10:13:37 +00:00
Craig Topper
b72039cf52 Add instruction selection support for AVX2 horizontal add/sub instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 09:10:50 +00:00
Craig Topper
ec24e61ab0 Merge VPERM2F128/VPERM2I128 ISD node types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 07:47:51 +00:00
Craig Topper
316cd2a2c5 Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 06:25:25 +00:00
Andrew Trick
553fe05f23 LSR: handle the expansion of phi operands that use postinc forms of the IV.
Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 06:07:54 +00:00
Chad Rosier
caebb1e00b Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 01:59:59 +00:00
Chad Rosier
683e47b1dd Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functional
change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 01:51:49 +00:00
Jim Grosbach
98b05a57b6 ARM parsing aliases for VLD1 single register all lanes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30 01:09:44 +00:00
Chad Rosier
3d925d24e8 Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable
(fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is 
specified.
rdar://10466410

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2011-11-29 23:57:10 +00:00
Jim Grosbach
6029b6ddaf Tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 23:51:09 +00:00
Jim Grosbach
bd1cff5b2c Add comment.
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2011-11-29 23:33:40 +00:00
Jim Grosbach
1ec7bf0c0d ARM parsing aliases for data-size suffices on VST1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 23:21:31 +00:00
Akira Hatanaka
ed2a7d2780 Change names for MIPS "generic" processors defined in Mips.td to match what GNU
tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"



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2011-11-29 23:08:41 +00:00
Jim Grosbach
4c7edb3ad8 ARM assembly parsing and encoding for four-register VST1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 22:58:48 +00:00
Evan Cheng
a3438cf48b Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 22:48:34 +00:00
Jim Grosbach
d5ca201891 ARM assembly parsing and encoding for three-register VST1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 22:38:04 +00:00
Jakob Stoklund Olesen
0edd83bfff Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.

This also makes the AVX variants redundant.

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2011-11-29 22:27:25 +00:00
Stepan Dyatkovskiy
be4c844648 Potential bug in RewriteLoopBodyWithConditionConstant: use iterator should not be changed inside the uses enumeration loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 20:34:39 +00:00
Chad Rosier
ae6f2cb1fc If fast-isel fails, remove dead instructions generated during the failed
attempt.  

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2011-11-29 19:40:47 +00:00
Andrew Trick
7d8867d453 comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 19:33:49 +00:00
Daniel Dunbar
d782bae970 build/CMake: Finish removal of add_llvm_library_dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 19:25:30 +00:00
Duncan Sands
d3a38ccfbb Fix a theoretical problem (not seen in the wild): if different instances of a
weak variable are compiled by different compilers, such as GCC and LLVM, while
LLVM may increase the alignment to the preferred alignment there is no reason to
think that GCC will use anything more than the ABI alignment.  Since it is the
GCC version that might end up in the final program (as the linkage is weak), it
is wrong to increase the alignment of loads from the global up to the preferred
alignment as the alignment might only be the ABI alignment.

Increasing alignment up to the ABI alignment might be OK, but I'm not totally
convinced that it is.  It seems better to just leave the alignment of weak
globals alone.


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2011-11-29 18:26:38 +00:00
Michael J. Spencer
116bc795da MC/X86/COFF: Allow quotes in names when targeting MS/Windows,
as MC is the only assembler we support.

This splits MS/Windows and GNU/Windows ASM infos into two seperate classes.
While there is currently only one difference, full MS C++ ABI support will
require many more.

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2011-11-29 18:00:06 +00:00
Danil Malyshev
b0436a7305 Fixed ObjectFile functions:
- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 17:40:10 +00:00
Elena Demikhovsky
f68b214e2d Fixed vsqrt.ss intrinsic usage - order of input operands was wrong.
Added a test.
Thanks Bruno for reviewing the patch.



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2011-11-29 15:00:45 +00:00
Craig Topper
f267972d28 Fix shuffle decoding for memory forms for (V)SHUFPS/D.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145392 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 07:58:09 +00:00
Craig Topper
36e36ace77 Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decoding for VSHUFPS/D for 256-bit types. Add pattern matching for memory forms of VPERMILPS/VPERMILPD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 07:49:05 +00:00
NAKAMURA Takumi
5d2f8c3155 [Win32] Catch exceptions (eg. segfault) on waiting for invoked clang from the driver.
clang/lib/Driver/Driver.cpp: Don't pass through negative exit status, or parent would be confused.

llvm::sys::Program::Wait(): Suppose 0x8000XXXX and 0xC000XXXX as abnormal exit code and pass it as negative value.

Win32 Exception Handler: Exit with ExceptionCode on an unhandle exception.

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2011-11-29 07:47:04 +00:00
Craig Topper
fe2a6c584a Fix VINSERTF128/VEXTRACTF128 to be marked as FP instructions. Allow execution dependency fix pass to convert them to their integer equivalents when AVX2 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 05:37:58 +00:00
Craig Topper
108126cfc6 Correctly mark VPERM2F128 as being an FP instruction and add execution domain fixing support to convert it to VPERM2I128 for AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 03:57:34 +00:00
Bill Wendling
6ea0467c3d MachO doesn't support the protected visibility. Don't default to 'global' here. <rdar://problem/10396775>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 02:39:58 +00:00
Andrew Trick
ecb35ece5c SCEV fix. In general, Add/Mul expressions should not inherit NSW/NUW.
This reverts r139450, fixes r139453, and adds much needed comments and a
unit test.


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2011-11-29 02:16:38 +00:00
Andrew Trick
121d78f7e7 Make SCEV print <nsw><nuw> for Add/MulExpr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 02:06:35 +00:00
Bill Wendling
d7c2494b3c On MachO, the pointer to the personality function should always be in the
non_lazy_symbol_pointers section (__IMPORT,__pointers). Ignore the 'hidden' part
since that will place it in the wrong section.
<rdar://problem/10443720>


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2011-11-29 01:43:20 +00:00
Eli Friedman
ba78c883d4 Zap some completely ridiculous code. There's probably a miscompile here, but I don't really want to try to write a testcase involving an invoke returning a pointer to a varargs function...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145347 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 01:18:23 +00:00
Jim Grosbach
6200611dff Better fix for ARM MOVT relocation encoding of thumb bit.
Replaces r145318 with a more targetted fix for the relocation handling.

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2011-11-29 01:15:25 +00:00
Daniel Dunbar
4d36f6ab11 build: Update CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 00:33:14 +00:00
Daniel Dunbar
5a939956b8 edis: Sink EDMain.cpp into lib/MC/MCDisassembler.
- This fixes some layering violations and matches how we handle the llvm-c lib,
   for example.

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2011-11-29 00:25:57 +00:00
Jim Grosbach
958da85b93 Thumb2 only force the fixup thumb bit for data relocations.
rdar://10493453

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2011-11-28 23:39:00 +00:00
Eli Friedman
54b92113e2 Add a missing safety check to ProcessUGT_ADDCST_ADD. Fixes PR11438.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 23:32:19 +00:00
Jim Grosbach
4544da484d Remove obsolete FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 23:23:58 +00:00
Eli Friedman
c4c2a02485 Make SelectionDAG::InferPtrAlignment use llvm::ComputeMaskedBits instead of duplicating the logic for globals. Make llvm::ComputeMaskedBits handle GlobalVariables slightly more aggressively, to match what InferPtrAlignment knew how to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145304 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 22:48:22 +00:00
Evan Cheng
ed1c0c7f58 Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead.
Conservatively returns zero when the GV does not specify an alignment nor is it
initialized. Previously it returns ABI alignment for type of the GV. However, if
the type is a "packed" type, then the under-specified alignments is attached to
the load / store instructions. In that case, the alignment of the type cannot be
trusted.
rdar://10464621


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2011-11-28 22:37:34 +00:00
Daniel Dunbar
a483fc8e6f Fix some possible gcc-4.2 may be used uninitialized warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 22:19:32 +00:00
Nick Lewycky
a3980cccf7 Don't define these unless we plan to use them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145289 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 22:14:02 +00:00
Evan Cheng
1c487869f5 DAG combine should not increase alignment of loads / stores with alignment less
than ABI alignment. These are loads / stores from / to "packed" data structures.
Their alignments are intentionally under-specified.

rdar://10301431


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2011-11-28 20:42:56 +00:00
Evan Cheng
678cda052c Add missing avx pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 20:27:23 +00:00
Chad Rosier
aa5656c6b9 80-column.
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2011-11-28 19:59:09 +00:00
Bill Wendling
c80383095e Remove dead llvm.eh.sjlj.dispatchsetup intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145263 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 19:23:13 +00:00
Andrew Trick
ed38f1ca2e Remove the temporary flag -disable-unroll-scev and dead code.
SCEV should now be used for trip count analysis, not LoopInfo.


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2011-11-28 19:22:09 +00:00
Eli Friedman
f9b1cd0c7f Add back a line I deleted by accident in r145141. Fixes uninitialized variable warnings and runtime failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145256 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 18:50:37 +00:00
Duncan Sands
4c0c5451c7 Silence wrong warnings from GCC about variables possibly being used
uninitialized: GCC doesn't understand that the variables are only used
if !UseImm, in which case they have been initialized.


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2011-11-28 10:31:27 +00:00
Craig Topper
70b883b3a7 Add X86 instruction selection for VPERM2I128 when AVX2 is enabled. Merge VPERMILPS/VPERMILPD detection since they are pretty similar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 10:14:51 +00:00
Craig Topper
71c4c12232 Make isCommutedVSHUFP more like the way isCommutedSHUFP is handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145218 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 01:14:24 +00:00
Dylan Noblesmith
08b73a30bb rename ENABLE_THREADS to LLVM_ENABLE_THREADS
Now that it needs to be exported in a public header (Valgrind.h)
it should be prefixed to avoid collision with other projects.
Add it to llvm-config.h as well.

This'll require regenerating the configure script after this
commit, but I don't have the required autoconf version.

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2011-11-28 00:48:58 +00:00
Nick Lewycky
bba40db072 Place the "cfg checksum" around a test. This was recently added in April 2011 to
gcc, though I thought it was older (my gcc 4.4 has it as a local patch. Whoops!)
This fixes PR10589.

Also add some debugging statements.

Remove GcnoFiles, the mapping from CompilationUnit to raw_ostream. Now that we
start by iterating over each CU and descending into them, there's no need to
maintain a mapping.


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2011-11-27 23:22:20 +00:00
Craig Topper
9d7025b56b Merge detecting and handling for VSHUFPSY and VSHUFPDY since a lot of the code was similar for both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 21:41:12 +00:00
Chandler Carruth
51901d85f7 Prevent rotating the blocks of a loop (and thus getting a backedge to be
fallthrough) in cases where we might fail to rotate an exit to an outer
loop onto the end of the loop chain.

Having *some* rotation, but not performing this rotation, is the primary
fix of thep performance regression with -enable-block-placement for
Olden/em3d (a whopping 30% regression). Still working on reducing the
test case that actually exercises this and the new rotation strategy out
of this code, but I want to check if this regresses other test cases
first as that may indicate it isn't the correct fix.

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2011-11-27 20:18:00 +00:00
Chandler Carruth
fac1305da1 Take two on rotating the block ordering of loops. My previous attempt
was centered around the premise of laying out a loop in a chain, and
then rotating that chain. This is good for preserving contiguous layout,
but bad for actually making sane rotations. In order to keep it safe,
I had to essentially make it impossible to rotate deeply nested loops.
The information needed to correctly reason about a deeply nested loop is
actually available -- *before* we layout the loop. We know the inner
loops are already fused into chains, etc. We lose information the moment
we actually lay out the loop.

The solution was the other alternative for this algorithm I discussed
with Benjamin and some others: rather than rotating the loop
after-the-fact, try to pick a profitable starting block for the loop's
layout, and then use our existing layout logic. I was worried about the
complexity of this "pick" step, but it turns out such complexity is
needed to handle all the important cases I keep teasing out of benchmarks.

This is, I'm afraid, a bit of a work-in-progress. It is still
misbehaving on some likely important cases I'm investigating in Olden.
It also isn't really tested. I'm going to try to craft some interesting
nested-loop test cases, but it's likely to be extremely time consuming
and I don't want to go there until I'm sure I'm testing the correct
behavior. Sadly I can't come up with a way of getting simple, fine
grained test cases for this logic. We need complex loop structures to
even trigger much of it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 13:34:33 +00:00
Chandler Carruth
790552c20f Revert r145180 as it is causing test failures on all the bots.
Original commit message:
Fixed ObjectFile functions:
- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 10:37:47 +00:00
Chandler Carruth
7096692fd9 Fix an impressive type-o / spell-o Duncan noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 10:32:16 +00:00
Danil Malyshev
9b24738bd1 Fixed ObjectFile functions:
- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145180 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 10:12:52 +00:00
Chandler Carruth
2eb5a744b1 Rework a bit of the implementation of loop block rotation to not rely so
heavily on AnalyzeBranch. That routine doesn't behave as we want given
that rotation occurs mid-way through re-ordering the function. Instead
merely check that there are not unanalyzable branching constructs
present, and then reason about the CFG via successor lists. This
actually simplifies my mental model for all of this as well.

The concrete result is that we now will rotate more loop chains. I've
added a test case from Olden highlighting the effect. There is still
a bit more to do here though in order to regain all of the performance
in Olden.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 09:22:53 +00:00
Chris Lattner
b5dd9de724 Eli managed to kill off llvm.membarrier in llvm 3.0 also, this means
that mainline needs no autoupgrade logic for intrinsics yet, woohoo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 08:42:07 +00:00
Chris Lattner
875882a184 The llvm.atomic intrinsics *were* removed in LLVM 3.0 (in r141333), remove the
autoupgrade logic for 2.9 and before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 08:18:55 +00:00
Chris Lattner
3211c6e31b remove autoupgrade support for old forms of llvm.prefetch and the old
trampoline forms.  Both of these were correct in LLVM 3.0, and we don't
need to support LLVM 2.9 and earlier in mainline.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 07:42:04 +00:00