138479 Commits

Author SHA1 Message Date
Matt Arsenault
8bc95d0a47 AMDGPU: Improve splitting 64-bit bit ops by constants
This addresses a TODO to handle operations besides and. This
also starts eliminating no-op operations with a constant that
can emerge later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281488 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 15:19:03 +00:00
Matthew Simpson
be3fec6cf2 [LV] Process pointer IVs with PHINodes in collectLoopUniforms
This patch moves the processing of pointer induction variables in
collectLoopUniforms from the consecutive pointer phase of the analysis to the
phi node phase. Previously, if a pointer induction variable was used by both a
scalarized non-memory instruction as well as a vectorized memory instruction,
we would incorrectly identify the pointer as uniform. Pointer induction
variables should be treated the same as other phi nodes. That is, they are
uniform if all users of the induction variable and induction variable update
are uniform.

Differential Revision: https://reviews.llvm.org/D24511

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281485 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:47:40 +00:00
James Molloy
b50cea7150 [ARM] Promote small global constants to constant pools
If a constant is unamed_addr and is only used within one function, we can save
on the code size and runtime cost of an indirection by changing the global's storage
to inside the constant pool. For example, instead of:

      ldr r0, .CPI0
      bl printf
      bx lr
    .CPI0: &format_string
    format_string: .asciz "hello, world!\n"

We can emit:

      adr r0, .CPI0
      bl printf
      bx lr
    .CPI0: .asciz "hello, world!\n"

This can cause significant code size savings when many small strings are used in one
function (4 bytes per string).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281484 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:47:27 +00:00
Sjoerd Meijer
2ecc1fc02a MCInstrDesc: this fixes an issue setting/getting member Flags, which
is an uint64_t. However, getter function getFlags returned an unsigned,
and in function hasProperty (1 << MCFlag) was used instead of (1ULL << MCFlag).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281483 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:32:17 +00:00
Simon Pilgrim
3824319ab4 [X86][SSE] Removed unused getTargetShuffleNode function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281481 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:30:00 +00:00
Simon Pilgrim
1c820899c7 [X86] Added i128 lshr+shl -> mask combine test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281480 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:29:16 +00:00
Nemanja Ivanovic
7328eb7558 Fix code-gen crash on Power9 for insert_vector_elt with variable index (PR30189)
This patch corresponds to review:
https://reviews.llvm.org/D24021

In the initial implementation of this instruction, I forgot to account for
variable indices. This patch fixes PR30189 and should probably be merged into
3.9.1 (I'll open a bug according to the new instructions).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281479 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:19:09 +00:00
Andrea Di Biagio
707666e59d [InstCombine] Merged two test files and regenerated checks using update_test_checks.py. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281478 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:18:21 +00:00
Silviu Baranga
f64fd3777c [StackProtector] Use INITIALIZE_TM_PASS instead of INITIALIZE_PASS
in order to make sure that its TargetMachine constructor is
registered.

This allows us to run the PEI machine pass with MIR input
(see PR30324).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281474 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:09:43 +00:00
Nemanja Ivanovic
3477191193 Adding missing directive for Power9.
There is currently no codegen for Power9 that depends on the directive
so this is NFC for now but will be important in the future. This was
missed in r268950 so I'm adding it now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281473 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:09:39 +00:00
Simon Pilgrim
9320a1273e [X86][SSE] Don't blend vector shifts with MOVSS/MOVSD directly, lower from generic shuffle
Shuffle lowering will correctly lower to MOVSS/MOVSD/PBLEND, improving commutation opportunities

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281471 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:08:18 +00:00
Kuba Brecka
62660f0e5a [asan] Enable -asan-use-private-alias on Darwin/Mach-O, add test for ODR false positive with LTO (llvm part)
The '-asan-use-private-alias’ option (disabled by default) option is currently only enabled for Linux and ELF, but it also works on Darwin and Mach-O. This option also fixes a known problem with LTO on Darwin (https://github.com/google/sanitizers/issues/647). This patch enables the support for Darwin (but still keeps it off by default) and adds the LTO test case.

Differential Revision: https://reviews.llvm.org/D24292



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281470 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 14:06:33 +00:00
James Molloy
9502e5be6f Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"
This reverts commit r281323. It caused chromium test failures and a selfhost failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281451 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 09:45:28 +00:00
Vassil Vassilev
76c5395c55 Missing includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281450 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 08:55:18 +00:00
Tim Northover
d40a5626fc GlobalISel: mark pointer stores as legal on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281448 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 08:28:54 +00:00
Sjoerd Meijer
82d457bf36 This reapplies r281304. The issue was that I had missed
to copy the new isAdd field in the tablegen data structure.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281447 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 08:20:03 +00:00
Elena Demikhovsky
ad1b22c748 AVX-512: Fixed a bug in kortest.z intrinsic
Lowering was wrong - X86ISD::SETCC node should return i8 type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281446 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 08:06:54 +00:00
Igor Breger
3ef99c9f83 [AVX512BW] Change truncStore action (v16i16->v16i18). It can be legal only with AVX512VL.
Differential Revision: http://reviews.llvm.org/D24547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281445 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 08:04:28 +00:00
Craig Topper
cb2901c00a [X86] Remove the VCVTSI2SD32 with rounding intrinsic. It's not used by clang and not needed since 32-bit integer to double is always exact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281442 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 06:27:46 +00:00
Wei Mi
81a2b8958e Create a getelementptr instead of sub expr for ValueOffsetPair if the
value is a pointer.

This patch is to fix PR30213. When expanding an expr based on ValueOffsetPair,
if the value is of pointer type, we can only create a getelementptr instead
of sub expr.

Differential Revision: https://reviews.llvm.org/D24088


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281439 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 04:39:50 +00:00
Tobias Grosser
e6c628ff62 Ensure Polly linking works without BUILD_SHARED_LIBS
This change ensures all necessary symbols are resolved correctly. Before this
change on some systems, the linker may have eliminated some symbols not directly
used in bugpoint, but used in Polly.

Suggested-by: Michael Kruse <lvm@meinersbur.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281438 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 03:09:48 +00:00
Peter Collingbourne
6f025c10c1 gold: Simplify. Do not unnecessarily enumerate Obj's symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281437 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 02:55:16 +00:00
Kostya Serebryany
a4826c1b99 [libFuzzer] start using trace-pc-guard as an alternative source of coverage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281435 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 02:13:06 +00:00
Kostya Serebryany
8ea4234809 [sanitizer-coverage] add yet another flavour of coverage instrumentation: trace-pc-guard. The intent is to eventually replace all of {bool coverage, 8bit-counters, trace-pc} with just this one. LLVM part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281431 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 01:39:35 +00:00
Akira Hatanaka
3cb3e3cdbc Address Pete's review comment and define OrigArg on its own line.
This is a follow-up to r281419.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281421 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 23:53:43 +00:00
Akira Hatanaka
90a2aecbed [ObjCARC] Traverse chain downwards to replace uses of argument passed to
ObjC library call with call return.

ARC contraction tries to replace uses of an argument passed to an
objective-c library call with the call return value. For example, in the
following IR, it replaces uses of argument %9 and uses of the values
discovered traversing the chain upwards (%7 and %8) with the call return
%10, if they are dominated by the call to @objc_autoreleaseReturnValue.
This transformation enables code-gen to tail-call the call to
@objc_autoreleaseReturnValue, which is necessary to enable auto release
return value optimization.

%7 = tail call i8* @objc_loadWeakRetained(i8** %6)
%8 = bitcast i8* %7 to %0*
%9 = bitcast %0* %8 to i8*
%10 = tail call i8* @objc_autoreleaseReturnValue(i8* %9)
ret %0* %8

Since r276727, llvm started removing redundant bitcasts and as a result
started feeding the following IR to ARC contraction:

%7 = tail call i8* @objc_loadWeakRetained(i8** %6)
%8 = bitcast i8* %7 to %0*
%9 = tail call i8* @objc_autoreleaseReturnValue(i8* %7)
ret %0* %8

ARC contraction no longer does the optimization described above since it
only traverses the chain upwards and fails to recognize that the
function return can be replaced by the call return. This commit changes
ARC contraction to traverse the chain downwards too and replace uses of
bitcasts with the call return.

rdar://problem/28011339

Differential Revision: https://reviews.llvm.org/D24523


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 23:43:11 +00:00
Vedant Kumar
e7f7e18127 [llvm-cov] Just emit the version number in the index file
Having the version information in every view is distracting, especially
if there are several sub-views.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281414 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 23:00:13 +00:00
Ahmed Bougacha
d78e4210b3 [AArch64] Simplify patchpoint/stackmap size test (r281301). NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281407 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 22:16:40 +00:00
Pawel Bylica
c3d0d3568a [CodeGen] Fix invalid shift in mul expansion
Summary: When expanding mul in type legalization make sure the type for shift amount can actually fit the value. This fixes PR30354 https://llvm.org/bugs/show_bug.cgi?id=30354.

Reviewers: hfinkel, majnemer, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D24478

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281403 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:55:41 +00:00
Michael Kuperstein
3389341950 [DAG] Allow build-to-shuffle combine to combine builds from two wide vectors.
This allows us to, in some cases, create a vector_shuffle out of a build_vector, when
the inputs to the build are extract_elements from two different vectors, at least one
of which is wider than the output. (E.g. a <8 x i16> being constructed out of
elements from a <16 x i16> and a <8 x i16>).

Differential Revision: https://reviews.llvm.org/D24491


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281402 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:53:32 +00:00
Kevin Enderby
7402add75d Next set of additional error checks for invalid Mach-O files for bad load commands
that use the Mach::dyld_info_command type for the load commands that are
currently use in the MachOObjectFile constructor.

This contains the missing checks for LC_DYLD_INFO and
LC_DYLD_INFO_ONLY load commands and the fields for the
Mach::dyld_info_command type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281400 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:42:28 +00:00
Krzysztof Parzyszek
60fc58a44d [Hexagon] Better handling of HVX vector lowering
- Expand SELECT_CC and BR_CC for vector types.
- Implement TLI::isShuffleMaskLegal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281397 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 21:16:07 +00:00
Sanjay Patel
9f45ab58fc add tests for PR28672
I'm not sure if we actually want to transform all of these in InstCombine yet, 
so I'm not labeling these with FIXME.  


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281386 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 20:36:13 +00:00
Matt Arsenault
9e6badc7e1 Reapply "InstCombine: Reduce trunc (shl x, K) width."
This reapplies r272987 with a fix for infinitely looping
when the truncated value is another shift of a constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281379 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:43:57 +00:00
Matthias Braun
f461e09200 AArch64: Cleanup tailcall CC check, enable swiftcc.
Cleanup/change the code that checks for possible tailcall conventions to
look the same as the one in the X86 target. This makes the distinction
between calling conventions that can guarnatee tailcalls and the ones
that may tailcall more obvious.

- Add Swift to the mayTailCall list
- PreserveMost seemed to be incorrectly part of the guarnteed tail call
  list, move it to the mayTailCall list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281376 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:27:38 +00:00
Matt Arsenault
1defb8fb49 AMDGPU: Remove code I think is dead
As far as I can tell, resolveFrameIndex is supposed to be
called with a legal offset, so inserting an add shouldn't be
necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281372 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:15:25 +00:00
Mike Aizatsky
a3d7c710d2 .clang-tidy: correct style name is 'camelBack' not 'lowerCase'.
Summary: clang-tidy doesn't like to complain.

Differential Revision: https://reviews.llvm.org/D24413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281370 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:04:26 +00:00
Matt Arsenault
ec4f2a0c81 AMDGPU: Support commuting a FrameIndex operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281369 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:03:12 +00:00
Matthew Simpson
470b8e4d54 [LV] Clean up uniform induction variable analysis (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281368 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 19:01:45 +00:00
Davide Italiano
9330005ad6 [LTO] Don't pass SF_Undefined symbols to the IRmover.
This should fix PR 30363.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281366 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:45:13 +00:00
Reid Kleckner
f5f2db2791 Fix MSVC 2013 build by using our <thread> wrapper header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281365 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:40:04 +00:00
Simon Pilgrim
8288ccf5dc [DAGCombiner] Use APInt directly in (shl (zext (srl x, C)), C) combine range test
To avoid assertion, we must ensure that the inner shift constant is within range before calling ConstantSDNode::getZExtValue(). We already know that the outer shift constant is in range.

Followup to D23007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281362 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:33:29 +00:00
Nico Weber
9a0a97cb90 Revert r281336 (and r281337), it caused PR30372.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281361 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 18:17:00 +00:00
Douglas Katzman
e353f57fa4 [Myriad]: set LeonCASA processor feature
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281359 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 17:51:41 +00:00
Simon Pilgrim
76b613fc08 [X86][SSE] Added AVX512F and additional vector truncate test cases
trunc16i16_16i8 is currently commented out due to PR25684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281356 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 17:34:56 +00:00
Simon Pilgrim
45e3537596 [DAGCombiner] Use APInt directly in (shl (ext (shl x, c1)), c2) combine
Fix failure to detect out of range shift constants leading to assert in ConstantSDNode::getZExtValue()

Followup to D23007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281354 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 17:15:28 +00:00
Matt Arsenault
21409dbcdc Fix misleading comment for getOrEnforceKnownAlignment
It does not return 0 to indicate failure, and returns the known
alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281350 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 16:39:43 +00:00
Andrea Di Biagio
d9dffbdd6a [ConstantFold] Improve the bitcast folding logic for constant vectors.
The constant folder didn't know how to always fold bitcasts of constant integer
vectors. In particular, it was unable to handle the case where a constant vector
had some undef elements, and the resulting (i.e. bitcasted) vector type had more
elements than the original vector type.

Example:
  %cast = bitcast <2 x i64><i64 undef, i64 2> to <4 x i32>

On a little endian target, %cast could have been folded to:
  <4 x i32><i32 undef, i32 undef, i32 2, i32 0>

This patch improves the folding logic by teaching how to correctly propagate
undef elements in the folded vector.

Differential Revision: https://reviews.llvm.org/D24301


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281343 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:50:47 +00:00
Simon Pilgrim
7724253460 [X86] Regenerated shift combine tests.
Added x86_64 tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281341 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:41:39 +00:00
Vassil Vassilev
befcbd18bd [modules] Re-enable some previously excluded files.
Our modules support seems to be able to handle them nowadays.

Patch by Cristina Cristescu!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281340 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:41:35 +00:00