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af0e272683
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7978 Commits

Author SHA1 Message Date
Devang Patel
af0e272683 Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83363 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 02:19:11 +00:00
Devang Patel
89703cf838 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83362 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 02:01:32 +00:00
Devang Patel
0d20ac8d17 Add utility routine to set begin and end labels for DbgScopes. 
This will be used by processDebugLoc().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83361 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 01:50:42 +00:00
Devang Patel
b39566d719 Remove unintentional function decl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83356 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 01:31:35 +00:00
Devang Patel
e717faa467 Add utility routine to collect variable debug info. This is not yet used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83355 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 01:26:37 +00:00
Devang Patel
454e957979 Set default location for the function if it is not already set. 
This code is not  yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83349 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 00:09:08 +00:00
Devang Patel
6f3dc920b0 Existence of a compile unit for input source file is a good indicator to check debug info's presence in a module. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83348 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 00:03:14 +00:00
Devang Patel
ffd9c3dd4a If subprogram die is not available then construct new one. 
This can happen if debug info is processed lazily.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83347 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 23:59:00 +00:00
Devang Patel
fd07cf56cd Adjust context for the global variables that are not at file scope, e.g. 
void foo() { static int bar = 42; }
Here, foo's DIE is parent of bar's DIE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83344 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 23:40:42 +00:00
Devang Patel
b71a16d10d Set address while constructing DIE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83343 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 23:22:08 +00:00
Jim Grosbach
540b05d227 In Thumb1, the register scavenger is not always able to use an emergency 
spill slot. When frame references are via the frame pointer, they will be
negative, but Thumb1 load/store instructions only allow positive immediate
offsets. Instead, Thumb1 will spill to R12.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 22:30:23 +00:00
Devang Patel
f84548db63 Gracefully handle various scopes while recording source line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83317 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 18:03:19 +00:00
Chris Lattner
cf0fe8d813 strength reduce a ton of type equality tests to check the typeid (Through 
the new predicates I added) instead of going through a context and doing a
pointer comparison.  Besides being cheaper, this allows a smart compiler
to turn the if sequence into a switch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83297 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 05:54:46 +00:00
Chris Lattner
92bef66c10 stop MachineFunctionPass from claiming that it preserves LoopDependence info, 
which causes dependence info to be linked into lli.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83289 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-05 02:35:05 +00:00
Jakob Stoklund Olesen
b44fad7f95 Whitespace and formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83285 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-04 18:18:39 +00:00
Lang Hames
6cc91e39c0 Oops. Renamed remaining MachineInstrIndex references. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83255 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-03 04:31:31 +00:00
Lang Hames
cc3b0650f1 Renamed MachineInstrIndex to LiveIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83254 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-03 04:21:37 +00:00
Benjamin Kramer
8bff4af612 Fix a use-after-free in post-ra-scheduling. 
MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-02 15:59:52 +00:00
David Goodwin
63bcbb72f7 All callee-saved registers are live-out of a return block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83223 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 23:28:47 +00:00
David Goodwin
9843a93e83 Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 22:19:57 +00:00
David Goodwin
471850ab84 Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 21:46:35 +00:00
Devang Patel
af9e84701b Add support to extract lexical scope information from DebugLoc attached with an machine instruction. 
This is not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83210 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 20:31:14 +00:00
David Goodwin
c7951f8e09 Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83208 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 19:45:32 +00:00
Devang Patel
d38dd11e12 Record first and last instruction of a scope in DbgScope. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 18:25:23 +00:00
Evan Cheng
714e8bc1fc Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change 
operands of instructions with these properties while breaking anti-dep.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 08:26:23 +00:00
Devang Patel
a1434045c3 Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83190 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 01:15:28 +00:00
Devang Patel
75549f4444 If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83189 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-01 01:03:26 +00:00
Devang Patel
b0fdedb3fd Use MachineInstr as an processDebugLoc() argument. 
This will allow processDebugLoc() to handle scopes for DWARF debug info. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83183 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 23:12:50 +00:00
Devang Patel
3d910835fc Use MDNode * directly as an RecordSourceLine() argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83182 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 22:51:28 +00:00
Devang Patel
a63710124a Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83181 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 22:43:52 +00:00
Bob Wilson
812209a58c Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this 
to emit target-specific things at the beginning of the asm output.  This
fixes a problem for PPC, where the text sections are not being kept together
as expected.  The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives.  The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text.  With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83176 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 22:06:26 +00:00
Bob Wilson
bc9506f5ee Fix a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83171 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 21:26:13 +00:00
Reid Kleckner
3a90c9b8ed Silence comparison always false warning in -Asserts mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83164 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 20:43:07 +00:00
Jim Grosbach
32030fe021 Add additional assert() to verify no extraneous use of a scavenged register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83163 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 20:35:36 +00:00
Reid Kleckner
c277ab08a2 Fix integer overflow in instruction scheduling. This can happen if we have 
basic blocks that are so long that their size overflows a short.

Also assert that overflow does not happen in the future, as requested by Evan.

This fixes PR4401.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 20:15:38 +00:00
Evan Cheng
629adde699 Add a target hook to add pre- post-regalloc scheduling passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83144 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 08:49:50 +00:00
Jim Grosbach
366e021fb2 replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister() 
per customary usage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 01:47:59 +00:00
Jim Grosbach
0a13e566ab fix compiler warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83132 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:37:40 +00:00
Devang Patel
fdc826f6e8 Simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83123 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:14:40 +00:00
David Goodwin
0dad89fa94 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:10:16 +00:00
Mike Stump
3e4c9bdb67 Add a way for a frontend to generate more complex dwarf location 
information.  This allows arbitrary code involving DW_OP_plus_uconst
and DW_OP_deref.  The scheme allows for easy extention to include,
any, or all of the DW_OP_ opcodes.  I thought about just exposing all
of them, but, wasn't sure if people wanted the dwarf opcodes exposed
in the api.  Is that a layering violation?

With this scheme, the entire existing block scheme used by llvm-gcc
can be switched over to the new scheme.  I think that would be
cleaner, as then the compiler specific bits are not present in llvm
proper.  Before the old code can be yanked however, similar code in
clang would have to be removed.

Next up, more testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83120 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-30 00:08:22 +00:00
Jim Grosbach
a9a9c95f67 Additional check for regno==0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83103 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 20:11:10 +00:00
Devang Patel
9dddf97480 Remove unnecessary cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83100 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 19:56:13 +00:00
Devang Patel
5ccdd10b1a Remove std::string uses from DebugInfo interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83083 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 18:40:58 +00:00
Jim Grosbach
9a0b6e6ded Simplify the tracking of virtual frame index registers. Ranges cannot overlap, 
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83081 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 18:23:15 +00:00
Jim Grosbach
9ab2238df9 Moving register scavenging to a post pass results in virtual registers in 
the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83077 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-29 17:24:37 +00:00
Devang Patel
e30e678865 s/class Metadata/class MetadataContext/g 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83019 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 21:41:20 +00:00
Devang Patel
a2148402ce Do not use global typedef for MDKindID. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83016 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 21:14:55 +00:00
Jakob Stoklund Olesen
544df3651e Use KILL instead of IMPLICIT_DEF in LowerSubregs pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83007 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 20:32:46 +00:00
Dan Gohman
937d2d8624 Use VerifySchedule instead of doing the work manually. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-28 16:09:41 +00:00