34838 Commits

Author SHA1 Message Date
Matt Arsenault
788be52946 AMDGPU: Add s_sleep intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262120 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 08:53:52 +00:00
Matt Arsenault
a164276e20 AMDGPU: Implement readcyclecounter
This matches the behavior of the HSAIL clock instruction.
s_realmemtime is used if the subtarget supports it, and falls
back to s_memtime if not.

Also introduces new intrinsics for each of s_memtime / s_memrealtime.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262119 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 08:53:46 +00:00
Sean Silva
e82b9c2fec [instrprof] Use __{start,stop}_SECNAME on PS4 too.
Summary:
The PS4 linker seems to handle this fine.

Hi David, it seems that indeed most ELF linkers support
__{start,stop}_SECNAME, as our proprietary linker does as well.

This follows the pattern of r250679 w.r.t. the testing.

Maggie, Phillip, Paul: I've tested this with the PS4 SDK 3.5 toolchain
prerelease and it seems to work fine.

Reviewers: davidxl

Subscribers: probinson, phillip.power, MaggieYi

Differential Revision: http://reviews.llvm.org/D17672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262112 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 06:01:26 +00:00
Kostya Serebryany
e01ce57c55 [libFuzzer] don't emit callbacks to sanitizer run-time in -fsanitize-coverage=trace-pc mode; update libFuzzer doc for previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262110 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 05:45:12 +00:00
Chandler Carruth
32bf0088fb [LICM] Teach LICM how to handle cases where the alias set tracker was
merged into a loop that was subsequently unrolled (or otherwise nuked).

In this case it can't merge in the ASTs for any remaining nested loops,
it needs to re-add their instructions dircetly.

The fix is very isolated, but I've pulled the code for merging blocks
into the AST into a single place in the process. The only behavior
change is in the case which would have crashed before.

This fixes a crash reported by Mikael Holmen on the list after r261316
restored much of the loop pass pipelining and allowed us to actually do
this kind of nested transformation sequenc. I've taken that test case
and further reduced it into the somewhat twisty maze of loops in the
included test case. This does in fact trigger the bug even in this
reduced form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262108 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 04:34:07 +00:00
Mike Aizatsky
4470c2730c [sancov] print_coverage_points command.
Differential Revision: http://reviews.llvm.org/D17670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262104 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 02:21:44 +00:00
Reid Kleckner
07f7a28236 [InstCombine] Be more conservative about removing stackrestore
We ended up removing a save/restore pair around an inalloca call,
leading to a miscompile in Chromium.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262095 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 00:53:54 +00:00
Paul Robinson
05af933abd Revert r262092, caught LLD tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262093 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 23:44:10 +00:00
Paul Robinson
ede28b79ea [FileCheck] Abort if -NOT is combined with another suffix.
Combinations of suffixes that look useful actually are ignored;
complaining about them will avoid mistakes.

Differential Revision: http://reviews.llvm.org/D17587


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262092 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 23:34:02 +00:00
Cong Hou
e2e3f26532 Fix a bug in isVectorReductionOp() in SelectionDAGBuilder.cpp that may cause assertion failure on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262091 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 23:25:30 +00:00
Ahmed Bougacha
5811aa75cf [X86] Move an encoding test from CodeGen to MC. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262089 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 23:00:03 +00:00
Ahmed Bougacha
b1a7fb8d69 [X86] Delete old redundant test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262088 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 23:00:00 +00:00
Philip Reames
edac10e31e [LVI] Extend select handling to catch min/max/clamp idioms
Most of this is fairly straight forward. Add handling for min/max via existing matcher utility and ConstantRange routines.  Add handling for clamp by exploiting condition constraints on inputs.  

Note that I'm only handling two constant ranges at this point. It would be reasonable to consider treating overdefined as a full range if the instruction is typed as an integer, but that should be a separate change.

Differential Revision: http://reviews.llvm.org/D17184



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262085 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 22:53:59 +00:00
Kit Barton
5b4af7f722 [PPC] Legalize FNEG on PPC when possible
Currently we always expand ISD::FNEG. For v4f32 and v2f64 vector types VSX has
native support for this opcode

Phabricator: http://reviews.llvm.org/D17647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262079 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:59:44 +00:00
Sanjay Patel
41453a16f5 [x86, InstCombine] transform x86 AVX2 masked stores to LLVM intrinsics
Replicate everything for integers...because x86.

Continuation of:
http://reviews.llvm.org/rL262064



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262077 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:51:44 +00:00
Paul Robinson
46e8be6d8d Reapply r262054 with triple fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262069 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:18:34 +00:00
Kit Barton
2178c71174 Power9] Implement new vsx instructions: compare and conversion
This change implements the following vsx instructions:

Quad/Double-Precision Compare:
xscmpoqp xscmpuqp
xscmpexpdp xscmpexpqp
xscmpeqdp xscmpgedp xscmpgtdp xscmpnedp
xvcmpnedp(.) xvcmpnesp(.)
Quad-Precision Floating-Point Conversion
xscvqpdp(o) xscvdpqp
xscvqpsdz xscvqpswz xscvqpudz xscvqpuwz xscvsdqp xscvudqp
xscvdphp xscvhpdp xvcvhpsp xvcvsphp
xsrqpi xsrqpix xsrqpxp
28 instructions

Phabricator: http://reviews.llvm.org/D16709

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262068 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:11:55 +00:00
Sanjay Patel
8fe5b80086 [x86, InstCombine] transform x86 AVX masked stores to LLVM intrinsics
The intended effect of this patch in conjunction with:
http://reviews.llvm.org/rL259392
http://reviews.llvm.org/rL260145

is that customers using the AVX intrinsics in C will benefit from combines when
the store mask is constant:

void mstore_zero_mask(float *f, __m128 v) {
  _mm_maskstore_ps(f, _mm_set1_epi32(0), v);
}

void mstore_fake_ones_mask(float *f, __m128 v) {
  _mm_maskstore_ps(f, _mm_set1_epi32(1), v);
}

void mstore_ones_mask(float *f, __m128 v) {
  _mm_maskstore_ps(f, _mm_set1_epi32(0x80000000), v);
}

void mstore_one_set_elt_mask(float *f, __m128 v) {
  _mm_maskstore_ps(f, _mm_set_epi32(0x80000000, 0, 0, 0), v);
}

...so none of the above will actually generate a masked store for optimized code.

Differential Revision: http://reviews.llvm.org/D17485



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262064 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:04:14 +00:00
Paul Robinson
7d591196bd Revert r262054 on one file that fails sometimes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262060 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 20:41:07 +00:00
Paul Robinson
45648a4496 Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
FileCheck actually doesn't support combo suffixes.

Differential Revision: http://reviews.llvm.org/D17588


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262054 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 19:40:34 +00:00
Nirav Dave
9f68f5fa4d Fix Sparc 32bit Lowering to rebundle up v2i32 values.
Summary: Fix LowerCall to rebundle v2i32 values after lowering and add testcase

Reviewers: jyknight

Subscribers: llvm-commits, jyknight

Differential Revision: http://reviews.llvm.org/D17615

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262048 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 18:55:22 +00:00
Sanjay Patel
8631e9e9fb [x86, AVX] fold 'isPositive' 256-bit vector integer operations (PR26701)
This extends the fold introduced with:
http://reviews.llvm.org/rL262036



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262047 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 18:42:50 +00:00
Sanjay Patel
568de6274c [x86, AVX] add 256-bit tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 18:07:58 +00:00
Sanjay Patel
3d8c62e7f1 [x86, SSE] fold 'isPositive' vector integer operations (PR26701)
This is one of the cases shown in:
https://llvm.org/bugs/show_bug.cgi?id=26701

Shift and negate is what InstCombine appears to prefer, so I've started with that pattern. 
Note that the 'pcmpeq' instructions are always generating the negative one for the actual
'pcmpgt' comparison in each case (side note: why isn't there an alias mnemonic for that?).

Differential Revision: http://reviews.llvm.org/D17630



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262036 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 16:56:03 +00:00
Reid Kleckner
0e6b04c2c0 [WinEH] Fix funclet return block clobber mask placement
MBB slot index intervals are half open, not closed. getMBBEndIndex()
returns the slot index of the start of the next block in layout order.
Placing a register mask there is incorrect if the successor of the
funclet return is not laid out after the return. Clang generates IR for
catch bodies before generating the following normal code, so we never
noticed this issue until the D frontend authors filed a bug about it.

Instead, we can put the clobber mask on the last instruction of the
funclet return block. We still aren't using a register mask operand on
the CATCHRET instruction because it would cause PEI to spill all CSRs,
including XMM regs, in the prologue.

Fixes PR26679.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262035 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 16:53:19 +00:00
Chris Dewhurst
f7a1494177 Reverting breaking change. Sorry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262007 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 12:20:10 +00:00
Chris Dewhurst
528e89dfaf Reviewed at reviews.llvm.org/D17133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262005 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 11:46:47 +00:00
Chandler Carruth
adb60a3a11 [PM] Introduce CRTP mixin base classes to help define passes and
analyses in the new pass manager.

These just handle really basic stuff: turning a type name into a string
statically that is nice to print in logs, and getting a static unique ID
for each analysis.

Sadly, the format of passes in anonymous namespaces makes using their
names in tests really annoying so I've customized the names of the no-op
passes to keep tests sane to read.

This is the first of a few simplifying refactorings for the new pass
manager that should reduce boilerplate and confusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262004 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 11:44:45 +00:00
Nikolay Haustov
1c038cf2fa [AMDGPU] Assembler: Basic support for MIMG
Add parsing and printing of image operands. Matches legacy sp3 assembler.
Change image instruction order to have data/image/sampler operands in the beginning. This is needed because optional operands in MC are always last.
Update SITargetLowering for new order.
Add basic MC test.
Update CodeGen tests.

Review: http://reviews.llvm.org/D17574

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261995 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 09:51:05 +00:00
Simon Pilgrim
1c7f0f6e51 [X86][F16C] Added native IR half/float conversion tests.
Placeholder tests until we start improving native vector support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261989 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 08:52:29 +00:00
David Blaikie
6802c0801c llvm-dwp: provide diagnostics for duplicate DWO IDs
These diagnostics aren't perfect - in the case of merging several dwos
into dwps and those dwps into more dwps - just getting the message about
the original source file name might not be much help (since it's the
same in both dwos, by definition - but doesn't tell you which chain of
dwps to backtrack)

It might be worth adding the DW_AT_dwo_id to the split debug info to
improve the diagnostic experience - might help track down the duplicates
better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261988 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 07:30:15 +00:00
David Blaikie
132af4d0cd llvm-dwp: Support empty .dwo files
Though a bit odd, this is handy for a few reasons - for example, in a
build system that wants consistent input/output of build steps, but
where split-dwarf might be overriden/disabled by the user on a per-file
basis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261987 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 07:04:58 +00:00
Craig Topper
898f56a220 [X86] Add test cases for r261977 and fix a grammatical error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261983 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 06:50:24 +00:00
Haicheng Wu
27a460f328 [JumpThreading] Simplify Instructions first in ComputeValueKnownInPredecessors()
This change tries to find more opportunities to thread over basic blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261981 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 06:06:04 +00:00
Hongbin Zheng
3543d33768 Another fix the testcase introduced by r261903 - Add the missing matches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261971 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 03:41:47 +00:00
Matthias Braun
e0761c4899 MachineCopyPropagation: Catch copies of the form A<-B;A<-B
Differential Revision: http://reviews.llvm.org/D17475

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261966 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 03:18:55 +00:00
Matthias Braun
ed2d4b99b9 MachineCopyPropagation: Keep scanning through instructions with regmasks
This also simplifies the code by removing the overly conservative
NoInterveningSideEffect() function. This function checked:
- That the two copies belong to the same block: We only process one
  block at a time and clear our maps in between it is impossible to find a
  copy from a different block.
- There is no terminator between the two copy instructions: This is not
  allowed anyway (the MachineVerifier would complain)
- Does not have instructions with hasUnmodeledSideEffects() or isCall()
  set: Even for those instructuction we must have all clobbers/defs of
  registers explicit as an operand. If the register is explicitely
  clobbered we would never come to the point of checking for
  NoInterveningSideEffect() anyway.

(I also checked this with a temporary build of the test-suite with all
 potentially failing conditions in NoInterveningSideEffect() turned into
 asserts)

Differential Revision: http://reviews.llvm.org/D17474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261965 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 03:18:50 +00:00
Xinliang David Li
a6320f1513 [PGO] Add test case to ensure covmap section is not allocatable.
Differential Revision: http://reviews.llvm.org/D17324


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261959 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 03:05:10 +00:00
Mike Aizatsky
5e86c5c682 [sancov] Pruning full dominator blocks from instrumentation.
Summary:
This is the first simple attempt to reduce number of coverage-
instrumented blocks.

If a basic block dominates all its successors, then its coverage
information is useless to us. Ingore such blocks if
santizer-coverage-prune-tree option is set.

Differential Revision: http://reviews.llvm.org/D17626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261949 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 01:17:22 +00:00
Sanjay Patel
c76bace985 [x86, SSE] add tests to show missing pcmp folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261948 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 01:14:27 +00:00
David Majnemer
20cfdfefcf [WinEH] Don't remove unannotated inline-asm calls
Inline-asm calls aren't annotated with funclet bundle operands because
they don't throw and cannot be inlined through.  We shouldn't require
them to bear an funclet bundle operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261942 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 00:04:25 +00:00
Hemant Kulkarni
70c478d920 Reverts change r261907 and r261918
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261927 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 20:47:07 +00:00
Hongbin Zheng
e37bafef46 Use regex in testcase, do not fail windows bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261922 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 19:16:40 +00:00
Hemant Kulkarni
ce1dab33de [llvm-readobj] Enable GNU style sections and relocations printing
http://reviews.llvm.org/D17523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261907 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 18:02:00 +00:00
Hongbin Zheng
edc89ca3ac Introduce RegionInfoAnalysis, which compute Region Tree in the new PassManager. NFC
Differential Revision: http://reviews.llvm.org/D17571

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261904 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 17:54:25 +00:00
Hongbin Zheng
159692245c Introduce DominanceFrontierAnalysis to the new PassManager to compute DominanceFrontier. NFC
Differential Revision: http://reviews.llvm.org/D17570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 17:54:15 +00:00
Hongbin Zheng
5d7472e863 Introduce analysis pass to compute PostDominators in the new pass manager. NFC
Differential Revision: http://reviews.llvm.org/D17537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261902 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 17:54:07 +00:00
Tim Northover
dca70119b4 ARM: disallow pc as a base register in Thumb2 memory ops.
These should all be deferring to the "OP (literal)" variant according to the
ARM ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261895 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 16:54:52 +00:00
Hongbin Zheng
9137eb3ff8 Revert "Introduce analysis pass to compute PostDominators in the new pass manager. NFC"
This reverts commit a3e5cc6a51ab5ad88d1760c63284294a4e34c018.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261891 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 16:45:53 +00:00
Hongbin Zheng
173d9faa77 Revert "Introduce DominanceFrontierAnalysis to the new PassManager to compute DominanceFrontier. NFC"
This reverts commit 109c38b2226a87b0be73fa7a0a8c1a81df20aeb2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261890 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-25 16:45:46 +00:00