Commit Graph

49904 Commits

Author SHA1 Message Date
Bob Wilson
c00479253b Replace dregsingle operand modifier with explicit escaped curly brackets.
For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:39:33 +00:00
Bob Wilson
ad5312ad70 Convert a few Neon tests to use FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:33:22 +00:00
Jakob Stoklund Olesen
323e7d32ab Clean up the handling of two-address operands in RegScavenger.
This fixes PR4528.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78107 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:30:30 +00:00
Jakob Stoklund Olesen
f955cbf56f Don't give implicit machine operands special treatment in the register scavenger.
Imp-def is *not* allowed to redefine a live register.
Imp-use is *not* allowed to use a dead register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78106 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:29:11 +00:00
Mike Stump
4dcff6db72 Restlyize to match other targets, fixes cmake build to boot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:27:06 +00:00
Evan Cheng
9e7a312391 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:13 +00:00
Chris Lattner
275bb1bd12 remove a random reference to subtarget. Even without this, we
still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78103 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:08 +00:00
David Goodwin
53e4471adc Add NEON single-precision FP support for fabs and fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:39:05 +00:00
Daniel Dunbar
53a7f16dcc TableGen / AsmMatcher: Tweaks to avoid generating completely bogus match
functions.
 - Fix variant flattening when the variant embeds an operand reference.

 - Ignore instructions which reference an operand multiple times (e.g., "xorb
   $dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:36:45 +00:00
Daniel Dunbar
6db0a8b4fd When exec() fails, return 127 instead of errno; the parent process has no way to
distinguish that the result is errno, so it can't use it to provide more
information about the error (it also exposes the numeric value of errno).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:32:25 +00:00
Owen Anderson
d03eecd063 Privatize the last bit of Constant-creation state.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78097 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:25:11 +00:00
Chris Lattner
f9c1ccf280 rip out SectionEndDirectiveSuffix support, only uses by
the masm backend.  If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78096 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:09:41 +00:00
Jakob Stoklund Olesen
efb8e3e113 Don't tamper with <undef> operands in MachineInstr::addRegisterKilled.
For an undef operand, MO.getReg() is meaningless and we should not use it.
Undef operands should be skipped entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:09:25 +00:00
Jakob Stoklund Olesen
ded2e3b0d0 LowerSubregsInstructionPass::LowerExtract should not extend the live range of registers.
When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the
kill flag to the place where the sub-register is killed. This can accidentally
overlap with the use of a sibling sub-register, and we have trouble.

In the test case we have this code:

Live Ins: %R0 %R1 %R2
	%R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
	%R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
	%R1L<def> = EXTRACT_SUBREG %R1<kill>, 1
	%R0L<def> = EXTRACT_SUBREG %R0<kill>, 1
	%R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: eliminated!
subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H:

*** Bad machine code: Redefining a live physical register ***
- function:    f
- basic block:  0x18358c0 (#0)
- instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
Register R2H was defined but already live.

The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating
it completely:

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill>

Note that these IMPLICIT_DEF instructions survive to the asm output. It is
necessary to fix the stack-color-with-reg test case because of that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:01:11 +00:00
Jakob Stoklund Olesen
d37bc5a27b Enforce stricter rules in machine code verifier.
Implicit operands no longer get a free pass: Imp-use requires a live register
and imp-def requires a dead register.

There is also no special rule allowing redefinition of a sub-register when the
super-register is live. The super register must have imp-kill+imp-def operands
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 19:18:01 +00:00
Jakob Stoklund Olesen
71d342e854 Most flags are reserved registers on Blackfin.
The only exception is CC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 19:16:55 +00:00
Evan Cheng
3425df44b5 In thumb mode, r7 is used as frame register. This fixes pr4681.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:46:17 +00:00
David Goodwin
b84f3d427c Match common pattern for FNMAC. Add NEON SP support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:44:29 +00:00
David Goodwin
831b500ec1 Improve tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:11:59 +00:00
Sanjiv Gupta
ada097a853 Legalize i64 store operations generated by inst-combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:59:16 +00:00
David Goodwin
42a83f2d15 Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:53:06 +00:00
Douglas Gregor
c7a6da6e14 Add some type traits that are used for Clang's statically-checked
canonical types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78076 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:04:52 +00:00
Evan Cheng
7d35249e89 Fix PR4528. This scavenger assertion is too strict. The two-address value is
killed by another operand.

There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78072 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:52:44 +00:00
Daniel Dunbar
7145e9be64 Avoid compiler warning (in -Asserts mode)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78070 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:46:12 +00:00
Chris Lattner
ec409759e9 enhance codegen to put 16-bit character strings into the
__TEXT,__ustring section on darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:27:13 +00:00
Chris Lattner
7e88a50428 fix a fixme: don't create an explicit "CStringSection" for ELF,
it is just being used as a prefix, so forward substitute it directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:19:50 +00:00
Chris Lattner
1850e5add1 Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
section on ELF targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78066 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:13:09 +00:00
Misha Brukman
0307a76def * Use "svn export" instead of "svn co" and avoid cleaning up .svn dirs
* Use "svn info" to get last revision in repo, will get matching tarballs
* Now run "svn -q" since "svn info" tells us the revision number


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 15:47:18 +00:00
Anton Korobeynikov
939ba32747 Ooops, I was too fast to commit the wrong fix :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:18:31 +00:00
Anton Korobeynikov
20e037a8c5 Fix a typo - this unbreaks llvm-gcc build on arm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 11:12:51 +00:00
Evan Cheng
eb084d1671 Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 08:34:18 +00:00
Devang Patel
d5ac40457b Use separate ValueList for metadata.
This fixes PR4666.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 06:00:18 +00:00
Chris Lattner
3b24c01720 make MergeableCString be a SectionKind "abstract class", and
add new concrete versions for 1/2/4-byte mergable strings.

These are not actually created yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 05:35:56 +00:00
Edward O'Callaghan
37442b77d8 Minor www site formating improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 05:24:28 +00:00
Devang Patel
912538beca Revert recent bitcode writer patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 05:01:35 +00:00
Bill Wendling
27d703b30f llvm-gcc checks the static asm variable is valid in ValidateRegisterVariable. Make this work for PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:48:31 +00:00
Chris Lattner
0a0193edf9 switch ValueMap to using AssertingVH. This is an old patch I had laying
around in a tree I forgot about.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:31:02 +00:00
Daniel Dunbar
4b3d57228c No really, it's unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:08:40 +00:00
Daniel Dunbar
a277f4e33d Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78046 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:04:25 +00:00
Daniel Dunbar
214e22396f Remove now unused Module argument to createTargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:02:45 +00:00
Bill Wendling
2822e174f6 Fixed now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 03:46:54 +00:00
Rafael Espindola
c4f8861af3 Add test for PR4678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 03:44:37 +00:00
Bill Wendling
d9a05eb97e XFAIL for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78038 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 03:40:47 +00:00
Devang Patel
13ed1e2936 Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 02:54:15 +00:00
Devang Patel
2453c40145 Fix MDString Abbrev setup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78034 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 02:36:39 +00:00
Devang Patel
d701aa7bed Constants and Metadata share ValueList. This means they must be emitted interleaved (using appropriate BLOCK_IDs) otherwise ValuePtrs index gets out of sync.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78033 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 02:26:56 +00:00
Evan Cheng
f0409ea488 Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:56:09 +00:00
Evan Cheng
27934da97b Load / store multiple pass fixes for Thumb2. Not enabled yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:43:45 +00:00
Evan Cheng
fa2ea1a8cf Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:41:15 +00:00
Bob Wilson
a599bff101 Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
results to fixed registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 00:36:16 +00:00