Chris Lattner
e6c1473e56
Bill implemented this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 19:09:07 +00:00
Chris Lattner
8dfdf5d62d
add a note, this is why we're faster at SciMark-MonteCarlo with
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SSE disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 19:08:01 +00:00
Dan Gohman
37eed798a9
Minor code cleanups; no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 17:28:58 +00:00
Mon P Wang
7bcaefaf59
Fixes a case where we generate an incorrect mask for pshfhw in the presence
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of undefs and incorrectly determining if we have punpckldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 01:16:59 +00:00
Dale Johannesen
dd64c417c0
Patch up omissions in DebugLoc propagation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 00:33:20 +00:00
Dale Johannesen
eacf2dc4bb
Need this file too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63674 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 22:26:34 +00:00
Dale Johannesen
0f502f6f44
Add some DL propagation to places that didn't
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have it yet. More coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 22:26:09 +00:00
Dale Johannesen
d839254888
DebugLoc propgation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63664 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 21:48:12 +00:00
Dale Johannesen
e4d209dcb8
DebugLoc propagation. done with file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 20:21:25 +00:00
Dale Johannesen
ace1610df5
DebugLoc propagation. 2/3 through file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63650 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 19:33:06 +00:00
Dan Gohman
605679f0cd
Tevert part of the x86 subtarget logic changes: when -march=x86-64
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is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.
This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 18:53:21 +00:00
Bill Wendling
9bc96a5720
Create DebugLoc information in FastISel. Several temporary methods were
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created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 00:55:04 +00:00
Dan Gohman
f75e5b4d8c
Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware has
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SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.
Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63575 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 00:04:43 +00:00
Torok Edwin
b68a88bd48
Only force SSE level if it is not correct.
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Add an assert to check HasX86_64 status.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63552 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 21:57:34 +00:00
Torok Edwin
38870ed13c
remove #if 0 code on Bill's request.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 20:23:02 +00:00
Evan Cheng
97d0e0e314
ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 09:15:04 +00:00
Evan Cheng
961d6d4ac0
Add comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 08:19:07 +00:00
Evan Cheng
67ad9db15b
Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 08:07:36 +00:00
Torok Edwin
3f142c36ad
Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
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var-args, and don't allow FP return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:15:56 +00:00
Duncan Sands
b0d5cdd52e
Fix PR3453 and probably a bunch of other potential
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crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:06:53 +00:00
Dale Johannesen
7d2ad624fa
Make LowerCallTo and LowerArguments take a DebugLoc
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argument. Adjust all callers and overloaded versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:10:59 +00:00
Bill Wendling
7581bfa275
Get rid of the non-DebugLoc-ified getNOT() method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:03:19 +00:00
Mon P Wang
7ad9b51278
When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of
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an illegal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 07:07:40 +00:00
Dan Gohman
e5af2d3a22
Make x86's BT instruction matching more thorough, and add some
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dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889
Fixed lowering of v816 shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 23:11:14 +00:00
Duncan Sands
1465d61bdd
Rename getAnalysisToUpdate to getAnalysisIfAvailable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 13:14:17 +00:00
Evan Cheng
1632782fe9
The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:35:02 +00:00
Mon P Wang
3becd093cc
Add shuffle splat pattern for x86 sse shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:12:05 +00:00
Dan Gohman
d3f184906d
Reformat the allocation-order arrays to a more conventional style.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 19:25:38 +00:00
Dan Gohman
c03e9a1040
Simplify findNonImmUse; return the result using the return value
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instead of via a by-reference argument. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 19:04:30 +00:00
Evan Cheng
6a86bd71df
Implement multiple with overflow by 2 with an add instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 03:30:42 +00:00
Dan Gohman
e8ecf4876a
Eliminate unnecessary operands-list traversals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63088 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 02:37:43 +00:00
Dan Gohman
336b636dd7
Fix the Red Zone calculation for functions with frame pointers.
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Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63074 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 00:40:06 +00:00
Dan Gohman
92f4f16a19
Implement Red Zone utilization on x86-64. This is currently
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disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 22:22:31 +00:00
Evan Cheng
5b2e5893c6
Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 18:43:34 +00:00
Dan Gohman
e7852d0144
Take the next steps in making SDUse more consistent with LLVM Use, and
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tidy up SDUse and related code.
- Replace the operator= member functions with a set method, like
LLVM Use has, and variants setInitial and setNode, which take
care up updating use lists, like LLVM Use's does. This simplifies
code that calls these functions.
- getSDValue() is renamed to get(), as in LLVM Use, though most
places can either use the implicit conversion to SDValue or the
convenience functions instead.
- Fix some more node vs. value terminology issues.
Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 04:35:06 +00:00
Nate Begeman
c2fd67f697
De-identifying per sabre review
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 03:15:31 +00:00
Nate Begeman
51a0437b16
Map address space 256 to gs; similar mappings could be supported for the
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other x86 segments. address space 0 is stack/default, 1-255 are reserved for
client use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 01:24:32 +00:00
Nate Begeman
740ab03f12
Support pattern matching various x86 sse shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 00:52:55 +00:00
Torok Edwin
afb564c697
should have removed the + when manually applying a patch!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 20:29:34 +00:00
Torok Edwin
c8ad2d2abf
revert this patch for now, because Codegen does still want to generate SSE code,
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for example in the case of va-args. XFAIL associated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 20:21:24 +00:00
Torok Edwin
7f1d5252c7
If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 17:58:56 +00:00
Nate Begeman
9b99485074
Fix an indent and a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-24 22:12:48 +00:00
Chris Lattner
91387de8ce
hopefully address PR3379 by making the P modifier work in x86 inline asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-23 22:33:40 +00:00
Bob Wilson
4c24546238
Add SelectionDAG::getNOT method to construct bitwise NOT operations,
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corresponding to the "not" and "vnot" PatFrags. Use the new method
in some places where it seems appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 17:39:32 +00:00
Evan Cheng
536ab130ec
Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 09:10:11 +00:00
Dan Gohman
dbf5f2557e
Recognize inline asm for bswap on x86-64 GLIBC. This allows it
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to be supported in the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 23:40:54 +00:00
Evan Cheng
a095c972cc
Also favors NOT64r.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 19:45:31 +00:00
Dan Gohman
1ef4d8f7ee
Fix a recent regression. ClrOpcode is not set for i8; for i8, if
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we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 14:50:16 +00:00
Evan Cheng
aaf414c92c
Favors generating "not" over "xor -1". For example.
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unsigned test(unsigned a) {
return ~a;
}
llvm used to generate:
movl $4294967295, %eax
xorl 4(%esp), %eax
Now it generates:
movl 4(%esp), %eax
notl %eax
It's 3 bytes shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 02:09:05 +00:00