Commit Graph

80239 Commits

Author SHA1 Message Date
Bill Wendling
d34cb1e09f [WIP] Initial code for module flags.
Module flags are key-value pairs associated with the module. They include a
'behavior' value, indicating how module flags react when mergine two
files. Normally, it's just the union of the two module flags. But if two module
flags have the same key, then the resulting flags are dictated by the behaviors.

Allowable behaviors are:

     Error
       Emits an error if two values disagree.

     Warning
       Emits a warning if two values disagree.

     Require
       Emits an error when the specified value is not present
       or doesn't have the specified value. It is an error for
       two (or more) llvm.module.flags with the same ID to have
       the Require behavior but different values. There may be
       multiple Require flags per ID.

     Override
       Uses the specified value if the two values disagree. It
       is an error for two (or more) llvm.module.flags with the
       same ID to have the Override behavior but different
       values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 11:38:06 +00:00
Craig Topper
a819c397e7 Remove some patterns for matching vector_shuffle instructions since vector_shuffles should be custom lowered before isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 07:43:35 +00:00
Andrew Trick
746f24b732 Add TargetPassConfig hooks for scheduling/bundling.
In case the MachineScheduling pass I'm working on doesn't work well
for another target, they can completely override it. This also adds a
hook immediately after the RegAlloc pass to cleanup immediately after
vregs go away. We may want to fold it into the postRA hook later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 07:11:32 +00:00
Andrew Trick
fda655ec23 comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 07:11:29 +00:00
Craig Topper
39a9e485f2 Fix shuffle lowering code to stop creating temporary DAG nodes to do shuffle mask checks on. This seemed to be confusing things such that vector_shuffle ops to got through to iselection. This is another step towards removing the vector_shuffle handling patterns from isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 06:24:48 +00:00
Jakob Stoklund Olesen
5637379000 Allow Post-RA LICM to hoist reserved register reads.
When using register masks, registers like %rip are clobbered by the
register mask. LICM should still be able to hoist instructions reading
%rip from a loop containing calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 00:44:19 +00:00
Jakob Stoklund Olesen
a6d513f474 Handle register masks in local live range splitting.
Again the goal is to produce identical assembly with register mask
operands enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 00:42:18 +00:00
Jakob Stoklund Olesen
fd3d4cf0ef Don't read PreRegAlloc before it is initialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-11 00:40:36 +00:00
Jim Grosbach
f06dfa7860 Revert r150222, as the clang driver now handles this properly.
Now that the clang driver passes the CPU and feature information to
the backend when processing assembly files (150273), this isn't necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 20:38:46 +00:00
Jakob Stoklund Olesen
f1deaff53b Clean up comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 19:27:34 +00:00
Jakob Stoklund Olesen
938200859e Add a static MachineOperand::clobbersPhysReg().
It can be necessary to detach a register mask pointer from its
MachineOperand. This method is convenient for checking clobbered
physregs on a detached bitmask pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 19:23:53 +00:00
Jakob Stoklund Olesen
6ef7da0197 Add register mask support to InterferenceCache.
This makes global live range splitting behave identically with and
without register mask operands.

This is not necessarily the best way of using register masks for live
range splitting.  It would be more efficient to first split global live
ranges around calls (i.e., register masks), and reserve the fine grained
per-physreg interference guidance for global live ranges that do not
cross calls.

For now the goal is to produce identical assembly when enabling register
masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 18:58:34 +00:00
Jakob Stoklund Olesen
3bf7a1cc3c Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 18:52:15 +00:00
Pete Cooper
f95acc6d02 Added description of invariant.load metadata to LangRef. It was added to the compiler in r144100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 18:13:54 +00:00
Jason W Kim
1de886c1fa Make valgrind happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 16:07:59 +00:00
Hal Finkel
38a7f22445 Update BBVectorize to use aliasesUnknownInst.
This allows BBVectorize to check the "unknown instruction" list in the
alias sets. This is important to prevent instruction fusing from reordering
function calls. Resolves PR11920.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 15:52:40 +00:00
Hal Finkel
ce0dd7314b Have AliasSet::aliasesUnknownInst use pointer TBAA info when available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 15:52:39 +00:00
Hal Finkel
1a4ccc3aa2 Make aliasesPointer and aliasesUnknownInst public members of AliasSet.
These query functions are safe for external use and, furthermore,
are the only way to make queries against the "unknown instructions" array.
BBVectorize will use these functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 15:52:37 +00:00
Duncan Sands
aa97bb54f0 Fix PR11948: the result type of an icmp may be a vector of boolean -
don't assume it is a boolean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 14:31:24 +00:00
Duncan Sands
edfb931edb Revert commit 149912 (lattner) and add a testcase that shows the problem (which
is that patterns no longer match for vectors of booleans, because you only get
ConstantDataVector when the vector element type is i8, i16, etc, not when it is
i1).  Original commit message:
Remove some dead code and tidy things up now that vectors use ConstantDataVector
instead of always using ConstantVector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150246 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 14:26:42 +00:00
Benjamin Kramer
c667ba69ac Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.
Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't
have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 13:18:44 +00:00
Andrew Trick
06efdd238e comment grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 07:08:25 +00:00
Jia Liu
060047f03b update --enable-targets list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:58:24 +00:00
Andrew Trick
4a5f3cd6ca unnecessary include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:44 +00:00
Andrew Trick
1e9bcb3b1f PTX no longer needs to provide its own backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:40 +00:00
Andrew Trick
8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:36 +00:00
Andrew Trick
16f72dd686 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:26 +00:00
Lang Hames
4465b6f6b2 Remove unused 'isAlias' parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150224 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 03:19:36 +00:00
Jim Grosbach
e009860049 ARM on darwin, v6 implies the presence of VFP for the assembler.
rdar://10838899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 02:21:49 +00:00
Jakob Stoklund Olesen
9f10ac63a3 Constrain the regmask search space for local live ranges.
When checking a local live range for interference, restrict the binary
search to the single block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150220 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 01:31:31 +00:00
Jakob Stoklund Olesen
34e85d0307 Cache basic block boundaries for faster RegMaskSlots access.
Provide API to get a list of register mask slots and bits in a basic
block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150219 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 01:26:29 +00:00
Jakob Stoklund Olesen
ebf2750a70 Optimize LiveIntervals::intervalIsInOneMBB().
No looping and binary searches necessary.

Return a pointer to the containing block instead of just a bool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 01:23:55 +00:00
Benjamin Kramer
f378f5fae3 Cache iterators. Some of these are expensive to create.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 00:28:31 +00:00
David Blaikie
58604cd944 Change default error_code ctor to a 'named ctor' so it's more self-documenting.
Unify default construction of error_code uses on this idiom so that users don't
feel compelled to make static globals for naming convenience. (unfortunately I
couldn't make the original ctor private as some APIs don't return their result,
instead using an out parameter (that makes sense to default construct) - which
is a bit of a pity. I did, however, find/fix some cases of unnecessary default
construction of error_code before I hit the unfixable cases)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 19:24:12 +00:00
Jakob Stoklund Olesen
e7c2c15b0c Add register mask support to RAGreedy.
This only adds the interference checks required for correctness.
We still need to take advantage of register masks for the
interference driven live range splitting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150191 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 18:25:05 +00:00
Devang Patel
cd37fd51fc Now subprogram descriptors are not collected by llvm.dbg.sp NamedMDNode. Update document to reflect this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 17:34:01 +00:00
Benjamin Kramer
c1322a13b5 Tweak comment readability and grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 16:28:15 +00:00
Sirish Pande
b9f69a41fc Test for commit access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 15:20:33 +00:00
Benjamin Kramer
d469274743 GlobalOpt: Be more aggressive about elminating side-effect free static dtors.
GlobalOpt runs early in the pipeline (before inlining) and complex class
hierarchies often introduce bitcasts or GEPs which weren't optimized away.
Teach it to ignore side-effect free instructions instead of depending on
other passes to remove them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 14:26:06 +00:00
Benjamin Kramer
2c6ae095b8 Store just the SimpleValueType in the generated VT tables for each register class, eliminating static ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 12:35:37 +00:00
Benjamin Kramer
133f9d9894 Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per entry on x86_64.
No change on i386.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 11:25:09 +00:00
James Molloy
3015dfb7d7 Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150169 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 10:56:31 +00:00
Craig Topper
f41ab77847 More tweaks to get the size of the X86 disassembler tables down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 08:58:07 +00:00
Craig Topper
ce8f4c58d8 Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150161 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 07:45:30 +00:00
Lang Hames
72a043f9d6 Preserve physreg kills in MachineBasicBlock::SplitCriticalEdge.
Failure to preserve kills was causing LiveIntervals to miss some EFLAGS live
ranges. Unfortunately I've been unable to reduce a good test case yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 05:59:36 +00:00
NAKAMURA Takumi
c1b18e7549 test/CodeGen/X86/atom-lea-sp.ll: Add explicit -mtriple=i686-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 05:12:58 +00:00
Lang Hames
fb08b90bf4 Fix kill flags when moving instructions using LiveIntervals::moveInstr(...).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 04:45:38 +00:00
Lang Hames
394d712711 Remove assertion. Not all use operands are reads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 04:39:48 +00:00
Andrew Trick
f7b96311d2 Improve TargetPassConfig. No intended functionality.
Split CodeGen into stages.
Distinguish between optimization and correctness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 00:40:55 +00:00
Andrew Trick
78b2961f4d comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 00:40:52 +00:00