131698 Commits

Author SHA1 Message Date
Kit Barton
db21c5a551 [SystemZ] Add support for additional branch extended mnemonics
Added support for extended mnemonics for the following branch instructions and
load/store-on-condition opcodes:

BR, LOCR, LOCGR, LOC, LOCG, STOC, STOCG

Phabricator: http://reviews.llvm.org/D19729

Committing on behalf of Zhan Liau

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269106 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 20:11:24 +00:00
Davide Italiano
5f206cf7b0 [SCCP] Partially propagate informations when the input is not fully defined.
With this patch:
%r1 = lshr i64 -1, 4294967296 -> undef

Before this patch:
%r1 = lshr i64 -1, 4294967296 -> 0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269105 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 19:49:47 +00:00
Chris Bieneman
9e1d5770bf [CMake] Add some extra variables to LLVMConfig.cmake.in
Compiler-RT needs LLVM_LIBRARY_DIR, LLVM_BINARY_DIR.

Setting these in LLVMConfig.cmake will allow Compiler-RT to not need to run llvm-config as long as the LLVMConfig.cmake module is in the CMake module path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269104 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 19:45:17 +00:00
Adrian Prantl
b97f02b8fa Debug Info: Prevent DW_AT_abstract_origin from being emitted twice
for the same subprogram.

This fixes a bug where DW_AT_abstract_origin is being emitted twice for
the same subprogram if a function is both inlined and emitted in the same
translation unit, by restoring the pre-r266446 behavior.

http://reviews.llvm.org/D20072

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269103 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 19:38:51 +00:00
Tim Northover
8189e3d887 ARM: stop emitting blx instructions for most calls on MachO.
I'm really not sure why we were in the first place, it's the linker's job to
convert between BL/BLX as necessary. Even worse, using BLX left Thumb calls
that could be locally resolved completely unencodable since all offsets to BLX
are multiples of 4.

rdar://26182344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269101 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 19:17:47 +00:00
Konstantin Zhuravlyov
2147c01e5a [AMDGPU][NFC] Rename SIInsertNops -> SIDebuggerInsertNops
Differential Revision: http://reviews.llvm.org/D20117


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269098 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 18:33:41 +00:00
Justin Bogner
c6c705c89d LPM: Drop require<loops> from these tests, it's redundant. NFC
The LoopPassManager needs to calculate the loops analysis in order to
iterate over the loops at all. Requiring it is redundant and just adds
noise to the RUN lines here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269097 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 18:28:10 +00:00
Rafael Espindola
11ab0c3a5d Make "@name =" mandatory for globals in .ll files.
An oddity of the .ll syntax is that the "@var = " in

@var = global i32 42

is optional. Writing just

global i32 42

is equivalent to

@0 = global i32 42

This means that there is a pretty big First set at the top level. The
current implementation maintains it manually. I was trying to refactor
it, but then started wondering why keep it a all. I personally find the
above syntax confusing. It looks like something is missing.

This patch removes the feature and simplifies the parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269096 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 18:22:45 +00:00
Peter Collingbourne
aa07a976c3 Re-apply r269081 and r269082 with a fix for MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269094 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 18:07:21 +00:00
Lawrence Hu
2a60909c19 Enable loopreroll for sext of loop control only IV
This patch extend loopreroll to allow the instruction chain
    of loop control only IV has sext.

    Differential Revision: http://reviews.llvm.org/D19820



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269093 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 18:00:42 +00:00
Mandeep Singh Grang
efde4d38ac Fix PR26655: Bail out if all regs of an inst BUNDLE have the correct kill flag
Summary:
While setting kill flags on instructions inside a BUNDLE, we bail out as soon
as we set kill flag on a register.  But we are missing a check when all the
registers already have the correct kill flag set. We need to bail out in that
case as well.

This patch refactors the old code and simply makes use of the addRegisterKilled
function in MachineInstr.cpp in order to determine whether to set/remove kill
on an instruction.

Reviewers: apazos, t.p.northover, pete, MatzeB

Subscribers: MatzeB, davide, llvm-commits

Differential Revision: http://reviews.llvm.org/D17356

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269092 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:57:27 +00:00
Peter Collingbourne
b6f6e4455c Revert r269081 and r269082 while I try to find the right incantation to fix MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269091 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:54:43 +00:00
Rong Xu
346818f514 [PGO] resubmit r268969
Put the test into a target specific directory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269090 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:45:33 +00:00
Lawrence Hu
fdf3439d6a Enable loopreroll for sext of loop control only IV
This patch extend loopreroll to allow the instruction chain
    of loop control only IV has sext.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269084 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:42:27 +00:00
Dan Gohman
f02416f9ad [WebAssembly] Preliminary fast-isel support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269083 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:39:48 +00:00
Peter Collingbourne
e7feafb873 Use doxygen style comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269082 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:35:30 +00:00
Peter Collingbourne
190db6acaa WholeProgramDevirt: Move logic for finding devirtualizable call sites to Analysis.
The plan is to eventually make this logic simpler, however I expect it to
be a little tricky for the foreseeable future (at least until we're rid of
pointee types), so move it here so that it can be reused to build a summary
index for devirtualization.

Differential Revision: http://reviews.llvm.org/D20005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269081 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:34:21 +00:00
Rafael Espindola
3bd20c6a9f Simplify LLParser::ParseOptionalLinkage. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269080 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:16:45 +00:00
Simon Pilgrim
d91145c2d6 [X86][AVX512] Added another masked shuffle combine from load test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269077 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 16:55:20 +00:00
Krzysztof Parzyszek
3c0f002a59 [ScheduleDAG] Make sure to process all def operands before any use operands
An example from Hexagon where things went wrong:
  %R0<def> = L2_loadrigp <ga:@fp04>      ; load function address
  J2_callr %R0<kill>, ..., %R0<imp-def>  ; call *R0, return value in R0

ScheduleDAGInstrs::buildSchedGraph would visit all instructions going
backwards, and in each instruction it would visit all operands in their
order on the operand list. In the case of this call, it visited the use
of R0 first, then removed it from the set Uses after it visited the def.
This caused the DAG to be missing the data dependence edge on R0 between
the load and the call.

Differential Revision: http://reviews.llvm.org/D20102


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269076 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 16:50:30 +00:00
Marcin Koscielnicki
9100579a4f [PR27599] [SystemZ] [SelectionDAG] Fix extension of atomic cmpxchg result.
Currently, SelectionDAG assumes 8/16-bit cmpxchg returns either a sign
extended result, or a zero extended result.  SystemZ takes a third
option by returning junk in the high bits (rotated contents of the other
bytes in the memory word).  In that case, don't use Assert*ext, and
zero-extend the result ourselves if a comparison is needed.

Differential Revision: http://reviews.llvm.org/D19800

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269075 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 16:49:04 +00:00
Nadav Rotem
88e0932f27 Update my email address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269073 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 16:23:54 +00:00
Simon Pilgrim
86f93f6dff [X86][AVX] Added some shuffle combine from load tests
As discussed on D19198 - we need to check what happens when we shuffle with different value type to the load

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269068 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 16:08:24 +00:00
Teresa Johnson
4b05ce2d0d [ThinLTO] Add option to emit imports files for distributed backends
Summary:
Add support for emission of plaintext lists of the imported files for
each distributed backend compilation. Used for distributed build file
staging.

Invoked with new gold-plugin thinlto-emit-imports-files option, which is
only valid with thinlto-index-only (i.e. for distributed builds), or
from llvm-lto with new -thinlto-action=emitimports value.

Depends on D19556.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D19636

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269067 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 15:54:09 +00:00
Renato Golin
50b2db8fa0 [docs] Fix unexpected indentation in HowToCrossCompileLLVM.rst
Seems like my sphynx version is different than the one in the bot, as it
accepted everything locally. I think this is the right fix...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269062 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 14:02:46 +00:00
Teresa Johnson
27af205ce1 Restore "[ThinLTO] Emit individual index files for distributed backends"
This restores commit r268627:
    Summary:
    When launching ThinLTO backends in a distributed build (currently
    supported in gold via the thinlto-index-only plugin option), emit
    an individual index file for each backend process as described here:
    http://lists.llvm.org/pipermail/llvm-dev/2016-April/098272.html

    ...

    Differential Revision: http://reviews.llvm.org/D19556

Address msan failures by avoiding std::prev on map.end(), the
theory is that this is causing issues due to some known UB problems
in __tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269059 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 13:48:23 +00:00
Renato Golin
598682f15c [docs] Change CrossCompilation guidde to reflect changes in Clang/GCC
HowToCrossCompile was outdated and generating too much traffic on the mailing
list with similar queries. This change helps offset most of the problems that
were reported recently including:

 * Removing the -ccc-gcc-name, adding --sysroot
 * Making references to Debian's multiarch for target libraries
 * Expanding -DCMAKE_CXX_FLAGS for both GCC and Clang
 * Some formatting and clarifications in the text

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269054 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 12:54:12 +00:00
Silviu Baranga
c5b59c23b5 [LAA] Use re-written SCEV expressions when computing distances
This removes a redundant stride versioning step (we already
do it in getPtrStride, so it has no effect) and uses PSE to
get the SCEV expressions for the source and destination
(this might have changed when getPtrStride was called).

I discovered this through code inspection, and couldn't
produce a regression test for it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269052 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 12:28:49 +00:00
James Molloy
3a22301784 Revert "[VectorUtils] Query number of sign bits to allow more truncations"
This was a fairly simple patch but on closer inspection was seriously flawed and caused PR27690.

This reverts commit r268921.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269051 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 12:27:23 +00:00
Daniel Sanders
32ba5cd276 [mips][ias] Make the default path unreachable in needsRelocateWithSymbol() (except for N64).
Following post-commit comments on r268900 from Rafael Espindola:
The missing relocations are now explicitly listed in the switch statement with
appropriate FIXME comments and the default path is now unreachable. The
temporary exception to this is that compound relocations for N64 still have a
default path that returns true. This is because fixing that case ought to be a
separate patch.

Also make R_MIPS_NONE return false since it has no effect on the section data.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269047 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 12:17:04 +00:00
Jeroen Ketema
f14def1048 [OCaml] Update core test and re-enable testing
Differential Revision: http://reviews.llvm.org/D19828


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269040 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 11:19:20 +00:00
Simon Pilgrim
122b5fb8b8 [X86][AVX512] Added masked version of MOVDDUP test with 16f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269038 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 10:30:00 +00:00
Chuang-Yu Cheng
9aa98caa23 Update Debug Intrinsics in RewriteUsesOfClonedInstructions in LoopRotation
Loop rotation clones instruction from the old header into the preheader. If
there were uses of values produced by these instructions that were outside
the loop, we have to insert PHI nodes to merge the two values. If the values
are used by DbgIntrinsics they will be used as a MetadataAsValue of a
ValueAsMetadata of the original values, and iterating all of the uses of the
original value will not update the DbgIntrinsics. The new code checks if the
values are used by DbgIntrinsics and if so, updates them using essentially
the same logic as the original code.

The attached testcase demonstrates the issue. Without the fix, the
DbgIntrinic outside the loop uses values computed inside the loop, even
though these values do not dominate the DbgIntrinsic.

Author: Thomas Jablin (tjablin)
Reviewers: dblaikie aprantl kbarton hfinkel cycheng

http://reviews.llvm.org/D19564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269034 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 09:45:44 +00:00
Arnaud A. de Grandmaison
5e24513c1f [InstCombine] Remove trivially empty va_start/va_end and va_copy/va_end ranges.
When a va_start or va_copy is immediately followed by a va_end (ignoring
debug information or other start/end in between), then it is safe to
remove the pair. As this code shares some commonalities with the lifetime
markers, this has been factored to helper functions.

This InstCombine pattern kicks-in 3 times when running the LLVM test
suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269033 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 09:24:49 +00:00
Chris Dewhurst
01fad33aac [Sparc][LEON] Itineraries unit test.
Added test to check LeonItineraries are being applied by code checked-in two weeks ago in r267121.

Phabricator Review: http://reviews.llvm.org/D19359

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269032 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 09:09:20 +00:00
Daniel Sanders
dd9958f08f Clarify the difference between ISD::BITCAST and the bitcast instruction from LLVM-IR.
Subscribers: llvm-commits, hfinkel

Differential Revision: http://reviews.llvm.org/D16464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269031 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 09:01:54 +00:00
Renato Golin
3c1ea17cfa Revert "[PGO] Fix __llvm_profile_raw_version linkage in MACHO IR instrumentation generates a COMDAT symbol __llvm_profile_raw_version to overwrite the same symbol in profile run-time to distinguish IR profiles from Clang generated profiles. In MACHO, LinkOnceODR linkage is used due to the lack of COMDAT support."
This reverts commits r268969, r268979 and r268984. They had target specific test
in generic directories without the correct specifiers and made it hard for us to
come up with a good solution by rapidly committing untested changes.

This test needs to be in a target specific directory or have the correct REQUIRED
identifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269027 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 08:23:57 +00:00
Jonas Paulsson
32db7c31b2 [foldMemoryOperand()] Pass LiveIntervals to enable liveness check.
SystemZ (and probably other targets as well) can fold a memory operand
by changing the opcode into a new instruction that as a side-effect
also clobbers the CC-reg.

In order to do this, liveness of that reg must first be checked. When
LIS is passed, getRegUnit() can be called on it and the right
LiveRange is computed on demand.

Reviewed by Matthias Braun.
http://reviews.llvm.org/D19861

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269026 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 08:09:37 +00:00
Elena Demikhovsky
b6e58d8bd0 [LoopVectorize] Handling induction variable with non-constant step.
Allow vectorization when the step is a loop-invariant variable.
This is the loop example that is getting vectorized after the patch:

 int int_inc;
 int bar(int init, int *restrict A, int N) {

  int x = init;
  for (int i=0;i<N;i++){
    A[i] = x;
    x += int_inc;
  }
  return x;
 }

"x" is an induction variable with *loop-invariant* step.
But it is not a primary induction. Primary induction variable with non-constant step is not handled yet.

Differential Revision: http://reviews.llvm.org/D19258



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269023 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 07:33:35 +00:00
Denis Zobnin
f459cb2831 [LAA] Rename "isStridedPtr" with "getPtrStride". NFC.
Changing misleading function name was approved in http://reviews.llvm.org/D17268.
Patch by Roman Shirokiy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269021 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 05:55:16 +00:00
Matthias Braun
c798cb42bb liveness.mir requires asserts to use -debug-only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269020 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 05:38:47 +00:00
Craig Topper
9abf0e829e [X86][AVX512] Strengthen the assertions from r269001. We need VLX to use the 128/256-bit move opcodes for extended registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269019 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 05:28:04 +00:00
Craig Topper
5937d7d9ab [X86] Add ZMM registers to the X86_INTR calling convention preserved mask when AVX512 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269018 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 05:28:02 +00:00
Craig Topper
7522f0e895 [X86] Update X86_INTR calling convention to save ZMM registers instead of YMM registers when AVX512 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269017 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 05:27:56 +00:00
Matthias Braun
e607e01664 LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()
We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
  differences between the main liverange and subranges because of hidden
  dead definitions. This case however cannot happen anymore with the
  DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
  values on merging control flow (the MachineVerifier missed most of
  these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
  LiveRangeCalc to better match the implementation/available helper
  functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269016 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:51:14 +00:00
Matthias Braun
583673e65e LiveInterval: Avoid unnecessary auto, add const; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269015 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:51:09 +00:00
Matthias Braun
0f8d2d6396 llc: Print+Verify machine function after loading it
In -run-pass mode verify/print machine function immediately after
loading the .mir file if -verify-machineinstr/-print-machineinstrs
option is specified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269014 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:51:07 +00:00
Matthias Braun
07636808ac TargetPassConfig: Set PrintMachineCode even if addMachinePasses() does not run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269013 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:51:04 +00:00
Dan Gohman
01a542927d [WebAssembly] Move register stackification and coloring to a late phase.
Move the register stackification and coloring passes to run very late, after
PEI, tail duplication, and most other passes. This means that all code emitted
and expanded by those passes is now exposed to these passes. This also
eliminates the need for prologue/epilogue code to be manually stackified,
which significantly simplifies the code.

This does require running LiveIntervals a second time. It's useful to think
of these late passes not as late optimization passes, but as a domain-specific
compression algorithm based on knowledge of liveness information. It's used to
compress the code after all conventional optimizations are complete, which is
why it uses LiveIntervals at a phase when actual optimization passes don't
typically need it.

Differential Revision: http://reviews.llvm.org/D20075


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269012 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:24:02 +00:00
Matthias Braun
6a6190de10 CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC
Many files include Passes.h but only a fraction needs to know about the
TargetPassConfig class. Move it into an own header. Also rename
Passes.cpp to TargetPassConfig.cpp while we are at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269011 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 03:21:59 +00:00