Commit Graph

145688 Commits

Author SHA1 Message Date
Michael Kuperstein
8981fc9888 [CGP] Split some critical edges coming out of indirect branches
Splitting critical edges when one of the source edges is an indirectbr
is hard in general (because it requires changing the memory the indirectbr
reads). But if a block only has a single indirectbr predecessor (which is
the common case), we can simulate splitting that edge by splitting
the destination block, and retargeting the *direct* branches.

This is motivated by the use of computed gotos in python 2.7: PyEval_EvalFrame()
ends up using an indirect branch with ~100 successors, and passing a constant to
each of those. Since MachineSink can't break indirect critical edges on demand
(and doing this in MIR doesn't look feasible), this causes us to emit about ~100
defs of registers containing constants, which we in the predecessor block, where
only one of those constants is used in each successor. So, at each computed goto,
we needlessly spill about a 100 constants to stack. The end result is that a
clang-compiled python interpreter can be about ~2.5x slower on a simple python
reduction loop than a gcc-compiled interpreter.

Differential Revision: https://reviews.llvm.org/D29916


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296060 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:56:21 +00:00
Ahmed Bougacha
8959f2e32f [GlobalISel] Use the same name for all remarks.
While there, switch to the explicit ctor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:34:47 +00:00
Ahmed Bougacha
abdb8cba99 [GlobalISel] Use the DISubprogram for translation failure remarks.
Justin added support for DISubprogram locs in r295531 and r296052.
Use that instead of no-loc for constants and arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296058 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:34:44 +00:00
Ahmed Bougacha
0108464498 [GlobalISel] Remove now-unnecessary variable. NFC.
Since r296047, we're able to return early on failures.
Don't track whether we succeeded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296057 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:34:41 +00:00
Adrian McCarthy
0ca20ba516 Fix unit tests after r296049.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:25:17 +00:00
Justin Bogner
52ab9f0e65 OptDiag: Summarize the instruction count in asm-printer
Add an optimization remark to asm-printer that summarizes the number
of instructions emitted per function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296053 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:19:22 +00:00
Justin Bogner
04ea7c64e2 OptDiag: Use DiagnosticLocation in MachineOptimizationRemarks
DiagnosticInfo switched from DebugLoc to DiagnosticLocation in
r295519, update these subclasses to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296052 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:19:18 +00:00
Evgeniy Stepanov
734e4c3bd4 [msan] Fix instrumentation of array allocas.
Before this, MSan poisoned exactly one element of any array alloca,
even if the number of elements was zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296050 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:13:17 +00:00
Adrian McCarthy
93e76ec3ca Implement some methods for NativeRawSymbol
This allows the ability to call IPDBSession::getGlobalScope with a NativeSession and
to then query it for some basic fields from the PDB's InfoStream.
Note that the symbols now have non-const references back to the Session so that
NativeRawSymbol can access the PDBFile through the Session.

Differential Revision: https://reviews.llvm.org/D30314

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 00:10:47 +00:00
Ahmed Bougacha
d6d9a85ff1 [GlobalISel] Don't translate other blocks when one failed.
We were stopping the translation of the parent block when the
translation of an instruction failed, but we were still trying to
translate the other blocks of the parent function.

Don't do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296047 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:57:36 +00:00
Ahmed Bougacha
141a873c65 [GlobalISel] Finalize translated function on scope exit. NFC.
This is the compromise between having a per-function IRTranslator
and manually managing the per-function state.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296046 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:57:28 +00:00
Adrian Prantl
d58d81ffa6 fix 80-column violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296045 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:54:29 +00:00
Xin Tong
37db8a701d Delete outdated comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296043 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:47:10 +00:00
Xin Tong
3addda9e5e LoopUnswitch - Simplify based on known not to a be constant.
Summary: In case we do not know what the condition is in an unswitched loop, but we know its definitely NOT a known constant. We can perform simplifcations based on this information.

Reviewers: sanjoy, hfinkel, chenli, efriedma

Reviewed By: efriedma

Subscribers: david2050, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D28968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296041 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:42:19 +00:00
Adam Nemet
b7b23a945d [OptDiag] Comment about the legacy status of emitOptimizationRemark*
functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296039 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:11:23 +00:00
Adam Nemet
16755aa7ba [OptDiag] Remove hotness parameter from legacy remark ctors
Anything using hotness should be using ORE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296038 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:11:21 +00:00
Adam Nemet
0f085888b6 [OptDiag] Hide legacy remark ctors
These are only used when emitting remarks without ORE directly using the free
functions emitOptimizationRemark*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296037 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:11:11 +00:00
Bryant Wong
f035535cd9 [ADT] Fix zip iterator interface.
This commit provides `zip_{first,shortest}` with the standard member types and
methods expected of iterators (e.g., `difference_type`), in order for zip to be
used with other adaptors, such as `make_filter_range`.

Support for reverse iteration has also been added.

Differential Revision: https://reviews.llvm.org/D30246

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 23:00:46 +00:00
Sanjoy Das
9e36975287 [IR] Add a Instruction::dropPoisonGeneratingFlags helper
Summary:
The helper will be used in a later change.  This change itself is NFC
since the only user of this new function is its unit test.

Reviewers: majnemer, efriedma

Reviewed By: efriedma

Subscribers: efriedma, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D30184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:50:52 +00:00
Artem Belevich
6bc216ccf6 [NVPTX] Added support for .f16x2 instructions.
This patch enables support for .f16x2 operations.

Added new register type Float16x2.
Added support for .f16x2 instructions.
Added handling of vectorized loads/stores of v2f16 values.

Differential Revision: https://reviews.llvm.org/D30057
Differential Revision: https://reviews.llvm.org/D30310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:38:24 +00:00
Tim Northover
a328146a75 ARM: make sure FastISel bails on f64 operations for Cortex-M4.
FastISel wasn't checking the isFPOnlySP subtarget feature before emitting
double-precision operations, so it got completely invalid CodeGen for doubles
on Cortex-M4F.

The normal ISel testing wasn't spectacular either so I added a second RUN line
to improve that while I was in the area.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:35:00 +00:00
Hans Wennborg
b20570e647 Revert r282872 "CVP. Turn marking adds as no wrap on by default"
While not CVP's fault, this caused miscompiles (PR31181). Reverting
until those are resolved.

(This also reverts the follow-ups r288154 and r288161 which removed the
flag.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:29:00 +00:00
Vedant Kumar
10ad4e00d9 [llvm-cov] Strip redundant path components from filenames (fix PR31982)
Instead of stripping the longest common prefix off of the filenames in a
report, strip out the longest chain of redundant path components. This
fixes the case in PR31982, where there are two files with the same
prefix, and stripping out the LCP makes things less intelligible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:20:32 +00:00
Dehao Chen
8580d5005b Add call branch annotation for ICP promoted direct call in SamplePGO mode.
Summary: SamplePGO uses branch_weight annotation to represent callsite hotness. When ICP promotes an indirect call to direct call, we need to make sure the direct call is annotated with branch_weight in SamplePGO mode, so that downstream function inliner can use hot callsite heuristic.

Reviewers: davidxl, eraman, xur

Reviewed By: davidxl, xur

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D30282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:15:18 +00:00
Krzysztof Parzyszek
9bb4f10172 [Hexagon] Handle saturations in Hexagon bit tracker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:11:52 +00:00
Krzysztof Parzyszek
c5dd216734 [Hexagon] Allow setting register in BitVal without storing into map
In the bit tracker, references to other bit values in which the register
is 0 are prohibited. This means that generating self-referential register
cells like { w:32 [0-15]:s[0-15] [16-31]:s[15] } is impossible. In order
to get a self-referential cell, it had to be stored into a map and then
reloaded from it. To avoid this step, add a function that will set the
register to a given value without going through the map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296025 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:08:50 +00:00
Stanislav Mekhanoshin
186113f5c1 [AMDGPU] Shut the warning "getRegUnitWeight hides overload...". NFC.
Clang issues warning about hidden overload. That was intended, so
add "using AMDGPUGenRegisterInfo::getRegUnitWeight;" to mute it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:51:28 +00:00
Adam Nemet
d77942232b [ORE] Remove ORE.emit{{.+}} functions
Last use was killed in my previous patch. The preferred way is now to
construct the remark, pipe things to it and pass it to ORE.emit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:32:53 +00:00
Kyle Butt
9e601a405e CodeGen: MachineBlockPlacement: Rename member to more general name. NFC.
Rename ComputedTrellisEdges to ComputedEdges to allow for other methods of
pre-computing edges.

Differential Revision: https://reviews.llvm.org/D30308

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296018 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:22:24 +00:00
Adam Nemet
d7e57f0502 [LAA] Remove unused LoopAccessReport
The need for this removed when I converted everything to use the opt-remark
classes directly with the streaming interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296017 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:17:36 +00:00
Adam Nemet
66f6b76187 [LV] Remove unused VectorizationReport
The need for this removed when I converted everything to use the opt-remark
classes directly with the streaming interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296016 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:17:31 +00:00
Evgeniy Stepanov
23c98ecd0f Disable TLS for stack protector on Android API<17.
The TLS slot did not exist back then.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:06:35 +00:00
Ahmed Bougacha
65d76e1285 [GlobalISel] Emit opt remarks on isel fallbacks.
Having more fine-grained information on the specific construct that
caused us to fallback is valuable for large-scale data collection.

We still have the fallback warning, that's also used for FastISel.
We still need to remove the fallback warning, and teach FastISel to also
emit remarks (it currently has a combination of the warning, stats, and
debug prints: the remarks could unify all three).

The abort-on-fallback path could also be better handled using remarks:
one could imagine a "-Rpass-error", analoguous to "-Werror", which would
promote missed/failed remarks to errors.  It's not clear whether that
would be useful for other remarks though, so we're not there yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296013 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:05:42 +00:00
Ahmed Bougacha
75fdc3a2ae [CodeGen] Teach opt remarks how to print MI instructions.
This will be used with GISel opt remarks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296012 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:05:33 +00:00
Ahmed Bougacha
8b200ec55e [CodeGen] Print MI without a newline when skipping debugloc. NFC.
This matches the behavior for skip-operands. While there, document it.
This is a follow-up to r296007.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296011 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:05:29 +00:00
Ahmed Bougacha
d9e982818c [CodeGen] Use const MBBs in the opt remark diagnostics. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296010 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 21:05:23 +00:00
Stanislav Mekhanoshin
0bf4d71d50 Correct register pressure calculation in presence of subregs
If a subreg is used in an instruction it counts as a whole superreg
for the purpose of register pressure calculation. This patch corrects
improper register pressure calculation by examining operand's lane mask.

Differential Revision: https://reviews.llvm.org/D29835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 20:19:44 +00:00
Ahmed Bougacha
5487126153 [ORE] Use const CodeRegions in the remark diagnostics. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296008 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 19:17:34 +00:00
Ahmed Bougacha
9628c84c3f [CodeGen] Add a way to SkipDebugLoc in MachineInstr::print(). NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 19:17:31 +00:00
Ahmed Bougacha
33f4d46446 [GlobalISel] Simplify Select type cleanup using a ScopeExit. NFC.
This lets us use more natural early-returns when selection fails.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296006 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 19:17:24 +00:00
Adrian Prantl
84277628a6 Revert "Teach the IR verifier to reject conflicting debug info for function arguments."
This reverts commit r295749 while investigating PR32042.

It looks like this check uncovered a problem in the frontend that
needs to be fixed before the check can be enabled again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 19:13:48 +00:00
Sanjay Patel
b41562fd38 [DAG] add convenience function to get -1 constant; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 19:02:33 +00:00
Chad Rosier
b81558a8e1 [Reassociate] Add negated value of negative constant to the Duplicates list.
In OptimizeAdd, we scan the operand list to see if there are any common factors
between operands that can be factored out to reduce the number of multiplies
(e.g., 'A*A+A*B*C+D' -> 'A*(A+B*C)+D'). For each operand of the operand list, we
only consider unique factors (which is tracked by the Duplicate set). Now if we
find a factor that is a negative constant, we add the negated value as a factor
as well, because we can percolate the negate out. However, we mistakenly don't
add this negated constant to the Duplicates set.

Consider the expression A*2*-2 + B. Obviously, nothing to factor.

For the added value A*2*-2 we over count 2 as a factor without this change,
which causes the assert reported in PR30256.  The problem is that this code is
assuming that all the multiply operands of the add are already reassociated.
This change avoids the issue by making OptimizeAdd tolerate multiplies which
haven't been completely optimized; this sort of works, but we're doing wasted
work: we'll end up revisiting the add later anyway.

Another possible approach would be to enforce RPO iteration order more strongly.
If we have RedoInsts, we process them immediately in RPO order, rather than
waiting until we've finished processing the whole function. Intuitively, it
seems like the natural approach: reassociation works on expression trees, so
the optimization only works in one direction. That said, I'm not sure how
practical that is given the current Reassociate; the "optimal" form for an
expression depends on its use list (see all the uses of "user_back()"), so
Reassociate is really an iterative optimization of sorts, so any changes here
would probably get messy.

PR30256

Differential Revision: https://reviews.llvm.org/D30228

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296003 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 18:49:03 +00:00
Dehao Chen
aa262b8b29 Use base discriminator in sample pgo profile matching.
Summary: The discriminator has been encoded, and only the base discriminator should be used during profile matching.

Reviewers: dblaikie, davidxl

Reviewed By: dblaikie, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30218

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295999 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 18:27:45 +00:00
Krzysztof Parzyszek
ab761176c9 [Hexagon] Avoid IMPLICIT_DEFs as new-value producers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295997 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 17:47:34 +00:00
Adam Nemet
e73243639a [LazyMachineBFI] Reimplement with getAnalysisIfAvailable
Since LoopInfo is not available in machine passes as universally as in IR
passes, using the same approach for OptimizationRemarkEmitter as we did for IR
will run LoopInfo and DominatorTree unnecessarily.  (LoopInfo is not used
lazily by ORE.)

To fix this, I am modifying the approach I took in D29836.  LazyMachineBFI now
uses its client passes including MachineBFI itself that are available or
otherwise compute them on the fly.

So for example GreedyRegAlloc, since it's already using MBFI, will reuse that
instance.  On the other hand, AsmPrinter in Justin's patch will generate DT,
LI and finally BFI on the fly.

(I am of course wondering now if the simplicity of this approach is even
preferable in IR.  I will do some experiments.)

Testing is provided by an updated version of D29837 which requires Justin's
patch to bring ORE to the AsmPrinter.

Differential Revision: https://reviews.llvm.org/D30128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295996 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 17:30:01 +00:00
Filipe Cabecinhas
c5d447ad77 [AddressSanitizer] Add PS4 offset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 17:10:28 +00:00
Sanjay Patel
243d7e32bc [InstCombine] use loop instead of recursion to peek through FPExt; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 16:39:51 +00:00
Sanjay Patel
8add37f8a7 [InstCombine] use 'match' to reduce code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295991 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 16:26:03 +00:00
Jan Vesely
dae323db22 AMDGPU/SI: Fix trunc i16 pattern
Hit on ASICs that support 16bit instructions.

Differential Revision: https://reviews.llvm.org/D30281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295990 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 16:12:21 +00:00