32436 Commits

Author SHA1 Message Date
Reid Kleckner
dd65b7a9f5 [llvm-symbolizer] Use the export table if no symbols are present
This lets us make guesses about symbols in third party DLLs without
debug info, like MSVCR120.dll or kernel32.dll. dbghelp does the same
thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 23:43:22 +00:00
Davide Italiano
c813f4ca03 [llvm-readobj] Teach ELFDumper about symbol versioning.
Differential Revision:	 http://reviews.llvm.org/D13824


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 23:19:01 +00:00
Benjamin Kramer
b436b77ccf Revert "This is a follow-up to the discussion in D12882."
Breaks clang selfhost, see PR25222. This reverts commits r250527 and r250528.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250570 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 23:00:29 +00:00
Sanjay Patel
d6d66ea302 [x86] promote 'add nsw' to a wider type to allow more combines
The motivation for this patch starts with PR20134:
https://llvm.org/bugs/show_bug.cgi?id=20134

void foo(int *a, int i) {
  a[i] = a[i+1] + a[i+2];
}

It seems better to produce this (14 bytes):

movslq	%esi, %rsi
movl	0x4(%rdi,%rsi,4), %eax
addl	0x8(%rdi,%rsi,4), %eax
movl	%eax, (%rdi,%rsi,4)

Rather than this (22 bytes):

leal	0x1(%rsi), %eax
cltq             
leal	0x2(%rsi), %ecx      
movslq	%ecx, %rcx     
movl	(%rdi,%rcx,4), %ecx
addl	(%rdi,%rax,4), %ecx
movslq	%esi, %rax       
movl	%ecx, (%rdi,%rax,4)

The most basic problem (the first test case in the patch combines constants) should also be fixed in InstCombine, 
but it gets more complicated after that because we need to consider architecture and micro-architecture. For
example, AArch64 may not see any benefit from the more general transform because the ISA solves the sexting in
hardware. Some x86 chips may not want to replace 2 ADD insts with 1 LEA, and there's an attribute for that: 
FeatureSlowLEA. But I suspect that doesn't go far enough or maybe it's not getting used when it should; I'm 
also not sure if FeatureSlowLEA should also mean "slow complex addressing mode".

I see no perf differences on test-suite with this change running on AMD Jaguar, but I see small code size
improvements when building clang and the LLVM tools with the patched compiler.

A more general solution to the sext(add nsw(x, C)) problem that works for multiple targets is available
in CodeGenPrepare, but it may take quite a bit more work to get that to fire on all of the test cases that
this patch takes care of.

Differential Revision: http://reviews.llvm.org/D13757


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250560 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 22:14:12 +00:00
Jim Grosbach
81e84a5e39 MC: Don't crash after issuing a diagnostic.
Crashing is bad, m'kay? Fixing a 4 year old bug of my own creation.
Adding the testcase now which I should have added then which would have
long since caught this.

The problem is that printMessage() will display the diagnostic but not
set HadError to true, resulting in the assembler continuing on its way
and trying to create relocations for things that may not allow them or
otherwise get itself into trouble. Using the Error() helper function
here rather than calling printMessage() directly resolves this.

rdar://23133240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250557 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 22:07:59 +00:00
Joseph Tremoulet
ddcfde9768 [WinEH] Fix CatchRetSuccessorColorMap accounting
Summary:
We now use the block for the catchpad itself, rather than its normal
successor, as the funclet entry.
Putting the normal successor in the map leads downstream funclet
membership computations to erroneous results.

Reviewers: majnemer, rnk

Subscribers: rnk, llvm-commits

Differential Revision: http://reviews.llvm.org/D13798

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250552 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 21:22:54 +00:00
Andrew Kaylor
bde51df753 Fix assertion failure with fp128 to unsigned i64 conversion
Patch by Mitch Bodart

Differential Revision: http://reviews.llvm.org/D13780



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 20:39:20 +00:00
Krzysztof Parzyszek
9bad2f04b3 [Hexagon] Split double registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250549 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 20:38:54 +00:00
Krzysztof Parzyszek
466f9e2f0c [Hexagon] Merge adjacent stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250542 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 19:43:56 +00:00
Diego Novillo
9dc572f568 Sample profiles - Re-arrange binary format to emit head samples only on top functions.
The number of samples collected at the head of a function only make
sense for top-level functions (i.e., those actually called as opposed to
being inlined inside another).

Head samples essentially count the time spent inside the function's
prologue.  This clearly doesn't make sense for inlined functions, so we
were always emitting 0 in those.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 18:54:35 +00:00
JF Bastien
d433cde1a1 WebAssembly: fix load/store syntax
Summary: The syntax has changed a bit recently.

Reviewers: binji

Subscribers: llvm-commits, jfb, sunfish, dschuff

Differential Revision: http://reviews.llvm.org/D13821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250535 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 18:24:42 +00:00
Joseph Tremoulet
bd439c2bc0 [WinEH] Fix endpad coloring/numbering
Summary:
When a cleanup's cleanupendpad or cleanupret targets a catchendpad, stop
trying to propagate the cleanup's parent's color to the catchendpad, since
what's needed is the cleanup's grandparent's color and the catchendpad
will get that color from the catchpad linkage already.  We already had
this exclusion for invokes, but were missing it for
cleanupendpad/cleanupret.

Also add a missing line that tags cleanupendpads' states in the
EHPadStateMap, without with lowering invokes that target cleanupendpads
which unwind to other handlers (and so don't have the -1 state) will fail.

This fixes the reduced IR repro in PR25163.


Reviewers: majnemer, andrew.w.kaylor, rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13797

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250534 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 18:08:16 +00:00
Sanjay Patel
62c113616e move test case to x86 directory because it specifies an x86 target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 17:18:07 +00:00
Sanjay Patel
0b34417718 This is a follow-up to the discussion in D12882.
Ideally, we would like SimplifyCFG to be able to form select instructions even when the operands
are expensive (as defined by the TTI cost model) because that may expose further optimizations. 
However, we would then like a later pass like CodeGenPrepare to undo that transformation if the
target would likely benefit from not speculatively executing an expensive op (this patch).

Once we have this safety mechanism in place, we can adjust SimplifyCFG to restore its 
select-formation behavior that changed with r248439.

Differential Revision: http://reviews.llvm.org/D13297



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250527 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 16:54:30 +00:00
Charlie Turner
29407e3e04 [AArch64] Implement vector splitting on UADDV.
Summary: Fixes PR25056.

Reviewers: mcrosier, junbuml, jmolloy

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D13466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 15:38:25 +00:00
Zlatko Buljan
d2f1cd8a02 Commited two test files which are forgotten during commit of patch for http://reviews.llvm.org/D13376
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250512 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 13:03:10 +00:00
Hrvoje Varga
bf6106bf51 [mips][microMIPS] Implement LB, LBE, LBU and LBUE instructions
Differential Revision: http://reviews.llvm.org/D11633


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250511 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 12:24:58 +00:00
Craig Topper
0f31d547eb [X86] Add fxsr feature flag for fxsave/fxrestore instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 06:03:09 +00:00
Sanjoy Das
b608bbef03 [RS4GC] Dont' propagate call attrs related to patchable statepoints
The `"statepoint-id"` and `"statepoint-num-patch-bytes"` attributes are
used solely to determine properties of the `gc.statepoint` being
created.  Once the `gc.statepoint` is in place, these should be removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250491 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 02:41:23 +00:00
Sanjoy Das
4e58da3bca [RS4GC] Use "deopt" operand bundles
Summary:
This is a step towards using operand bundles to carry deopt state till
RewriteStatepointsForGC.  The change adds a flag to
RewriteStatepointsForGC that teaches it to pick up deopt state from a
`"deopt"` operand bundle attached to the `call` or `invoke` it is
wrapping.

The command line flag added, `-rs4gc-use-deopt-bundles`, will only exist
for a short while.  Once we are able to pipe deopt bundle state through
the full optimization pipeline without problems, we will "constant fold"
`-rs4gc-use-deopt-bundles` to `true`.

Reviewers: swaroop.sridhar, reames

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D13372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250489 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 02:41:00 +00:00
Sanjoy Das
457377c0d4 [IndVars] Have cloneArithmeticIVUser guess better
Summary:
`cloneArithmeticIVUser` currently trips over expression like `add %iv,
-1` when `%iv` is being zero extended -- it tries to construct the
widened use as `add %iv.zext, zext(-1)` and (correctly) fails to prove
equivalence to `zext(add %iv, -1)` (here the SCEV for `%iv` is
`{1,+,1}`).

This change teaches `IndVars` to try sign extending the non-IV operand
if that makes the newly constructed IV use equivalent to the widened
narrow IV use.

Reviewers: atrick, hfinkel, reames

Subscribers: sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D13717

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 01:00:47 +00:00
JF Bastien
8cafdf539b WebAssembly: update syntax
Summary:
Follow the same syntax as for the spec repo. Both have evolved slightly
independently and need to converge again.

This, along with wasmate changes, allows me to do the following:

  echo "int add(int a, int b) { return a + b; }" > add.c
  ./out/bin/clang -O2 -S --target=wasm32-unknown-unknown add.c -o add.wack
  ./experimental/prototype-wasmate/wasmate.py add.wack > add.wast
  ./sexpr-wasm-prototype/out/sexpr-wasm add.wast -o add.wasm
  ./sexpr-wasm-prototype/third_party/v8-native-prototype/v8/v8/out/Release/d8 -e "print(WASM.instantiateModule(readbuffer('add.wasm'), {print:print}).add(42, 1337));"

As you'd expect, the d8 shell prints out the right value.

Reviewers: sunfish

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: http://reviews.llvm.org/D13712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-16 00:53:49 +00:00
Davide Italiano
600b09339d [llvm-readobj/ELF] Dump DT_VERDEF/DT_VERDEFNUM correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250464 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 22:04:55 +00:00
Evgeniy Stepanov
844145720c Revert "[safestack] Fast access to the unsafe stack pointer on AArch64/Android."
Breaks the hexagon buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250461 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 21:26:49 +00:00
Evgeniy Stepanov
06f1d96236 [safestack] Fast access to the unsafe stack pointer on AArch64/Android.
Android libc provides a fixed TLS slot for the unsafe stack pointer,
and this change implements direct access to that slot on AArch64 via
__builtin_thread_pointer() + offset.

This change also moves more code into TargetLowering and its
target-specific subclasses to get rid of target-specific codegen
in SafeStackPass.

This change does not touch the ARM backend because ARM lowers
builting_thread_pointer as aeabi_read_tp, which is not available
on Android.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250456 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 20:50:16 +00:00
JF Bastien
4b6405d130 x86: preserve flags when folding atomic operations
D4796 taught LLVM to fold some atomic integer operations into a single
instruction. The pattern was unaware that the instructions clobbered
flags. I fixed some of this issue in D13680 but had missed INC/DEC.

This patch adds the missing EFLAGS definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250438 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 18:24:52 +00:00
Kevin B. Smith
da36d63b6b Change test to use FileCheck rather than grep.
Differential Revision: http://reviews.llvm.org/D13751


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250431 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 17:05:12 +00:00
Philip Reames
1ad3dfdf95 Revert 250343 and 250344
Turns out this approach is buggy.  In discussion about follow on work, Sanjoy pointed out that we could be subject to circular logic problems.  

Consider:
 if (i u< L) leave()
 if ((i + 1) u< L) leave()
 print(a[i] + a[i+1]) 

If we know that L is less than UINT_MAX, we could possible prove (in a control dependent way) that i + 1 does not overflow.  This gives us:
 if (i u< L) leave()
 if ((i +nuw 1) u< L) leave()
 print(a[i] + a[i+1]) 

If we now do the transform this patch proposed, we end up with:
 if ((i +nuw 1) u< L) leave_appropriately()
 print(a[i] + a[i+1]) 

That would be a miscompile when i==-1.  The problem here is that the control dependent nuw bits got used to prove something about the first condition.  That's obviously invalid.

This won't happen today, but since I plan to enhance LVI/CVP with exactly that transform at some point in the not too distant future...




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250430 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 16:51:00 +00:00
JF Bastien
b72c6bad3c x86 FP atomic codegen: don't drop globals, stack
Summary:
x86 codegen is clever about generating good code for relaxed
floating-point operations, but it was being silly when globals and
immediates were involved, forgetting where the global was and
loading/storing from/to the wrong place. The same applied to hard-coded
address immediates.

Don't let it forget about the displacement.

This fixes https://llvm.org/bugs/show_bug.cgi?id=25171

A very similar bug when doing floating-points atomics to the stack is
also fixed by this patch.

This fixes https://llvm.org/bugs/show_bug.cgi?id=25144

Reviewers: pete

Subscribers: llvm-commits, majnemer, rsmith

Differential Revision: http://reviews.llvm.org/D13749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250429 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 16:46:29 +00:00
Manman Ren
0f34207b1d Recommit r250345, it was reverted in r250366 to investigate a bot failure.
Our internal bot is still red after r250366.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 14:59:40 +00:00
Daniel Sanders
c4c3678da9 [mips][ias] Implement ulh macro.
Summary:
This macro is needed to prevent test/CodeGen/Mips/2008-08-01-AsmInline.ll from
failing after the integrated assembler is enabled by default.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D13654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 14:52:58 +00:00
Daniel Sanders
ed541fe200 [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
Summary:
The -mcpu=mips16 option caused the Integrated Assembler to crash because
it couldn't figure out the architecture revision number to write to the
.MIPS.abiflags section. This CPU definition has been removed because, like
microMIPS, MIPS16 is an ASE to a base architecture.

Reviewers: vkalintiris

Subscribers: rkotler, llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D13656



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 14:34:23 +00:00
Igor Breger
f657b6395a AVX512: Implemented DAG lowering for shuff62x2/shufi62x2 instructions ( shuffle packed values at 128-bit granularity )
Differential Revision: http://reviews.llvm.org/D13648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250400 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 13:29:07 +00:00
NAKAMURA Takumi
fe1cc51fd1 [CMake] check-llvm requires llvm-pdbdump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250399 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 13:22:38 +00:00
Igor Breger
60148c48cb AVX512: Implemented encoding and intrinsics for vpternlogd/q.
Differential Revision: http://reviews.llvm.org/D13768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 12:33:24 +00:00
Elena Demikhovsky
9d0865a1a6 AVX-512: Fixed a bug in shuffle lowering 32-bit mode
AVX-512 bit shuffle fails on 32 bit since we create a vector of 64-bit constants.
I split 8x64-bit const vector to 16x32 on 32-bit mode.

Differential Revision: http://reviews.llvm.org/D13644



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 11:35:33 +00:00
Andrea Di Biagio
89315a2bfd [x86] Merge test pr24562.ll into x86-fold-pshufb.ll. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250387 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 09:54:25 +00:00
Zlatko Buljan
89b9248e6d [mips][microMIPS] Implement DPA.W.PH, DPAQ_S.W.PH, DPAQ_SA.L.W, DPAQX_S.W.PH, DPAQX_SA.W.PH, DPAU.H.QBL, DPAU.H.QBR and DPAX.W.PH instructions
Differential Revision: http://reviews.llvm.org/D13376


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250382 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 08:59:45 +00:00
Hrvoje Varga
5262392dd9 [mips][microMIPS] Implement BREAK16, LI16, MOVE16, SDBBP16, SUBU16 and XOR16 instructions
Differential Revision: http://reviews.llvm.org/D11292#inline-103143


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250381 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 08:39:07 +00:00
Hrvoje Varga
13067abcd0 [mips][microMIPS] Implement LLE and SCE instructions
Differential Revision: http://reviews.llvm.org/D11630


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 08:11:50 +00:00
Hrvoje Varga
c5dfed83b7 [mips][microMIPS] Implement LWLE, LWRE, SWLE and SWRE instructions
Differential Revision: http://reviews.llvm.org/D11631


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 07:23:06 +00:00
Lang Hames
8cf24612d5 [RuntimeDyld] Drop the '.s' suffix off the COFF test case - the MIPS bot started
failing when the suffix was added.

I assume the lack of a '.s' suffix means that the test case just wasn't running
before, and it has never worked on MIPS. I'll investigate that tomorrow.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250376 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 07:16:40 +00:00
Lang Hames
9816f9eac9 [RuntimeDyld] Don't try to get the contents of sections that don't have any
(e.g. bss sections).

MachO and ELF have been silently letting this pass, but COFFObjectFile contains
an assertion to catch this kind of (ab)use of the getSectionContents, and this
was causing the JIT to crash on COFF objects with BSS sections. This patch
should fix that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250371 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 06:41:45 +00:00
Akira Hatanaka
c770c8d638 [MachO] Stop generating *coal* sections.
Recommit r250342: move coal-sections-powerpc.s to subdirectory for powerpc.

Some background on why we don't have to use *coal* sections anymore:
Long ago when C++ was new and "weak" had not been standardized, an attempt was
made in cctools to support C++ inlines that can be coalesced by putting them
into their own section (TEXT/textcoal_nt instead of TEXT/text).

The current macho linker supports the weak-def bit on any symbol to allow it to
be coalesced, but the compiler still puts weak-def functions/data into alternate
section names, which the linker must map back to the base section name.

This patch makes changes that are necessary to prevent the compiler from using
the "coal" sections and have it use the non-coal sections instead when the
target architecture is not powerpc:

TEXT/textcoal_nt instead use TEXT/text
TEXT/const_coal instead use TEXT/const
DATA/datacoal_nt instead use DATA/data

If the target is powerpc, we continue to use the *coal* sections since anyone
targeting powerpc is probably using an old linker that doesn't have support for
the weak-def bits.

Also, have the assembler issue a warning if it encounters a *coal* section in
the assembly file and inform the users to use the non-coal sections instead.

rdar://problem/14265330

Differential Revision: http://reviews.llvm.org/D13188


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 05:28:38 +00:00
Manman Ren
9b380854cd Temporarily revert r250345 to sort out bot failure.
With r250345 and r250343, we start to observe the following failure
when bootstrap clang with lto and pgo:
PHI node entries do not match predecessors!
  %.sroa.029.3.i = phi %"class.llvm::SDNode.13298"* [ null, %30953 ], [ null, %31017 ], [ null, %30998 ], [ null, %_ZN4llvm8dyn_castINS_14ConstantSDNodeENS_7SDValueEEENS_10cast_rettyIT_T0_E8ret_typeERS5_.exit.i.1804 ], [ null, %30975 ], [ null, %30991 ], [ null, %_ZNK4llvm3EVT13getScalarTypeEv.exit.i.1812 ], [ %..sroa.029.0.i, %_ZN4llvm11SmallVectorIiLj8EED1Ev.exit.i.1826 ], !dbg !451895
label %30998
label %_ZNK4llvm3EVTeqES0_.exit19.thread.i
LLVM ERROR: Broken function found, compilation aborted!

I will re-commit this if the bot does not recover.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250366 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 04:58:24 +00:00
David Majnemer
9e109e7081 s/NumFiles/NumStreams/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 01:39:00 +00:00
David Majnemer
4e486b6a4d [llvm-pdbdump] Provide a mechanism to dump the raw contents of a PDB
A PDB can be thought of as a very simple file system.  It is
occasionally illuminating to see the contents of the underlying files.

Differential Revision: http://reviews.llvm.org/D13674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250356 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 01:27:19 +00:00
Quentin Colombet
2c6d721466 [ARM] Make sure we do not dereference the end iterator when accessing debug
information.
Although the problem was always here, it would only be exposed when
shrink-wrapping is enable.

rdar://problem/23110493


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 00:41:26 +00:00
Akira Hatanaka
952c2702c7 Revert r250349.
Test case coal-sections-powerpc.s is still failing on some buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250351 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-15 00:11:03 +00:00
Akira Hatanaka
82dd03ed9d [MachO] Stop generating *coal* sections.
Recommit r250342: add -arch=ppc32 to the RUN lines of powerpc tests.

Some background on why we don't have to use *coal* sections anymore:
Long ago when C++ was new and "weak" had not been standardized, an attempt was
made in cctools to support C++ inlines that can be coalesced by putting them
into their own section (TEXT/textcoal_nt instead of TEXT/text).

The current macho linker supports the weak-def bit on any symbol to allow it to
be coalesced, but the compiler still puts weak-def functions/data into alternate
section names, which the linker must map back to the base section name.

This patch makes changes that are necessary to prevent the compiler from using
the "coal" sections and have it use the non-coal sections instead when the
target architecture is not powerpc:

TEXT/textcoal_nt instead use TEXT/text
TEXT/const_coal instead use TEXT/const
DATA/datacoal_nt instead use DATA/data

If the target is powerpc, we continue to use the *coal* sections since anyone
targeting powerpc is probably using an old linker that doesn't have support for
the weak-def bits.

Also, have the assembler issue a warning if it encounters a *coal* section in
the assembly file and inform the users to use the non-coal sections instead.

rdar://problem/14265330

Differential Revision: http://reviews.llvm.org/D13188


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250349 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-14 23:48:10 +00:00