130136 Commits

Author SHA1 Message Date
Mehdi Amini
e58bfc97e6 Move summary creation out of llvm-as into opt
Summary:
Let keep llvm-as "dumb": it converts textual IR to bitcode. This
commit removes the dependency from llvm-as to libLLVMAnalysis.
We'll add back summary in llvm-as if we get to a textual
representation for it at some point. In the meantime, opt seems
like a better place for that.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19032

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266131 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 21:35:18 +00:00
Justin Bogner
f704722c8c X86: Avoid accessing SDValues after they've been RAUW'd
This fixes two use-after-frees in selectLEA64_32Addr. If matchAddress
matches an ADD with an AND as an operand, and that AND hits one of the
"heroic transforms" that folds masks and shifts, we end up with N
pointing to an SDNode that was deleted. Make sure we're done accessing
it before that.

Found by ASan with the recycling allocator changes in llvm.org/PR26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266130 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 21:34:24 +00:00
JF Bastien
7d33ff044b NFC: MergeFunctions return early
Same effect, easier to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266128 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 21:23:05 +00:00
Nicolai Haehnle
756309c45b AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics
Summary:
They correspond to BUFFER_LOAD/STORE_DWORD[_X2,X3,X4] and mostly behave like
llvm.amdgcn.buffer.load/store.format. They will be used by Mesa for SSBO and
atomic counters at least when robust buffer access behavior is desired.
(These instructions perform no format conversion and do buffer range checking
per component.)

As a side effect of sharing patterns with llvm.amdgcn.buffer.store.format,
it has become trivial to add support for the f32 and v2f32 variants of that
intrinsic, so the patch does so.

Also DAG-ify (and fix) some tests that I noticed intermittent failures in
while developing this patch.

Some tests were (temporarily) adjusted for the required mayLoad/hasSideEffects
changes to the BUFFER_STORE_DWORD* instructions. See also
http://reviews.llvm.org/D18291.

Reviewers: arsenm, tstellarAMD, mareko

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266126 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 21:18:10 +00:00
Teresa Johnson
a439f48cb3 [ThinLTO] Only compute imports for current module in FunctionImport pass
Summary:
The function import pass was computing all the imports for all the
modules in the index, and only using the imports for the current module.
Change this to instead compute only for the given module. This means
that the exports list can't be populated, but they weren't being used
anyway.

Longer term, the linker can collect all the imports and export lists
and serialize them out for consumption by the distributed backend
processes which use this pass.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266125 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 21:13:11 +00:00
JF Bastien
991afcd8cc NFC: MergeFunctions update more comments
They are wordy. Some words were wrong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266124 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 21:13:01 +00:00
James Y Knight
238d8199af Add __atomic_* lowering to AtomicExpandPass.
(Recommit of r266002, with r266011, r266016, and not accidentally
including an extra unused/uninitialized element in LibcallRoutineNames)

AtomicExpandPass can now lower atomic load, atomic store, atomicrmw, and
cmpxchg instructions to __atomic_* library calls, when the target
doesn't support atomics of a given size.

This is the first step towards moving all atomic lowering from clang
into llvm. When all is done, the behavior of __sync_* builtins,
__atomic_* builtins, and C11 atomics will be unified.

Previously LLVM would pass everything through to the ISelLowering
code. There, unsupported atomic instructions would turn into __sync_*
library calls. Because of that behavior, Clang currently avoids emitting
llvm IR atomic instructions when this would happen, and emits __atomic_*
library functions itself, in the frontend.

This change makes LLVM able to emit __atomic_* libcalls, and thus will
eventually allow clang to depend on LLVM to do the right thing.

It is advantageous to do the new lowering to atomic libcalls in
AtomicExpandPass, before ISel time, because it's important that all
atomic operations for a given size either lower to __atomic_*
libcalls (which may use locks), or native instructions which won't. No
mixing and matching.

At the moment, this code is enabled only for SPARC, as a
demonstration. The next commit will expand support to all of the other
targets.

Differential Revision: http://reviews.llvm.org/D18200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266115 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 20:18:48 +00:00
Derek Schuff
83c1c10eb3 [WebAssembly] Fix debug info in reg-stackify.ll test
It lacked a CU and thus became invalid with r266102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266114 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 20:12:05 +00:00
JF Bastien
4734513b3a Delete mergefunctions.clang.svn.patch
The patch doesn't apply, and was removed from zorg by rL266094.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266112 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 19:44:40 +00:00
Tom Stellard
cb6c943dc2 AMDGPU/SI: Insert wait states required after v_readfirstlane on SI
Summary:
We will be able to handle this case much better once the hazard recognizer
is finished, but this conservative implementation  fixes a hang with the piglit
test:

spec/arb_arrays_of_arrays/execution/sampler/fs-nested-struct-arrays-nonconst-nested-arra

Reviewers: arsenm, nhaehnle

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18988

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266105 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:40:43 +00:00
Matt Arsenault
87f61332d1 AMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32
This helps clean up some of the mess when expanding unaligned 64-bit
loads when changed to be promote to v2i32, and fixes situations
where or x, 0 was emitted after splitting 64-bit ors during moveToVALU.

I think this could be a generic combine but I'm not sure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266104 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:24:38 +00:00
Davide Italiano
361311da1f [IR/Verifier] Each DISubprogram with isDefinition: true must belong to a CU.
Add a check to catch violations. ~60 tests were broken and prevented
this change to be committed. Adrian and I (thanks Adrian!) went
through them in the last week or so updating. The check can be
done more efficiently but I'd still like to get this in ASAP to
avoid more broken tests to be checked in (if any).

PR:  27101

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266102 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:22:33 +00:00
Matt Arsenault
1dca54625d APInt: Add overload of isMask
This mimics the version in MathExtras.h which isn't testing for a
specific mask size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266101 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:17:23 +00:00
Ahmed Bougacha
fa51c2fe42 [CodeGen] Remove constant-folding dead code. NFC.
This code was specific to vector operations with scalar operands:
all the opcodes in FoldValue (via FoldConstantArithmetic) can't
match those criteria.

Replace it with an assert if that ever changes: at that point,
we might need to add back a splat BUILD_VECTOR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266100 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:15:39 +00:00
JF Bastien
5e99fa6fee Check alloca's special state
Following up to a similar fix in MergeFunctions: r266022. This patch keeps both in sync, it would be nice to not have to do this. It doesn't look like there's an easy way to test this code directly at the moment: AFAICT all currect uses of isSameOperationAs are looking at instructions deep inside a function. IndVarSimplify/pr24952.ll and InstMerge/st_sink_* look at alloca inadvertently but are brittle tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266099 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:06:55 +00:00
Philip Reames
0802f714a2 Introduce an GCRelocateInst class [NFC]
Previously, we were using isGCRelocate predicates.  Using a subclass of IntrinsicInst is far more idiomatic.  The refactoring also enables a couple of minor simplifications and code sharing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266098 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:05:10 +00:00
Sanjay Patel
7fa1223ec4 fix indentation; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266097 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 18:01:48 +00:00
Nicolai Haehnle
4bd7005237 AMDGPU/SI: Fix a mis-compilation of multi-level breaks
Summary:
Under certain circumstances, multi-level breaks (or what is understood by
the control flow passes as such) could be miscompiled in a way that causes
infinite loops, by emitting incorrect control flow intrinsics.

This fixes a hang in
dEQP-GLES3.functional.shaders.loops.while_dynamic_iterations.conditional_continue_vertex

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266088 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 16:10:38 +00:00
Artur Pilipenko
80ce67004b Support arbitrary addrspace pointers in masked load/store intrinsics
This is a resubmittion of 263158 change.

This patch fixes the problem which occurs when loop-vectorize tries to use @llvm.masked.load/store intrinsic for a non-default addrspace pointer. It fails with "Calling a function with a bad signature!" assertion in CallInst constructor because it tries to pass a non-default addrspace pointer to the pointer argument which has default addrspace.

The fix is to add pointer type as another overloaded type to @llvm.masked.load/store intrinsics.

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D17270


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266086 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 15:58:04 +00:00
Davide Italiano
fc57f09333 [Bitcode] Fix + regenerate old test so that it includes a DICompileUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266085 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 15:51:23 +00:00
Geoff Berry
3c28f60569 [ScheduleDAGInstrs] Handle instructions with multiple MMOs
Summary:
In getUnderlyingObjectsForInstr(): Don't give up on instructions with
multiple MMOs, instead look through all the MMOs and if they all meet
the conservative criteria previously used for single MMO instructions,
then return all of the underlying objects derived from the MMOs.

The change to ScheduleDAGInstrs::buildSchedGraph() is needed to avoid
the case where multiple underlying objects are present and are related
in such a way that successive iterations of the loop end up adding a
dependency from an instruction to itself.

Reviewers: atrick, hfinkel

Subscribers: MatzeB, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266084 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 15:50:19 +00:00
Than McIntosh
a58cdd3483 Test commit, NFC.
Adds a blank line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266082 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 15:35:05 +00:00
Petar Jovanovic
7655423622 [mips] add assembler support for .set arch=octeon
This patch enables assembler support for .set arch=octeon.
It will fix issues with inline assembler when this directive is used.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D18548


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266081 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 15:28:16 +00:00
Aaron Ballman
e3315093af Moving llvm-test-depends and test-depends into the Tests folder; NFC, this simply cleans up the generated solution so that these targets don't live in the root folder of the IDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266078 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 15:09:14 +00:00
Matt Arsenault
e6c6eef042 LangRef: Update example syntax for atomic load instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266077 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 14:41:03 +00:00
Matt Arsenault
d8f221e6c0 AMDGPU: Implement i64 global atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266075 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 14:05:11 +00:00
Matt Arsenault
bc0aee542f AMDGPU: Add atomic_inc + atomic_dec intrinsics
These are different than atomicrmw add 1 because they have
an additional input value to clamp the result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266074 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 14:05:04 +00:00
Matt Arsenault
9bb64b9f08 AMDGPU: Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266073 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 14:04:54 +00:00
Matt Arsenault
b26a693dfd AMDGPU: Add volatile to test loads and stores
When the memory vectorizer is enabled, these tests break.
These tests don't really care about the memory instructions,
and it's easier to write check lines with the unmerged loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266071 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 13:38:18 +00:00
Simon Pilgrim
9040cf97db [X86] Regenerated avx512 calling convention test checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266070 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 13:31:01 +00:00
Rafael Espindola
586f018931 This reverts commit r266002, r266011 and r266016.
They broke the msan bot.

Original message:

Add __atomic_* lowering to AtomicExpandPass.

AtomicExpandPass can now lower atomic load, atomic store, atomicrmw,and
cmpxchg instructions to __atomic_* library calls, when the target
doesn't support atomics of a given size.

This is the first step towards moving all atomic lowering from clang
into llvm. When all is done, the behavior of __sync_* builtins,
__atomic_* builtins, and C11 atomics will be unified.

Previously LLVM would pass everything through to the ISelLowering
code. There, unsupported atomic instructions would turn into __sync_*
library calls. Because of that behavior, Clang currently avoids emitting
llvm IR atomic instructions when this would happen, and emits __atomic_*
library functions itself, in the frontend.

This change makes LLVM able to emit __atomic_* libcalls, and thus will
eventually allow clang to depend on LLVM to do the right thing.

It is advantageous to do the new lowering to atomic libcalls in
AtomicExpandPass, before ISel time, because it's important that all
atomic operations for a given size either lower to __atomic_*
libcalls (which may use locks), or native instructions which won't. No
mixing and matching.

At the moment, this code is enabled only for SPARC, as a
demonstration. The next commit will expand support to all of the other
targets.

Differential Revision: http://reviews.llvm.org/D18200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266062 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 12:30:25 +00:00
Simon Dardis
2b9d31a9e7 Revert "[mips] MIPSR6 Compact branch aliases"
This reverts commit r266055.

ps4-buildslave2 is highlighting a failure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266061 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 12:22:45 +00:00
Jonas Paulsson
ef1a3d2607 [SystemZ] Use LDE32 instead of LE, when Offset is small.
On z13, if eliminateFrameIndex() chooses LE (and not LEY), immediately
transform that LE to LDE32 to avoid partial register dependencies.

LEY should be generally preferred for big offsets over an expansion
into LAY + LDE32.

Reviewed by Ulrich Weigand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266060 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 12:07:23 +00:00
Simon Dardis
b3bccda2dc [mips] MIPSR6 Compact branch aliases
Summary:
Alias 'jic $reg, 0' to 'jrc $reg' and 'jialc $reg, 0' to 'jalrc $reg' like
binutils.

Reviewers: dsanders

Differential Revision: http://reviews.llvm.org/D18856



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266055 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 10:41:53 +00:00
Stephan Bergmann
03c9cc77f1 Avoid GCC -fpermissive error about llvm::Mangler hidden by member named Mangler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266049 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 08:23:44 +00:00
Mehdi Amini
a6f183154e Refactor the Internalize stage of libLTO in a separate file (NFC)
This is intended to be shared by the ThinLTOCodeGenerator.

Note that there is a change in the way the verifier is run, previously
it was ran as a Pass on the merged module during internalization.
While now the verifier is called explicitely on the merged module
outside of the internalize "pass pipeline".

What remains strange in the API is the fact that `DisableVerify` in
the API does not disable this initial verifier.

Differential Revision: http://reviews.llvm.org/D19000

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266047 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 06:34:10 +00:00
Mehdi Amini
861c3f6356 Use StringSet instead of StringMap where it makes sense to in LTOCodeGenerator (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266046 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 06:33:44 +00:00
Junmo Park
dcd4d749c1 Minor code cleanup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266045 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 06:02:11 +00:00
Chuang-Yu Cheng
18569e85b3 [PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0
Resolve Bug 27046 (https://llvm.org/bugs/show_bug.cgi?id=27046).
The PPCInstrInfo::optimizeCompareInstr function could create a new use of
CR0, even if CR0 were previously dead. This patch marks CR0 live if a use of
CR0 is created.

Author: Tom Jablin (tjablin)
Reviewers: hfinkel kbarton cycheng

http://reviews.llvm.org/D18884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266040 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 03:10:52 +00:00
Chuang-Yu Cheng
3cc0d8fe8d [PPC64] Use mfocrf in prologue when we only need to save 1 nonvolatile CR field
In the ELFv2 ABI, we are not required to save all CR fields. If only one
nonvolatile CR field is clobbered, use mfocrf instead of mfcr to
selectively save the field, because mfocrf has short latency compares to
mfcr.

Thanks Nemanja's invaluable hint!
Reviewers: nemanjai tjablin hfinkel kbarton

http://reviews.llvm.org/D17749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266038 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 03:04:44 +00:00
Matthias Braun
b78b825147 TargetLowering: Add missing doxygen group end.
The missing end was also confusing the '{', '}' matching heuristics in
vim.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266036 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 02:16:15 +00:00
Matthias Braun
07f075cda9 AArch64: Drive-by cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266035 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 02:16:13 +00:00
George Burgess IV
9aead67902 Attempt to make buildbot happier with r266032.
Apparently std::numeric_limits<unsigned>::max() isn't constexpr
everywhere yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266034 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 01:44:13 +00:00
George Burgess IV
274105b8b5 Add the allocsize attribute to LLVM.
`allocsize` is a function attribute that allows users to request that
LLVM treat arbitrary functions as allocation functions.

This patch makes LLVM accept the `allocsize` attribute, and makes
`@llvm.objectsize` recognize said attribute.

The review for this was split into two patches for ease of reviewing:
D18974 and D14933. As promised on the revisions, I'm landing both
patches as a single commit.

Differential Revision: http://reviews.llvm.org/D14933


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266032 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 01:05:35 +00:00
Quentin Colombet
c13dfaa1cd [AArch64] Add test cases for the repairing of physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266030 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:43:40 +00:00
Quentin Colombet
1a11591ceb [RegBankSelect] Teach the repairing code how to handle physical
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266029 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:38:51 +00:00
Quentin Colombet
08f81ce293 [AArch64] Add a test case for the propagation of register banks through
phis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266028 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:32:55 +00:00
Quentin Colombet
edae2f105b [RegisterBankInfo] Do not provide a default mapping for non-reg of phi
operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266027 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:30:14 +00:00
Quentin Colombet
73ec6f759b [AArch64] Add a test case for the repairing of definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266026 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:25:22 +00:00
Quentin Colombet
be78bfb92c [RegBankSelect] Teach how to repair definitions.
Although repairing definitions is not mandatory for correctness (only
phis would be impacted because of the RPO traversal), not repairing
might go against the cost model. Therefore, just repair when it is
possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266025 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:12:59 +00:00