The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes.
Another way is to put a .word32 and mix code and data within a function. The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware.
This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits. Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261006 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This change will add a pass to remove unnecessary zero copies in target blocks
of cbz/cbnz instructions. E.g., the copy instruction in the code below can be
removed because the cbz jumps to BB1 when x0 is zero :
BB0:
cbz x0, .BB1
BB1:
mov x0, xzr
Jun
Reviewers: gberry, jmolloy, HaoLiu, MatzeB, mcrosier
Subscribers: mcrosier, mssimpso, haicheng, bmakam, llvm-commits, aemerson, rengolin
Differential Revision: http://reviews.llvm.org/D16203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261004 91177308-0d34-0410-b5e6-96231b3b80d8
Original message:
Get rid of the ifdefs in TargetLowering.
Introduce a new API used only by GlobalISel: CallLowering.
This API will contain target hooks dedicated to call lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260998 91177308-0d34-0410-b5e6-96231b3b80d8
CopyToReg nodes don't support FrameIndex operands. Other targets select
the FI to some LEA-like instruction, but since we don't have that, we
need to insert some kind of instruction that can take an FI operand and
produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy
copy_local between Op and its FI operand. This results in a redundant
copy which we should optimize away later (maybe in the post-FI-lowering
peephole pass).
Differential Revision: http://reviews.llvm.org/D17213
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260987 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: This change renames output operand for VOP instructions from dst to vdst. This is needed to enable decoding named operands for disassembler.
Reviewers: vpykhtin, tstellarAMD, arsenm
Subscribers: arsenm, llvm-commits, nhaustov
Projects: #llvm-amdgpu-spb
Differential Revision: http://reviews.llvm.org/D16920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260986 91177308-0d34-0410-b5e6-96231b3b80d8
The root issue appears to be a confusion around what makeNoWrapRegion actually does. It seems likely we need two versions of this function with slightly different semantics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260981 91177308-0d34-0410-b5e6-96231b3b80d8
WebAssembly doesn't require full RPO; topological sorting is sufficient and
can preserve more of the MachineBlockPlacement ordering. Unfortunately, this
still depends a lot on heuristics, because while we use the
MachineBlockPlacement ordering as a guide, we can't use it in places where
it isn't topologically ordered. This area will require further attention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260978 91177308-0d34-0410-b5e6-96231b3b80d8
This avoids some complications updating LiveIntervals to be aware of the new
register lifetimes, because we can just compute new intervals from scratch
rather than describe how the old ones have been changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260971 91177308-0d34-0410-b5e6-96231b3b80d8
Original commit message:
[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations.
The bits of r260488 it depends on have been committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260970 91177308-0d34-0410-b5e6-96231b3b80d8
This requires making an error message a bit more generic, but that seems
a reasonable tradeoff.
Extracted from r260488 but simplified a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260967 91177308-0d34-0410-b5e6-96231b3b80d8
Original messages:
Revert "[readobj] Handle ELF files with no section table or with no program headers."
Revert "[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations."
r260489 depends on r260488 and among other issues r260488 deleted error
handling code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260962 91177308-0d34-0410-b5e6-96231b3b80d8
Once a pointer is turned into a reference it cannot be nullptr, clang
rightfully warns about this assert being a tautology. Put the assert
before the reference is created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260949 91177308-0d34-0410-b5e6-96231b3b80d8
r260925 introduced a version of the *trim methods which is preferable
when trimming a single kind of character. Update all users in llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260926 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for trimming a single kind of character from a StringRef.
This makes the common case of trimming null bytes much neater. It's also
probably a bit speedier too, since it avoids creating a std::bitset in
find_{first,last}_not_of.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260925 91177308-0d34-0410-b5e6-96231b3b80d8
Introduce a new API used only by GlobalISel: CallLowering.
This API will contain target hooks dedicated to call lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260922 91177308-0d34-0410-b5e6-96231b3b80d8
This patch avoids the initial memset at the cost of making iterators
slightly more complex. This should be beneficial as most SmallPtrSets
hold no or only a few elements, while iterating over them is less
common.
Differential Revision: http://reviews.llvm.org/D16672
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260913 91177308-0d34-0410-b5e6-96231b3b80d8
This is an updated version which fixes a bug that happened with
uses tied to an earlyclobber operand which end at an unusual slotindex.
If two definitions write to independent subregisters then they can be
put in any order. LiveIntervalAnalysis::handleMove() did not support
this previously because it looks like moving a definition of a vreg past
another one.
This is a modified version of a patch proposed (two years ago) by
Vincent Lejeune! This version does not touch the read-undef flags and is
extended for the case of moving a subregister def behind all uses - this
can happen for subregister defs that are completely unused.
Differential Revision: http://reviews.llvm.org/D9067
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260906 91177308-0d34-0410-b5e6-96231b3b80d8
