Commit Graph

137018 Commits

Author SHA1 Message Date
NAKAMURA Takumi
edd69949b5 Fix tests in llvm/test/tools/gold/X86 to satisfy r279014.
They would unexpectedly pass if test/tools/gold/X86/Output had outputs of previous tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279214 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 06:44:44 +00:00
Xinliang David Li
0842b8d3d6 [Profile] Fix edge count read bug
Use uint64_t to avoid value truncation before scaling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279213 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 06:31:45 +00:00
Mehdi Amini
dfdbbee55c [LTO] Move callback member from base class to the derived where it is used (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279212 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 06:10:03 +00:00
Mehdi Amini
855d81dc03 Constify some path in the bitcode writer (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279211 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 06:06:18 +00:00
Mehdi Amini
6bdf6418b8 [LTO] Add a move to inialize member in ctor initialization list (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279210 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 05:56:37 +00:00
Xinliang David Li
7146ad0776 [Profile] Simple code refactoring for reuse /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279209 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 05:31:33 +00:00
Dean Michael Berris
4c485c3b14 [XRay] Synthesize a reference to the xray_instr_map
Without the synthesized reference to a symbol in the xray_instr_map,
linker section garbage collection will helpfully remove the whole
xray_instr_map section from the final executable (or archive). This will
cause the runtime to not be able to identify the sleds and hot-patch the
calls/jumps into the runtime trampolines.

This change adds a reference from the text section at the end of the
function to keep around the associated xray_instr_map section as well.

We also make sure that we catch this reference in the test.

Reviewers: chandlerc, echristo, majnemer, mehdi_amini

Subscribers: mehdi_amini, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D23398

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279204 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 04:44:30 +00:00
Lang Hames
d9176f9ab2 [RuntimeDyld][MCJIT] Un-XFAIL some tests that were fixed by r279182.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279201 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 03:12:16 +00:00
Matthias Braun
0e6fefdf1f Revert "RegScavenging: Add scavengeRegisterBackwards()"
The ppc64 multistage bot fails on this.

This reverts commit r279124.

Also Revert "CodeGen: Add/Factor out LiveRegUnits class; NFCI" because it depends on the previous change
This reverts commit r279171.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279199 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 03:03:24 +00:00
Chandler Carruth
d319716acc [ADT] Add the worlds simplest STL extra. Or at least close to it.
This is a little class template that just builds an inheritance chain of
empty classes. Despite how simple this is, it can be used to really
nicely create ranked overload sets. I've added a unittest as much to
document this as test it. You can pass an object of this type as an
argument to a function overload set an it will call the first viable and
enabled candidate at or below the rank of the object.

I'm planning to use this in a subsequent commit to more clearly rank
overload candidates used for SFINAE. All credit for this technique and
both lines of code here to Richard Smith who was helping me rewrite the
SFINAE check in question to much more effectively capture the intended
set of checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279197 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 02:07:51 +00:00
Lang Hames
84c33c6c95 [RuntimeDyld] Add support for ELF R_ARM_REL32 and R_ARM_GOT_PREL.
Patch by William Dillon. Thanks William!

This patch adds support for the R_ARM_REL32 and R_ARM_GOT_PREL ELF ARM
relocations to RuntimeDyld, which should allow JITing of code that
produces these relocations.

No test case: Unfortunately RuntimeDyldELF's GOT building mechanism (which
uses a separate section for GOT entries) isn't compatible with
RuntimeDyldChecker. The correct fix for this is to fix RuntimeDyldELF's GOT
support (it's fundamentally broken at the moment: separate sections aren't
guaranteed to be in range of a GOT entry load), but that's a non-trivial job.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279182 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 01:15:39 +00:00
Vitaly Buka
0c6c3b22db [asan] Optimize store size in FunctionStackPoisoner::poisonRedZones
Summary: Reduce store size to avoid leading and trailing zeros.

Reviewers: kcc, eugenis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279178 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 23:51:15 +00:00
Andrew Kaylor
0f27e30a6f Include X86CallFrameOptimization in the opt-bisect process.
Differential Revision: https://reviews.llvm.org/D23683




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279175 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:49:51 +00:00
Saleem Abdulrasool
303a259afd AArch64: remove extraneous padding
The structs BarrierOp, PrefetchOp, PSBHintOp are in AArch64AsmParser.cpp
(inside anonymous namespace).  This diff changes the order of fields and
removes the excessive padding (8 bytes).

Patch by Alexander Shaposhnikov!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279173 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:35:06 +00:00
Chris Bieneman
67f56cc4e4 [CMake] Add variables for tracking which runtimes are included
This allows sub-projects to have conditionals based on the presence of other projects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279172 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:18:11 +00:00
Matthias Braun
664ab5e536 CodeGen: Add/Factor out LiveRegUnits class; NFCI
This is a set of register units intended to track register liveness, it
is similar in spirit to LivePhysRegs.
You can also think of this as the liveness tracking parts of the
RegisterScavenger factored out into an own class.

This was proposed in http://llvm.org/PR27609

Differential Revision: http://reviews.llvm.org/D21916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279171 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:11:28 +00:00
Jacques Pienaar
e4c3ea0900 Fix link quotes on AArch64's CompilerWriterInfo section.
Reviewers: t.p.northover

Subscribers: t.p.northover, aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D23697

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279169 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:10:06 +00:00
Kyle Butt
0fda93481c CodeGen: If Convert blocks that would form a diamond when tail-merged.
The following function currently relies on tail-merging for if
conversion to succeed. The common tail of cond_true and cond_false is
extracted, and this then forms a diamond pattern that can be
successfully if converted.

If this block does not get extracted, either because tail-merging is
disabled or the threshold is higher, we should still recognize this
pattern and if-convert it.

Fixed a regression in the original commit. Need to un-reverse branches after
reversing them, or other conversions go awry.

Regression on self-hosting bots with no obvious explanation. Tidied up range
handling to be more obviously correct, but there was no smoking gun.

define i32 @t2(i32 %a, i32 %b) nounwind {
entry:
        %tmp1434 = icmp eq i32 %a, %b           ; <i1> [#uses=1]
        br i1 %tmp1434, label %bb17, label %bb.outer

bb.outer:               ; preds = %cond_false, %entry
        %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]
        %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]
        br label %bb

bb:             ; preds = %cond_true, %bb.outer
        %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]
        %tmp. = sub i32 0, %b_addr.021.0.ph
        %tmp.40 = mul i32 %indvar, %tmp.
        %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph
        %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph
        br i1 %tmp3, label %cond_true, label %cond_false

cond_true:              ; preds = %bb
        %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph
        %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph
        %indvar.next = add i32 %indvar, 1
        br i1 %tmp1437, label %bb17, label %bb

cond_false:             ; preds = %bb
        %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0
        %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10
        br i1 %tmp14, label %bb17, label %bb.outer

bb17:           ; preds = %cond_false, %cond_true, %entry
        %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]
        ret i32 %a_addr.026.1
}

Without tail-merging or diamond-tail if conversion:
LBB1_1:                                 @ %bb
                                        @ =>This Inner Loop Header: Depth=1
        cmp     r0, r1
        ble     LBB1_3
@ BB#2:                                 @ %cond_true
                                        @   in Loop: Header=BB1_1 Depth=1
        subs    r0, r0, r1
        cmp     r1, r0
        it      ne
        cmpne   r0, r1
        bgt     LBB1_4
LBB1_3:                                 @ %cond_false
                                        @   in Loop: Header=BB1_1 Depth=1
        subs    r1, r1, r0
        cmp     r1, r0
        bne     LBB1_1
LBB1_4:                                 @ %bb17
        bx      lr

With diamond-tail if conversion, but without tail-merging:
@ BB#0:                                 @ %entry
        cmp     r0, r1
        it      eq
        bxeq    lr
LBB1_1:                                 @ %bb
                                        @ =>This Inner Loop Header: Depth=1
        cmp     r0, r1
        ite     le
        suble   r1, r1, r0
        subgt   r0, r0, r1
        cmp     r1, r0
        bne     LBB1_1
@ BB#2:                                 @ %bb17
        bx      lr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279168 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:09:27 +00:00
Kyle Butt
bfd62a4b44 IfConversion: Rescan diamonds.
The cost of predicating a diamond is only the instructions that are not shared
between the two branches. Additionally If a predicate clobbering instruction
occurs in the shared portion of the branches (e.g. a cond move), it may still
be possible to if convert the sub-cfg. This change handles these two facts by
rescanning the non-shared portion of a diamond sub-cfg to recalculate both the
predication cost and whether both blocks are pred-clobbering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279167 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:09:25 +00:00
Kyle Butt
1eee0ec321 IfConversion: Handle inclusive ranges more carefully.
This may affect calculations for thresholds, but is not a significant change
in behavior.

The problem was that an inclusive range must have an additonal flag to showr
that it is empty, because otherwise begin == end implies that the range has one
element, and it may not be possible to move past on either side.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279166 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 22:09:23 +00:00
Hemant Kulkarni
f20ce37e8e llvm-objdump: Add Hexagon printer changes for -S/-l options
Differential Revision: https://reviews.llvm.org/D23521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279161 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:50:13 +00:00
Chris Bieneman
26b922023e [CMake] Create convenience targets for runtime projects
Each runtime project has a top-level target that is the name of the runtime (minus the "lib" prefix if applicable). This creates top-level targets mapping to runtime projects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279160 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:47:18 +00:00
Zhan Jun Liau
99174eb706 [SystemZ] Use valid base/index regs for inline asm
Summary:
Inline asm memory constraints can have the base or index register be assigned
to %r0 right now. Make sure that we assign only ADDR64 registers to the base
and index.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279157 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:44:15 +00:00
Tim Shen
0c6f849919 [Analysis] Change several Analysis pieces to use NodeRef. NFC.
Reviewers: dblaikie, grosser

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279156 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:41:24 +00:00
Chris Bieneman
85a2cffca4 [CMake] Make llvm-config implicit dependency for subprojects
The subproject interface being used for runtime libraries expects that llvm-config is passed into the subproject for consumption. We currently do this for every subproject, so we should expect that all LLVM ExternalProjects depend on llvm-config for the time being.

Eventually I'd like to see the sub-projects using LLVMConfig.cmake instead of the llvm-config binary, but that will take time to roll out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279155 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:41:21 +00:00
Chris Bieneman
3ada6da157 [CMake] Minor fix to regex in r279152
The third version component is optional in Xcode's version spew, so we need to make it optional in the regex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279153 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:36:36 +00:00
Chris Bieneman
1282ae48c8 [CMake] Support for generating Xcode 8 compatible toolchains
Xcode 8 requires toolchain compatibility version 2. This allows us to select the correct compatibility version based on the installed version of Xcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279152 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:32:48 +00:00
Sanjay Patel
c5ef0e6004 [InstCombine] add helper function for folds of icmp (shl 1, Y), C; NFCI
Clean up the existing code by:
1. Renaming variables
2. Adding local variables
3. Making it vector-safe

This is still guarded by a ConstantInt check, so no functional change is intended.
But this should be ready to go: if we move the ConstantInt check down, all of
these folds should do the right thing for vector types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279150 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:28:30 +00:00
Jacques Pienaar
56ae20aeb9 [lanai] Add ISA document to CompilerWritersInfo
Summary: Add Lanai ISA document to CompilerWritersInfo.

Reviewers: eliben

Subscribers: aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D23693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279149 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:25:17 +00:00
Tom Stellard
2b3323e046 AMDGPU/SI: Fix a test in wqm.ll to always use s_cbranch_vcc*
Summary:
We need to use floating-point compares to ensure that s_cbranch_vcc*
instructions are always generated.  With integer compares, future
optimizations could cause s_cbranch_scc* to be generated instead.

Reviewers: arsenm, nhaehnle

Subscribers: llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23401

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279148 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 21:21:53 +00:00
Kostya Serebryany
2fb93610ff [libFuzzer] add more __attribute__((visibility("default")))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279143 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 20:52:52 +00:00
Amaury Sechet
c43ec38718 Make cltz and cttz zero undef when the operand cannot be zero in InstCombine
Summary: Also add popcount(n) == bitsize(n)  -> n == -1 transformation.

Reviewers: majnemer, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23134

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279141 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 20:43:50 +00:00
Sanjay Patel
d87f299ea2 [InstCombine] use m_APInt to allow icmp (trunc X, Y), C folds for splat constant vectors
This is a sibling of:
https://reviews.llvm.org/rL278859
https://reviews.llvm.org/rL278935
https://reviews.llvm.org/rL278945
https://reviews.llvm.org/rL279066
https://reviews.llvm.org/rL279077
https://reviews.llvm.org/rL279101


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279133 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 20:28:54 +00:00
Sanjay Patel
f17a9b62af [InstCombine] clean up foldICmpTruncConstant(); NFCI
1. Fix variable names
2. Add local variables to reduce code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279132 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 20:25:16 +00:00
Michael Kuperstein
175a34b53e [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279129 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 20:08:15 +00:00
Wei Ding
443f72b62d AMDGPU : Fix QSAD and MQSAD instructions' incorrect data type.
Differential Revision: http://reviews.llvm.org/D23689

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279126 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 19:51:14 +00:00
Matthew Simpson
3989d7e56d [SLP] Initialize VectorizedValue when gathering
We abort building vectorizable trees in some cases (e.g., if the maximum
recursion depth is reached, if the region size is too large, etc.). If this
happens for a reduction, we can be left with a root entry that needs to be
gathered. For these cases, we need make sure we actually set VectorizedValue to
the resulting vector.

This patch ensures we properly set VectorizedValue, and it also ensures the
insertelement sequence generated for the gathers is inserted at the correct
location.

Reference: https://llvm.org/bugs/show_bug.cgi?id=28330
Differential Revison: https://reviews.llvm.org/D23410

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279125 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 19:50:32 +00:00
Matthias Braun
f65766df39 RegScavenging: Add scavengeRegisterBackwards()
Re-apply r276044 with off-by-1 instruction fix for the reload placement.

This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279124 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 19:47:59 +00:00
Kyle Butt
b1ee91e27d Branch Folding: Accept explicit threshold for tail merge size.
This is prep work for allowing the threshold to be different during layout,
and to enforce a single threshold between merging and duplicating during
layout. No observable change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279117 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:57:29 +00:00
Pete Cooper
a13b2e5313 Add a version of Intrinsic::getName which is more efficient when there are no overloads.
When running 'opt -O2 verify-uselistorder-nodbg.lto.bc', there are 33m allocations.  8.2m
come from std::string allocations in Intrinsic::getName().  Turns out this method only
returns a std::string because it needs to handle overloads, but that is not the common case.

This adds an overload of getName which just returns a StringRef when there are no overloads
and so saves on the allocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279113 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:30:54 +00:00
Simon Pilgrim
86d5f19ec7 [X86][SSE] Missed insertps shuffle patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279111 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:19:28 +00:00
Chris Bieneman
21eafc7363 [CMake] Silence message on multi-configuration generators
The Xcode and Visual Studio generators always log "-- No build type selected, default to Debug". This is because CMake doesn't initialize "CMAKE_CONFIGURATION_TYPES" until the generator's EnableLanguage call gets hit.

The first place EnableLanguage gets hit in our configuration is in the project() call. Since CMAKE_BUILD_TYPE isn't used until after we call project() it is safe to just move this check down a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279110 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:17:28 +00:00
Vitaly Buka
3f7f855997 [asan] Extend test
Summary: PR27453

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279109 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:17:19 +00:00
Valery Pykhtin
bc2ba716f4 [AMDGPU] add s_incperflevel/s_decperflevel intrinsics.
Differential revision: https://reviews.llvm.org/D23666

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279106 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:06:20 +00:00
Elliot Colp
4f657df0db Fix SystemZ compilation abort caused by negative AND mask
Normally, when an AND with a constant is lowered to NILL, the constant value is truncated to 16 bits. However, since r274066, ANDs whose results are used in a shift are caught by a different pattern that does not truncate. The instruction printer expects a 16-bit unsigned immediate operand for NILL, so this results in an abort.

This patch adds code to manually truncate the constant in this situation. The rest of the bits are then set, so we will detect a case for NILL "naturally" rather than using peephole optimizations.

Differential Revision: http://reviews.llvm.org/D21854


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279105 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 18:04:26 +00:00
Duncan P. N. Exon Smith
92e6c942c5 AArch64: Don't call getIterator() on iterators
Remove an unnecessary round-trip:

    iterator => operator->() => getIterator()

In some cases, the iterator is end(), so the dereference of operator->
is invalid (UB).

The testcase only crashes with r278974 (currently reverted to
investigate this), which adds an assertion for invalid dereferences of
ilist nodes.

Fixes PR29035.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279104 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 17:58:09 +00:00
Eugene Zelenko
8970377ddc [LLVM] Fix some Clang-tidy modernize-use-using and Include What You Use warnings
Differential revision: https://reviews.llvm.org/D23675


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279102 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 17:56:27 +00:00
Sanjay Patel
030db6490a [InstCombine] use m_APInt to allow icmp (udiv X, Y), C folds for splat constant vectors
This is a sibling of:
https://reviews.llvm.org/rL278859
https://reviews.llvm.org/rL278935
https://reviews.llvm.org/rL278945
https://reviews.llvm.org/rL279066
https://reviews.llvm.org/rL279077


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279101 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 17:55:59 +00:00
Dan Gohman
bb5b5bce12 [WebAssembly] Disable the store-results optimization.
The WebAssemly spec removing the return value from store instructions, so
remove the associated optimization from LLVM.

This patch leaves the store instruction operands in place for now, so stores
now always write to "$drop"; these will be removed in a seperate patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279100 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 17:51:27 +00:00
Chandler Carruth
7306a617c3 [Assumptions] Make collecting ephemeral values not quadratic in the
number of assume intrinsics.

The classical way to have a cache-friendly vector style container when
we need queue semantics for BFS instead of stack semantics for DFS is to
use an ever-growing vector and an index. Erasing from the front requires
O(size) work, and unless we expect the worklist to grow *very* large,
its probably cheaper to just grow and race down the list.

But that makes it more bad that we're putting the assume intrinsics in
this at all. We end up looking at the (by definition empty) use list to
see if they're ephemeral (when we've already put them in that set), etc.

Instead, directly populate the worklist with the operands when we mark
the assume intrinsics as ephemeral. Also, test the visited set *before*
putting things into the worklist so we don't accumulate the same value
in the list 100s of times.

It would be nice to use a set-vector for this but I think its useful to
test the set earlier to avoid repeatedly querying whether the same
instruction is safe to speculate.

Hopefully with these changes the number of values pushed onto the
worklist is smaller, and we avoid quadratic work by letting it grow as
necessary.

Differential Revision: https://reviews.llvm.org/D23396

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279099 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-18 17:51:24 +00:00