Commit Graph

370 Commits

Author SHA1 Message Date
Matt Arsenault
f91238f391 AMDGPU: Implement AnalyzeBranch
Original patch by Tom Stellard

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270295 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-21 00:29:27 +00:00
Matthias Braun
6054e84d82 LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()
We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
  differences between the main liverange and subranges because of hidden
  dead definitions. This case however cannot happen anymore with the
  DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
  values on merging control flow (the MachineVerifier missed most of
  these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
  LiveRangeCalc to better match the implementation/available helper
  functions.

This re-applies r269016. The fixes from r270290 and r270259 should avoid
the machine verifier problems this time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270291 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 23:14:56 +00:00
Matthias Braun
d8eb7dec3e MachineVerifier: subregs so not require defs/valnos on every path
It is fine for subregister ranges to be undefined on some CFG paths as
we may have a "vregX:other_subreg<read-undef> =" def on that path. We
do not (and should not) have live segments for the subregister ranges.
The MachineVerifier should not complain about this.

This is a slight variant of http://llvm.org/PR27705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270290 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 23:02:13 +00:00
Matthias Braun
2a73788c72 LiveIntervalAnalysis: Fix missing defs in renameDisconnectedComponents().
Fix renameDisconnectedComponents() creating vreg uses that can be
reached from function begin withouthaving a definition (or explicit
live-in). Fix this by inserting IMPLICIT_DEF instruction before
control-flow joins as necessary.

Removes an assert from MachineScheduler because we may now get
additional IMPLICIT_DEF when preparing the scheduling policy.

This fixes the underlying problem of http://llvm.org/PR27705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270259 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 19:46:13 +00:00
Matt Arsenault
44aaff08ed AMDGPU: Fix promote alloca for pointer loads
If the load has a pointer type, we don't want to change
its type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270000 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 23:20:24 +00:00
Matt Arsenault
3cd52aec7c AMDGPU: Other sizes of popcnt are fast
We can chain bcnt instructions together, so
any width popcnt is pretty fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269950 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 16:10:19 +00:00
Matt Arsenault
5d9f8fb9d4 AMDGPU: Fix assert when erroring on a call
For some reason an assert is now hit when a valid chain
is not returned, so return the entry chain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269948 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 16:10:11 +00:00
Matt Arsenault
41cf920df5 AMDGPU: Handle alloca promoting with null operands
If the second pointer in a multi-pointer instruction is
a constant, we can replace the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269945 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 15:57:21 +00:00
Matt Arsenault
c33f9cd287 AMDGPU: Fix a few slightly broken tests
Fix minor bugs and uses of undef which break when
pointer related optimization passes are run.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269944 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 15:48:44 +00:00
Jan Vesely
350e40ffb2 AMDGPU/R600: Use correct number of vector elements when lowering private loads
Reviewer: tstellardAMD, arsenm

Subscribers: arsenm, kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D20032

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269725 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 23:56:32 +00:00
Matt Arsenault
abc9f47dfe AMDGPU: Add some private element size tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269712 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 22:17:27 +00:00
Matt Arsenault
7985e4be56 AMDGPU: Fix promote alloca pass creating huge arrays
This was assuming it could use all memory before, which is
a bad decision because it restricts occupancy.

By default, only try to use enough space that could reduce
occupancy to 7, an arbitrarily chosen limit.

Based on the exist LDS usage, try to round up to the limit
in the current tier instead of further hurting occupancy.
This isn't ideal, because it doesn't accurately know how much
space is going to be used for alignment padding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269708 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 21:19:59 +00:00
Matt Arsenault
3b880e33a0 SelectionDAG: Select min/max when both are used
Allow two users of the condition if the other user
is also a min/max select. i.e.

%c = icmp slt i32 %x, %y
%min = select i1 %c, i32 %x, i32 %y
%max = select i1 %c, i32 %y, i32 %x

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269699 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 20:58:23 +00:00
Renato Golin
3b0d377ef8 [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Reapplied after fixing the LLDB build that was broken due to the new
DiagnosticSeverity in LLVMContext.h, and fixed an UB in the new change.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269655 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 14:28:02 +00:00
Renato Golin
7e38263edc Revert "[llc] New diagnostic handler"
This reverts commit r269563. Even though now it passes all LLDB bots
after a local fix, there's a new buildbot it fails with tests that we
hadn't seen locally:

http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/15647

Adding those tests to the list to investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269568 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 14:37:11 +00:00
Renato Golin
2c05d88b8d [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Reapplied after fixing the LLDB build that was broken due to the new
DiagnosticSeverity in LLVMContext.h.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269563 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 13:15:22 +00:00
Jan Vesely
d75c9ce18b AMDGPU/R600: Fold global address operand
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19793

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269480 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 20:39:31 +00:00
Jan Vesely
fbff874b03 AMDGPU/R600: Implement memory loads from constant AS
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19792

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269479 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 20:39:29 +00:00
Konstantin Zhuravlyov
a3570477c9 [AMDGPU] Update nop insertion for debugger usage
- Insert one nop for each high level statement instead of two
- Do not insert nop before prologue

Differential Revision: http://reviews.llvm.org/D20215


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269452 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 18:21:28 +00:00
Renato Golin
865778e04a Revert "[llc] New diagnostic handler"
This reverts commit r269428, as it breaks the LLDB build. We need to
understand how to change LLDB in the same way as LLC before landing this
again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269432 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 16:02:44 +00:00
Renato Golin
89ca6c01c0 [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269428 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 15:37:46 +00:00
Matt Arsenault
1e466e511b AMDGPU: Remove verifier check for scc live ins
We only really need this to be true for SIFixSGPRCopies.
I'm not sure there's any way this could happen before that point.

Fixes a case where MachineCSE could introduce a cross block
scc use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269391 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 04:15:48 +00:00
Tom Stellard
c37b54dfc5 Revert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"
This reverts commit r269016 and also the follow-up commit r269020.

This patch caused PR27705.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269344 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-12 20:27:40 +00:00
Matt Arsenault
8adf4ebcf3 AMDGPU: Fix breaking IR on instructions with multiple pointer operands
The promote alloca pass would attempt to promote an alloca with
a select, icmp, or phi user, even though the other operand was
from a non-promotable source, producing a select on two different
pointer types.

Only do this if we know that both operands derive from the same
alloca. In the future we should be able to relax this to an alloca
which will also be promoted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269265 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-12 01:58:58 +00:00
Jan Vesely
a836e3c43c AMDGPU: Split private memory tests
Reenable R600 testing

reviewer: arsenm

Differential Revision: http://reviews.llvm.org/D20031

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269207 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-11 17:24:45 +00:00
Matt Arsenault
3e43181f87 AMDGPU: Change private_element_size to 4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269145 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-11 00:28:54 +00:00
Matthias Braun
c798cb42bb liveness.mir requires asserts to use -debug-only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269020 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 05:38:47 +00:00
Matthias Braun
e607e01664 LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()
We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
  differences between the main liverange and subranges because of hidden
  dead definitions. This case however cannot happen anymore with the
  DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
  values on merging control flow (the MachineVerifier missed most of
  these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
  LiveRangeCalc to better match the implementation/available helper
  functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269016 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:51:14 +00:00
Konstantin Zhuravlyov
2fdfecfd6e [AMDGPU] Clean up debugger tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268944 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-09 18:05:42 +00:00
Matt Arsenault
deeb131011 AMDGPU: Fold shift into cvt_f32_ubyteN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268930 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-09 16:29:50 +00:00
Matthias Braun
26b4602681 DetectDeadLanes: Increase precision when detecting undef inputs
In case of COPY-like instruction we may be able to deduce that a certain
input is unused, based on the used lanes of the register defined by the
instruction.
This even works accross otherwise incompatible copies (no need to have
compatible lanemasks, completely unused operands are still completely
unused). It even makes sense to redo the analysis in this case since we
gained information for a case we previously stopped at because of the
incompatible masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268815 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 22:43:50 +00:00
Artem Tamazov
ea912da38b [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax
in s_sendmsg and s_sendmsghalt instructions.
The syntax matches the SP3 assembler/disassembler rules.
That is why implicit inputs (like M0 and EXEC) are not printed
to disassembly output anymore.

sendmsg(...) allows only known message types and attributes,
even if literals are used instead of symbolic names.
However, raw literal (without "sendmsg") still can be used,
and that allows for any 16-bit value.

Tests updated/added.

Differential Revision: http://reviews.llvm.org/D19596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268762 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 17:48:48 +00:00
Nikolay Haustov
6bad5855c4 Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."
This reverts commit 47486d52454d60cdf6becc0b2efe533c73794380.

It broke calling OpenCL kernel from another kernel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268739 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 14:59:04 +00:00
Nikolay Haustov
943961584a AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
Summary:
    Check calling convention in AMDGPUMachineFunction::isKernel

    This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

    Also, in the future unused non-kernels may be optimized.

    Reviewers: tstellarAMD, arsenm

    Subscribers: arsenm, joker.eph, llvm-commits

    Differential Revision: http://reviews.llvm.org/D19917

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268719 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 09:23:13 +00:00
Nikolay Haustov
ac1dd296bc AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1.
Summary:
This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

Also, in the future unused non-kernels may be optimized.

For now, also accept SPIR_KERNEL for HCC frontend.

Also, add bitcode compatibility tests for missing calling conventions
except AVR_BUILTIN which doesn't have parse code.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, joker.eph, llvm-commits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268717 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-06 09:07:29 +00:00
Matt Arsenault
d707747418 AMDGPU: Run r600 tests last
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268672 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:07:37 +00:00
Nicolai Haehnle
fcd3365643 AMDGPU: Uniform branch conditions can originate with intrinsics
Summary:
Discovered by Dave Airlie, fixes an assertion in Khronos OpenGL CTS
GL43-CTS.shader_storage_buffer_object.advanced-matrix.

In this particular case, the buffer load intrinsic fed into a uniform
conditional branch, and led the brcond lowering down the wrong path.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268650 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 17:36:36 +00:00
Tom Stellard
66eb4d17bb AMDGPU/SI: Add support for AMD code object version 2.
Summary:
Version 2 is now the default.  If you want to emit version 1, use
the amdgcn--amdhsa-amdcov1 triple.

Reviewers: arsenm, kzhuravl

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268647 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 17:03:33 +00:00
Matt Arsenault
6b3315d64b AMDGPU: Custom lower v2i32 loads and stores
This will allow us to split up 64-bit private accesses when
necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268296 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 20:13:51 +00:00
Tom Stellard
451c792dbc AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch
We were using v_readlane_b32 with the lane set to zero, but this won't
work if thread 0 is not active.

Differential Revision: http://reviews.llvm.org/D19745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268295 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 20:11:44 +00:00
Matt Arsenault
7614ec6431 AMDGPU: Make i64 loads/stores promote to v2i32
Now that unaligned access expansion should not attempt
to produce i64 accesses, we can remove the hack in
PreprocessISelDAG where this is done.

This allows splitting i64 private accesses while
allowing the new add nodes indexing the vector components
can be folded with the base pointer arithmetic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268293 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 20:07:26 +00:00
Tom Stellard
8478bd5765 AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses
Summary:
Add support for detecting hazards in SMEM soft clauses, so that we only
break the clauses when necessary, either by adding s_nop or re-ordering
other alu instructions.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268260 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 17:39:06 +00:00
Tom Stellard
b8a2cc5119 AMDGPU/SI: Use hazard recognizer to detect DPP hazards
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268247 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 16:23:09 +00:00
Tom Stellard
df1aa5c25d AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
This was supposed to be part of r268143.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268154 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-30 04:04:48 +00:00
Tom Stellard
6ab99c7ca6 AMDGPU/SI: Enable the post-ra scheduler
Summary:
This includes a hazard recognizer implementation to replace some of
the hazard handling we had during frame index elimination.

Reviewers: arsenm

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268143 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-30 00:23:06 +00:00
Matt Arsenault
c10caa3301 AMDGPU: Fix crash with unreachable terminators.
If a block has no successors because it ends in unreachable,
this was accessing an invalid iterator.

Also stop counting instructions that don't emit any
real instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268119 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 21:52:13 +00:00
Matt Arsenault
de6dea1afa AMDGPU: Add kernarg.segment.ptr intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268105 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 21:16:52 +00:00
Matt Arsenault
6d8c39b760 DAGCombiner: Reduce truncated shl width
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268094 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 19:53:16 +00:00
Tom Stellard
ac19ae8d63 AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions
Summary:
These instructions can add an immediate offset to the address, like other
ds instructions.

Reviewers: arsenm

Subscribers: arsenm, scchan

Differential Revision: http://reviews.llvm.org/D19233

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268043 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 14:34:26 +00:00
Nikolay Haustov
02cd01c121 AMDGPU/SI: Assembler: Unify parsing/printing of operands.
Summary:
The goal is for each operand type to have its own parse function and
at the same time share common code for tracking state as different
instruction types share operand types (e.g. glc/glc_flat, etc).

Introduce parseAMDGPUOperand which can parse any optional operand.
DPP and Clamp/OMod have custom handling for now. Sam also suggested
to have class hierarchy for operand types instead of table. This
can be done in separate change.

Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps,
parseMubufOptionalOps, parseDPPOptionalOps.
Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class.
Rename AsmMatcher/InstPrinter methods accordingly.
Print immediate type when printing parsed immediate operand.
Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3).
Update tests.

Reviewers: tstellarAMD, SamWot, artem.tamazov

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19584

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268015 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 09:02:30 +00:00