llvm/test/CodeGen/Lanai
Jacques Pienaar 8860d3c0df [lanai] Custom lowering of SHL_PARTS
Summary: Implement custom lowering of SHL_PARTS to enable lowering of left shift with larger than 32-bit shifts.

Reviewers: eliben, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288541 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-02 22:01:28 +00:00
..
codemodel.ll
comparisons_i32.ll
comparisons_i64.ll [lanai] Add lowering for SETCCE i32. 2016-04-19 19:15:25 +00:00
constant_multiply.ll [lanai] Manually match 0/-1 with R0/R1. 2016-11-29 23:01:09 +00:00
delay_filler.ll
i32.ll
lanai-misched-trivial-disjoint.ll Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag 2016-07-29 19:35:22 +00:00
lit.local.cfg
lshift64.ll [lanai] Custom lowering of SHL_PARTS 2016-12-02 22:01:28 +00:00
mem_alu_combiner.ll [lanai] Change reloc to use PIC_ by default and cleanup. 2016-05-20 21:41:53 +00:00
multiply.ll
rshift64.ll
select.ll [lanai] Add lowering for SETCCE i32. 2016-04-19 19:15:25 +00:00
set_and_hi.ll
shift.ll
stack-frame.ll
sub-cmp-peephole.ll [lanai] Use peephole optimizer to generate more conditional ALU operations. 2016-07-07 23:36:04 +00:00
subword.ll [lanai] Add subword scheduling itineraries. 2016-04-20 18:28:55 +00:00